We theoretically and experimentally demonstrate low loss branches in a Si photonic wire waveguide. Approximate calculation by the two-dimensional finite-difference time-domain (2-D FDTD) method and detailed design by the 3-D FDTD method indicate that low excess loss less than 0.2 dB is expected for a µm-size bend-waveguide-type branch at a wavelength of 1.55 µm. This branch is fabricated in a silicon-on-insulator substrate and the loss is evaluated to be 0.3 dB. This value is small enough to construct a very compact branching circuit.

An embedded processor core using split branch architecture has been developed. This processor core targets 400 MHz using 0.18 µm technology, and its higher frequency needs deeper pipeline than the conventional processor. To solve the increasing branch penalty problem caused by a deeper pipeline, this processor takes an active preload mechanism to preload the target instructions to internal buffers in order to hide the instruction cache latency. The processor also uses multiple instruction buffers to reduce branch penalty cycles of branch misprediction. The performance estimation result shows that about 70% of branch overhead cycles can be reduced from the conventional implementation. The area for this branch mechanism consumes only 1% of the total core, which is smaller than the conventional branch target buffer (BTB) scheme, and helps to achieve low power and low cost.

In this paper, we first investigate the problems of the existing branch point algorithms for available bit rate (ABR) multicast connections in ATM networks, and then propose various solutions for resolving those problems. By combining these solutions, we also propose a new efficient and scalable branch point algorithm. In the proposed algorithm, each branch point stores the feedback information on a per-branch basis for each virtual connection and only passes BRM cells returning from the farthest destination. Simulation results show that the proposed algorithm can provide a good fairness, a higher efficiency and an excellent scalability, compared with the existing algorithms.

In this study, we propose a branch-point scheme for multicast ABR service in ATM networks. The performance of the proposed scheme is obtained to show that the consolidation noise and delay can be reduced more effectively than those of the existing schemes.

Given a Petri net PN=(P, T, E), a siphon is a set S of places such that the set of input transitions to S is included in the set of output transitions from S. Concerning extraction of minimal siphons containing a given specified set Q of places, the paper proposes three algorithms based on branch-and-bound method for enumerating, if any, all minimal siphons containing Q, as well as for extracting such one minimal siphon.

Modern micro-architectures employ superscalar techniques to enhance system performance. Since the superscalar microprocessors must fetch at least one instruction cache line at a time to support high issue rate and large amount speculative executions. There are cases that multiple branches are often encountered in one cycle. And in practical implementation this would cause serious problem while there are variable number of instruction addresses that look up the Branch Target Buffer simultaneously. In this paper, we propose a Range Associative Branch Target Buffer (RABTB) that can recognize and predict multiple branches in the same instruction cache line for a wide-issue micro-architecture. Several configurations of the RABTB are simulated and compared using the SPECint95 benchmarks. We show that with a reasonable size of prediction scope, branch prediction can be improved by supporting multiple / up to 8 branch predictions in one cache line in one cycle. Our simulation results show that the optimal RABTB should be 2048 entry, 8-column range-associate and 8-entry modified ring buffer architecture using PAs prediction algorithm. It has an average 5.2 IPC_f and branch penalty per branch of 0.54 cycles. This is almost two times better than a mechanism that makes prediction only on the first encountered branch.

If a four-port network is terminated by arbitrary impedances, the conventional methods for even- and/or odd-mode excitation analyses are not available because no symmetry planes exist. Under these conditions, two types of new design equations for asymmetric 3-dB branch-line hybrids are reported. To make sure that the derived design equations are correct and adaptable, simulations were performed under assumed ideal conditions for one type of asymmetric 3-dB branch-line hybrid and a uniplanar branch-line hybrid terminated by 50 Ω, 41.6 Ω, 55.6 Ω and 62.5 Ω was fabricated and measured for another type of asymmetric 3-dB branch-line hybrid.

In this paper, the computational issue in the problem of learning Bayesian belief networks (BBNs) based on the minimum description length (MDL) principle is addressed. Based on an asymptotic formula of description length, we apply the branch and bound technique to finding true network structures. The resulting algorithm searches considerably saves the computation yet successfully searches the network structure with the minimum value of the formula. Thus far, there has been no search algorithm that finds the optimal solution for examples of practical size and a set of network structures in the sense of the maximum posterior probability, and heuristic searches such as K2 and K3 trap in local optima due to the greedy nature even when the sample size is large. The proposed algorithm, since it minimizes the description length, eventually selects the true network structure as the sample size goes to infinity.

An adaptive array has been proposed as a canceller for both inter-symbol interference (ISI) and co-channel interference (CCI). However, it has no path-diversity gain since it selects just one signal correlated to the reference signal. In this paper, a novel interference canceller having sufficient path-diversity gain is proposed. The canceller is characterized by the combined configuration of an adaptive array and an equalizer. In the proposed system, a pre-selecting adaptive array is installed first. By employing a specific training sequence and sampling timing at the receiver during the training period, the perfect correlation between the "desired signal" and "short delayed" is achieved. Therefore, the pre-selecting adaptive array can extract the desired and ISI signals simultaneously, and the cascaded adaptive equalizer can provide the path-diversity gain without degradation by interference. The proposed system achieves a simple configuration and robustness against both ISI and CCI with a sufficient path diversity gain. In computer simulations, average BER characteristics of the proposed system were evaluated in a quasi-static Rayleigh fading channel. The simulation results showed that the system can reduce both long-delayed ISI and CCI efficiently, and that the expected path diversity gain is obtained even with strong CCI. They also showed that the degradation is not so serious when the number of antenna elements is less than that of incoming signals.

One of the ways to execute a processing algorithm in high speed is parallel processing on multiple computing resources such as processors and functional units. To identify the minimum number of computing resources, the most important is the scheduling to determine when each operation in the processing algorithm is executed. Among feasible schedules satisfying all the data dependencies in the processing algorithm, an overlapped schedule can achieve the fastest execution speed for an iterative processing algorithm. In the case of processing algorithms with operations which are executed on some conditions, computing resources can be shared by those conditional operations. In this paper, we propose a scheduling method which derives an overlapped schedule where the required number of computing resources is minimized by considering the sharing by conditional operations.

This paper describes the analysis of integrated optical waveguides using Finite-Difference Time-Domain (FDTD) method, and proposes the design methodology for low loss waveguide components: corner bends and branches. In order to integrate optical waveguides with Si VLSI technologies on a chip, the compact bends or branches are necessary. Since the optical power radiation from a bend or a branch point depends on the waveguide shapes, an accurate analysis of guided wave behavior is required. For the purpose we adopted the FDTD method which can analyze optical waveguides with a large variation of refractive index and arbitrary shape. Proposed design concept is to have all waveguides transmit only the fundamental mode and to design whole waveguides based on the fundamental mode transfer characteristics. For this design concept, waveguide components are required to have not only low radiation loss but also a little mode shift from the fundamental mode. The bend using the double-reflection mirrors and the branch using a slit are proposed for suppressing the mode shift and improving radiation loss. By the FDTD analysis, the following results have been obtained. The radiation loss and mode shift of double reflection bend are 1% and 4%, and those of the slit branch are 2% and 5%, respectively, in 2 µm width waveguide.

This paper investigates the problem of constructing a logical multicasting tree which dispatches data to multiple destinations according to their bandwidth requirements. An optimization problem is formulated to minimize the maximum delay between a sender and multiple receivers. An algorithm of finding the optimum branching locations is presented. Performance analysis from the closed queueing network theory is given to evaluate a multicasting tree network based on this proposed algorithm.

An insertion loss, branching deviation and polarization dependent loss (PDL) as to a 2 N optical splitter using silica-based planar lightwave circuits has been investigated. New key technologies such as (1) a novel wedge type Y-branch, (2) an offset waveguide at the junction between the curved input waveguide and the Y-branch, and (3) low birefringence waveguides due to the appropriate dopant concentration of a cladding, have been devised and incorporated into the splitter. As a result, 2 N optical splitters with low average insertion loss ( 13.2 dB), low branching deviation ( 0.4 dB) and low PDL ( 0.2 dB) have been successfully developed.

This paper describes the design and performance of optical components for in-service fiber testing and monitoring in optical subscriber loops. As the number of test fibers increases, compact and cost-effective components are becoming more important. To meet this need, we have developed a highly-dense hybrid structure for optical couplers and filters, which both play key roles in testing systems. It was realized by utilizing a polyimide-base thin film filter and a waveguide-type wavelength insensitive coupler. This component operates by combining a signal and a test light with a ratio of 80/20% and isolating the test light with a value of 50 dB. The experimental samples were successfully fabricated with an excess loss of 1 dB, a return loss of 40 dB, a plolarization dependent loss (PDL) of 0.3 dB, and good environmental and mechanical stability. We successfully applied the samples to an optical branch module (OBM), and achieved a component density twice that of a conventional module. The optical characteristics of the OBM met our target values. The results we obtained for termination cords incorporating the polyimide-base filter were also satisfactory.

Dynamic Programming based elastic pattern matching method called Branched Reference Rubber String Matching was investigated. As in Rubber String Matching, the reference pattern is represented as a sequence of direction specified vectors and the input pattern as two dimensional dot pattern. In order to improve the coping of topological variations in input pattern, the reference patterns allow partial pattern alternatives and misses. Effect on the recognition time is almost negligible. Experimental results show the effectiveness of the proposed algorithm.

In this paper, we discuss computational methods for obtaining the bifurcation points and the branch directions at branching points of solution curves for the nonlinear resistive circuits. There are many kinds of the bifurcation points such as limit point, branch point and isolated point. At these points, the Jacobian matrix of circuit equation becomes singular so that we cannot directly apply the usual numerical techniques such as Newton-Raphson method. Therefore, we propose a simple modification technique such that the Newton-Raphson method can be also applied to the modified equations. On the other hand, a curve tracing algorithm can continuously trace the solution curves having the limit points and/or branching points. In this case, we can see whether the curve has passed through a bifurcation point or not by checking the sign of determinant of the Jacobian matrix. We also propose two different methods for calculating the directions of branches at branching point. Combining these algorithms, complicated solution curves will be easily traced by the curve tracing method. We show the example of a Hopfield network in Sect.5.

The main aim of device-level global routing is to obtain high-performance detailed routing under various layout constraints. This paper deals with global routing for analog function blocks. For analog LSIs, especially for those operating at high frequency, various layout constraints are specified prior to routing. Those constrainsts must be completely satisfied to achieve the required circuit performance. However, they are sometimes too hard to be solved by any heuristic method even if a problem is small in size. Thus, we propose a method based on the branch-and-bound algorithm, which can generate all possible solutions to find the best one. Unfortunately, the method tends to take a large amount of processing time. In order to defeat the drawbacks by accelerating the process, constraints are classified into two groups: constraints on single nets and constraints between two nets. Therefore our method consists of two parts: in the first part only constraints on single nets are processed and in the second part only constraints between two nets are processed. The method is efficient because many possible routes that violate layout constraints are rejected immediately in each part. This makes it possible to construct a smaller search tree and to reduce processing time. Additionally this idea, all nets processed in the second phase are sorted in the proper order to reduce the number of edges in the search tree. This saves much processing time, too. Experimental results show that our method can find a good global route for hard layout constraints in practical processing time, and also show that it is superior to the well-known simulated annealing method both in quality of solutions and in processing time.

A new approach is described for the datapath scheduling of behavioral descriptions containing nested conditional branches of arbitrary structures. This paper first investigates such a complex scheduling mechanism, and formulates an optimal scheduling problem as a 0-1 integer programming problem such that given a prescribed number of control steps, the total cost of functional units can be minimized. In this formulation, each constraint is expressed in the form of a Boolean function, which is set equal to 1 or 0 according as the constraint is satisfied or not, respectively, and a satisfiability problem is defined by the product of the Boolean functions. A procedure is then described, which intends to seek an optimal solution by means of a branch-and-bound method on a binary decision diagram representing the satisfiability problem. Experimental results are also shown, which demonstrate that our approach is of more practical use than the existing methods.

An efficient algorithm is presented for finding all solutions of piecewise-linear resistive circuits. In this algorithm, a simple sign test is performed to eliminate many linear regions that do not contain a solution. This makes the number of simultaneous linear equations to be solved much smaller. This test, in its original form, is applied to each linear region; but this is time-consuming because the number of linear regions is generally very large. In this paper, it is shown that the sign test can be applied to super-regions consisting of adjacent linear regions. Therefore, many linear regions are discarded at the same time, and the computational efficiency of the algorithm is substantially improved. The branch-and-bound method is used in applying the sign test to super-regions. Some numerical examples are given, and it is shown that all solutions are computed very rapidly. The proposed algorithm is simple, efficient, and can be easily programmed.

In this paper, a novel Y-junction type demultiplexer utilizing a stratified-waveguide configuration in the branching region is proposed for the purpose of improving the extinction ratio. A high extinction ratio of about 20 dB is achieved at 0.6328 µm and 0.83 µm operation wavelengths both for the TE and TM modes. The properties of the new type branchig waveguides which consist of the diffused waveguide and the striploaded waveguide are described to explain the operation principle. Simulation results by the BPM are also shown to check the designed values of the waveguide parameters.