As a future passive optical network (PON) system, the 10 Gigabit Ethernet PON (10G-EPON) has been standardized in IEEE 802.3av. As conventional Gigabit Ethernet PON (GE-PON) systems have already been widely deployed, 1G/10G co-existence technologies are strongly required for the next system. A gated voltage-controlled-oscillator (G-VCO)-based 10-Gb/s burst-mode clock and data recovery (CDR) circuit is presented for a 1G/10G co-existence PON system. It employs two new circuits to improve jitter transfer and provide tolerance to 1G/10G operation. An injection-controlled jitter-reduction circuit reduces output-clock jitter by 7 dB from 200-MHz input data jitter while keeping a short lock time of 20 ns. A frequency-variation compensation circuit reduces frequency mismatch among the three VCOs on the chip and offers large tolerance to consecutive identical digits. With the compensation, the proposed CDR circuit can employ multi VCOs, which provide tolerance to the 1G/10G co-existence situation. It achieves error-free (bit-error rate < 10-12) operation for 10-G bursts following bursts of other rates, obviously including 1G bursts. It also provides tolerance to a 256-bit sequence without a transition in the data, which is more than enough tolerance for 65-bit CIDs in the 64B/66B code of 10 Gigabit Ethernet.

This paper presents a wireless burst modulation/ demodulation method for narrowband ubiquitous communication systems. This method especially suits those systems, whose traffic is especially dominated by short frame bursts. The proposed modulation method provides a preamble-less frame structure with training symbols, which improves both transmission efficiency and burst synchronization performance. Moreover, the proposed demodulation method achieves superior burst synchronization performance in low carrier-to-noise power ratio (CNR) environments by applying a synchronization method that includes symbol timing recovery, slot synchronization, carrier frequency correction and channel tracking. In addition, this paper presents the result of experiments on hardware prototypes of the proposed modulator and demodulator. The basic operation and practical performance of the proposed method is confirmed through testbed studies.

This paper presents a new approach based on current mode circuits for fast and accurate optical level monitoring with wide dynamic range of a gigabit burst-mode laser driver chip. Our proposed solution overcomes the drawbacks that voltage mode implementations show at higher bit rates or in other technologies. The main speed-limiting factor of the level monitoring circuitry is the parasitic capacitance of the back facet monitor photodiode. We propose the use of an active-input current mirror to reduce the impact of this parasitic capacitance. The mirror produces two copies of the photo current, one to be used for the "0" level measurement and another for the "1" level measurement. The mirrored currents are compared to two reference currents by two current comparators. Every reference current needs only one calibration at room temperature. A pattern detection block scans the incoming data for patterns of sufficiently long consecutive 0's or 1's. At the end of such a pattern a valid measurement is present at the output of one of the current comparators. Based on these measurements the digital Automatic Power Control (APC) will adjust the bias (IBIAS) and modulation current (IMOD) setting of the laser driver. Tests show that the chip can stabilize and track the launched optical power with a tolerance of less than 1 dB. In these tests the pattern detection was programmed to sample the current comparators after 5 bytes (32 ns at 1.25 Gbps) of consecutive 1's and 0's. Automatic power control on such short strings of data has not been demonstrated before. Although this laser transmitter was developed for FSAN GPON applications at a speed of 1.25 Gbps upstream, the design concept is generic and can be applied for developing a wide range of burst mode laser transmitters. This chip was developed in a 0.35 µm SiGe BiCMOS process.

This paper proposes a novel synchronization method of jointly estimating symbol frame timing and carrier frequency-offset for Orthogonal Frequency Division Multiplexing (OFDM) signal operating in the burst mode which is usually employed in the wireless LAN communications systems. The proposed method enables a fast and accurate synchronization for the burst mode OFDM signal even under the presence of large frequency-offset, very low C/N and frequency selective fading environments by using only two preamble symbols inserted at the start of every burst frame. This paper presents the various computer simulation results to verify the performance of proposed synchronization methods both for symbol timing and carrier frequency.

A rack-mounted prototype packet switch that makes use of wavelength-division-multiplexing (WDM) interconnect techniques has been developed. The switch has a maximum throughput of 320 Gbit/s. It features a WDM star-based switch architecture, an electrical control circuit layer and a broad-bandwidth optical WDM layer. The basic characteristics of the broad bandwidth WDM layer, such as level diagram, transmission characteristics, 32-wavelength-channel switching, and high-speed optical gating within a 1.6-ns guard time, are described. Experimental results demonstrated that the switch can perform practical self-routing switch operations, such as address-extraction, optical buffering, and filtering for packet speeds of up to 10 Gbit/s. The switch is promising for such applications as a terabit-per-second switching node in future WDM transport networks.

This paper describes methods used in the design of a high speed burst modem applied for mobile communication systems. The modem has burst mode operations including burst mode AGC (automatic gain control), burst mode BTR (bit timing recovery), adaptive equalization, and diversity based on a selection algorithm to achieve a higher performance in multipath fading channels. Moreover, the performance of the burst modem, which is developed using analog signal processing devices, DSPs (digital signal processors), and FPGAs (field programmable gate arrays), is analyzed experimentally. Results show that the modem can suppress irreducible BER values below 1. 0e-6 and attains a 2 dB implicit diversity gain over multipath fading channels modeled by a two-ray impulse response system with independent Rayleigh fading.

This paper presents fully digital high speed (17.6Mb/s) burst modem for Offset Quadrature Phase Shift Keying (OQPSK), which employs novel digital modem VLSICs. The modulator VLSIC directly generates modulated intermediate frequency (IF) signals in a fully digitalized manner. A newly proposed digital reverse-modulation and pre-filtered carrier filter-limiter scheme realizes low power consumption and stable operation in a low Eb/No condition. The demodulator VLSIC also achieves fast bit-timing acquisition in burst mode. Moreover, it supports stable initial burst acquisition by a novel automatic frequency control (AFC) acquisition detector and a digital burst detector. A digital burst automatic gain control (AGC) compensates burst-to-burst level differences without analog circutits. Performance evaluation results show that the new modem achieves satisfactory bit-error-rate performance in severe environments. The developed modem has been employed in a commercial portable earth station for ISDN services and reduces the hardware size to one third that of the conventional one.