We present the recovery of 2.5 Gb/s synchronous 16-point quadrature amplitude modulation data in real-time for an linewidth-times-symbol-duration ratio of 0.00048 after transmission over 1.6 km standard single mode fiber.

We propose a digital carrier recovery loop employing both a frequency detector and a phase detector for M-ary phase shift keying (MPSK) systems. A new frequency error correction function is also derived to increase the acquisition range. It is shown through computer simulation that the proposed scheme can reduce the acquisition time at large frequency offsets, unlike the existing ones.

In this paper, we present a new all-digital carrier recovery loop for high-order quadrature amplitude modulation (QAM) signal constellations. The proposed approach is a blind phase-frequency detector structure that consists of a phase detector, a phase offset estimator, a frequency offset estimator, and a digital control oscillator. Compared to previous related approaches, the proposed algorithm provides a wider acquisition range and a more accurate estimation of frequency and phase offsets. These features are demonstrated by simulation results of the DOCSIS (Data-Over-Cable Service Interface Specifications) cable modem system.

A prototype modem with unequal error protection (UEP) capability was developed using multiple block coded modulation (MBCM). Benefited from its unique structure, MBCM can be used to provide UEP straightforward. We propose a new method to increase the robustness of the carrier recovery process by taking advantage of the MBCM code structure. We also use a frame format to facilitate the synchronization operation. This modem was developed in preparation for the mobile satellite communication experiments using the Engineering Test Satellite of VIII-type (ETS-VIII). In addition of MBCM, some other types of modulation schemes have been implemented in the same modem to enable a range of communication experiments to be performed. The modem can operate at variable data rates. The results of laboratory measurements agreed well with computer simulation results. Typical link budgets based on the parameters of ETS-VIII are also presented.

A non-data aided carrier recovery technique using digital modulation format identification called multi-mode PLL (Phase Locked Loop) is proposed. This technique can be interpreted as a modulation identification method that is robust against static phase and frequency offsets. The performance of the proposed technique is studied and the analytical expressions are derived for the probability of lock detection, acquisition time over AWGN channel in the cases of M-PSK and M-QAM modulations with respect to frequency offset and signal-to-noise ratio.

This letter presents a new approximation algorithm suitable for Taylor series expansion. The algorithm can effectively reduce the approximation error by using only a small number of terms in series expansion. The proposed algorithm can be more easily implemented and has better performance than the conventional Euler approximation algorithm. Also, the approximation performance of the proposed algorithm is compared with direct approaches, such as least-squares and Chebyshev approximation algorithm to show the relative advantages of the proposed algorithm. This letter also presents an application example of the proposed approximation algorithm in carrier recovery of OFDM (Orthogonal Frequency Division Multiplexing) modem.

The present study introduces the adaptive BPF to the BPSK coherent detection system and the characteristic of the resulting system is investigated.

This paper is intended to provide reliable carrier recovery in environments with a very low C/N (carrier-to-noise power ratio). A demodulation scheme using a carrier recovery circuit supported by frame symbols (CRC-PIDS) is proposed. This scheme uses a recovery order of clock, frame, and carrier, which is effective for carrier recovery in a low C/N channel, and enables coherent detection without differential coding. This paper also evaluates the bit-error-rate (BER) performance of the proposed scheme used with a binary PSK signal with a rate-1/3 4-state turbo code. Computer simulation trials show that the BER performance difference between ideal and practical coherent detections is about 0.2 dB, and that carrier recovery is reliable even at a C/N of -4.8 dB.

A complete single chip multi-format Phase Shift Keying (PSK) demodulator ULSI for Japanese BS digital broadcasting is reported. The carrier recovery system shows the pull-in range up to +/-5 MHz. The clock recovery system cancels the poor group delay characteristic and the orthogonality degradation caused by the analog front end, and improves the BER performance by 0.2 dB. Thus the requirement to the analog front end is relaxed. A digital PLL ensures minimum program clock reference jitter in the output data stream, which simplifies jitter management in the succeeding MPEG2 system decoder. It integrates two 8-bit 60 MHz ADCs, 58 MHz VCO, 1 Mbit SRAM and the 450 K-gate FEC-demodulator core. Implementation of 1 Mbit de-interleaver RAM facilitates the use of a low cost receiver. The 8.8 milion transistor chip occupies the 72 mm2 in a 0.25 µm triple-metal CMOS technology.

In this letter, we propose a polarity decision carrier recovery algorithm that is useful for carrier acquisition in high order QAM. The PD (Phase Detector) output and its variance characteristic are mathematically derived and the simulation results are presented. The proposed algorithm shows enhanced acquisition performance especially for large frequency offset.

The characteristics of the decision feedback carrier recovery loop (DFL) for conventional QPSK signaling is evaluated experimentally through measurements of the carrier-to-noise ratio of the regenerated carrier, lock range, acquisition waveforms and bit error rates. The results show that the DFL hardly exhibits inferiority to the ideal synchronization by designing the loop natural frequency adequately small. The DFL is shown superb in carrier tracking.

This paper proposes a novel sequential coherent preambleless demodulator that uses phase signals instead of complex signals in the automatic frequency control (AFC) and carrier recovery circuits. The proposed demodulator employs a phase-combined frequency error detection circuit and dual loop AFC circuit to achieve fast frequency acquisition and low frequency jitter. It also adopts an open loop carrier recovery scheme with a sample hold circuit after the carrier filter to ensure carrier signal stability within a packet. It is shown that the frame error rate performance of the proposed demodulator is superior, by 30%, to that offered by differential detection in a frequency selective Rayleigh fading channel. The hardware size of the proposed demodulator is about only 1/10 that of a conventional coherent demodulator employing complex signals.

We present a receiver structure with joint blind equalization, carrier recovery, and timing recovery. The blind equalizer employs a decomposition transversal filtering technique which can reduce the complexity of convolution to about a half. We analyze the performance surface of the equalizer cost function and show that the global minima correspond to perfect equalization. We also derive proper initial tap settings of the equalizer for convergence to the global minima. We describe the timing recovery and the carrier recovery methods employed. And we describe a startup sequence to bring the receiver into full operation. The adaptation algorithms for equalization, carrier recovery, and timing recovery are relatively independent, resulting in good operational stability of the overall receiver. Some simulation results for cable-modem type of transmission are presented.

In this paper, a transceiver VLSI architecture is proposed for high speed digital CATV modems, which can perform both the QAM and the VSB transmissions. The proposed architecture of all-digital dual-mode QAM/VSB receiver consists of digital AGC, digital demodulator, fractionally spaced blind equalizer and DFE, digital carrier recovery, and symbol timing recovery. Finite word-length simulation results show that the proposed architecture can achieve an SNR 29 dB for both the 64-QAM mode and 8-VSB mode when the 10 bit ADC input signal SNR is 36 dB, and there are 6 kHz of carrier frequency offset, 110 ppm of symbol rate offset, and -82 dBc carrier phase-jitter at 10 kHz away from the nominal carrier frequency.

This paper proposes a differentially-coded-quadrature-phase-shift-keying (DQPSK) coherent demodulator using a new simultaneous carrier and bit-timing recovery scheme (SCBR). The new DQPSK SCBR (DSCBR) scheme works with a frequently used preamble, whose baseband signal alternates between two diagonal decision points, for example, a repeated bit-series of "1001." With the DSCBR scheme, the proposed demodulator achieves a significantly agile carrier and bit-timing recovery using an open-loop approach with a one-part preamble. To illustrate this, a preamble of 8 symbols is applicable with the Eb/No degradation from the theory over AWGN of 0.2 dB. It is also shown that the proposed demodulator achieves an improvement in the required Eb/No of more than 2 dB over differential detection over Ricean fading communication channels. The channels are modeled for wireless broadband communication systems with directional antennas or line of sight (LOS) paths. This paper concludes that the proposed demodulator is a strong candidate for receivers in wireles broadband communication systems.

This paper presents a new offset-quadrature-phase-shift-keying (OQPSK) coherent demodulation scheme for wireless asynchronous transfer mode (WATM) systems that premise the Ricean fading communication channels (e.g., typically with derectional antennas). The presented demodulator is basically advanced from a simultaneous carrier and bit-timing recovery (SCBR) scheme by newly employing a phase compensated filter and a reverse-modulation scheme for OQPSK. This advancement aims to enhance the carrier phase tracking performance against the phase fluctuation due to the fading and/or the phase rotation caused by the carrier frequency error of the oscillator. Design consideration and performance evaluation of the demodulator are extensively carried out under Ricean fading channels typical of the WATM systems as well as additive white Gaussian noise (AWGN) channels. The evaluation ressults show that the advanced SCBR (ASCBR) scheme achieves a bit-error-rate/cell-error-rate (BER/CER) performance close to ideal coherent detection with a considerably short preamble, e.g., 8 symbols. Specifically, compared with differential detection (evaluated for QPSK with the hard-wired clock), the new coherent demodulator achieves a significant required Eb/No improvement, which becomes larger as the fading condition degrades. This paper concludes that the ASCBR scheme is a strong candidate for the Ricean-fading-premise WATM systems.

In bandlimited QPSK and QAM transmission systems, phase jitter occurs in the output of a carrier recovery circuit that uses a fourth-power multiplier. To analyze the phase jitter, an exact expression was derived for the autocorrelation function and power spectral density for the case in which bandlimited Gaussian noise and a QPSK or QAM signal with random modulation and arbitrary waveform are simultaneously applied to the fourth-power multiplier. Using this expression, the rms phase jitter of the recovered carrier in root-cosine-rolloff transmission systems for QPSK, 16QAM, 64QAM and 256QAM was calculated. It was shown that the conventional theories for rectangular waveforms are special cases of our theory.

This paper proposes a new simultaneous carrier and bit-timing recovery (CBR) scheme for offset quadrature phase shift keying (O-QPSK) for agile acquisition over satellite communication channels. The proposed simultaneous CBR scheme employs a preamble shared for the carrier and bit-timing recover, which has a specific bit-pattern designed so that its baseband signal alternates between two adjacent decision points at the symbol rate. Using the preamble, the proposed simultaneous CBR scheme estimates the carrier phase and the bit-timing, simultaneously and independently, by open-loop approach. For comparison, this paper also describes the performance and configuration of a joint carrier and bit-timing recovery scheme, which is expanded for O-QPSK from the one conventionally proposed for QPSK. This paper demonstrates with simulation results that the proposed simultaneous CBR scheme significantly improves the agility of acquisition: a mere 30-symbol preamble is sufficient for low-Eb/No channels typical of satellite communication systems. The proposed CBR scheme is also advantageous from the viewpoint of digital implementation: it processes at 2 samples/symbol and eliminates an analog voltage control clock (VCC). The proposed simultaneous CBR scheme is a strong candidate for TDMA systems that require the high data-transmission and frequency utilization efficiency.

To realize better bit error rate performance in fast fading environments, this paper proposes the open loop reverse modulation carrier recovery scheme which employs a new open loop carrier extractor and regenerator instead of using a feed back loop. The proposed scheme realizes stable regenerated carrier signals to achieve low bit error rate not only under additive white Gaussian noise environments but also under fast fading environments. Computer simulations clarify that the proposed scheme always achieves better bit error rates than conventional differential detection or coherent detection with feed back loops under the various fading environments examined.

This paper describes reverse modulation carrier recovery with a tank-limiter for Offset QPSK (OQPSK) burst signals. Acquisition performance is discussed taking into account hardware implementation errors in the carrier recovery circuit. The results indicate hardware implementation errors cause a significant recovered carrier phase error during BTR (Bit Timing Recovery) of OQPSK burst signals. A phase error reduction technique by modifying the BTR code for OQPSK burst signals is proposed to improve the acquisition performance. Computer simulation and hardware experiments confirmed its improvement. The performance of a prototype OQPSK burst demodulator using the proposed carrier recovery scheme is also presented.