A high-attenuation waveguide filter using electromagnetic bandgap (EBG) substrates is introduced. With a simple design modification on the EBG covers, the waveguide filter produced an almost full Ku-band rejection bandwidth showing better than 20 dB input-to-output isolation from 12.3 to 17.2 GHz.

This letter mathematically proves that the performance of the new protocol in Ref. [1] is better than that of the existing protocol. It was proposed that a frame from an access device is delivered over the access link and then it is multiplexed and packed into ATM cell at an access node and then the cell is carried toward a voice gateway, by using a method to split two sublayers in AAL2. That means one sublayer is implemented at the subscriber access device and the other sublayer is implemented at the access node. Access devices using the protocol achieve higher utilization of CID and waste fewer ATM resource per the access device. Mathematical analysis is performed on the proposed and existing protocol, and both upstream cell rate and padding probability are calculated. The proposed protocol shows lower upstream traffic rate and padding cell probability than the existing protocol.

In this paper, an energy-collection-based non-coherent IR-UWB receiver allowing low complexity and low power consumption is proposed for short range data communication. The proposed receiver consists of an on-the-fly integrator, a 1-bit digital sampler, a pre-processor and a digital symbol synchronizer. The on-the-fly integrator for energy collection and the 1-bit digital sampler reduce complexity of IR-UWB system. Furthermore, with a simple digital filter in the pre-processing unit, SNR and robustness of the receiver against time-varying channel are enhanced. Also the receiver complexity is diminished by a simple scheme of symbol synchronization based on rough time information about incoming pulses, not requiring exact timing information. The performance of the proposed receiver is simulated based on IEEE 802.15.4a channel model and the algorithms are implemented and verified on a FPGA.

This paper investigates the performance of relative rate (RR) switch algorithms for available bit rate (ABR) flow control in asynchronous transfer mode (ATM) networks. An RR switch can be implemented differently according to the congestion detection and notification methods used. This paper proposes three implementation schemes for an RR switch using various congestion detection and notification methods, and then analyzes the allowed cell rate (ACR) of a source and the queue length at a switch in steady state. The upper and lower bounds for the maximum and minimum queue lengths are also determined for each scheme, respectively, thereby investigating the effects of ABR parameter values on a queue length. Furthermore, a selection method for rate increase factor (RIF) and rate decrease factor (RDF) parameter values is suggested to prevent buffer overflow and underflow.

Bursty and out-of-order tuple arrivals complicate the process of determining contents and boundaries of sliding windows. To process windows over such streams efficiently, we need to address two issues regarding fast tuple insertion and disorder control. In this paper, we focus on these issues to process sliding windows efficiently over disordered data streams.

We fabricated the floating gate for silicon-on-insulator nonvolatile memory devices with In2O3 nano-particles embedded in polyimide insulator. Self-assembled In2O3 nano-particles were created by chemical reaction between the biphenyl dianhydride-p-phenylenediamine polymer precursor and indium films. The particles size and density of In2O3 nano-particles were 7 nm and 61011 cm-2, respectively. The current-voltage and retention time of fabricated device were characterized by using semiconductor parameter analyzer. A significant threshold voltage shift of fabricated nano-floating gate memory devices obtained, because of the charging effects of In2O3 nano-particles. And a memory window measured about 1 V at initial status.

We present the concept of an on-line electric vehicle (OLEV) and its wireless power transfer mechanism and analyze the electromagnetic compatibility characteristics. As magnetic fields transfer 100kW of power to the vehicle, reduction of electromagnetic field (EMF) noise is a critical issue for protection of the human body. Also, with respect to electromagnetic interference (EMI) noise, a proper measurement method has not yet been established for this low frequency high power system. In this paper, low frequency magnetic field shielding methods and application of the shields to the OLEV system are presented. Furthermore, a standard low frequency magnetic field measurement is suggested as an EMI test.

We present an efficient heuristic algorithm to reduce glitch power dissipation in CMOS digital circuits. In this paper, gate sizing is classified into three types and the buffer insertion is classified into two types. The proposed algorithm combines three types of gate sizing and two types of buffer insertion into a single optimization process to maximize the glitch reduction. The efficiency of our algorithm has been verified on LGSynth91 benchmark circuits with a 0.5 µm standard cell library. Experimental results show an average of 69.98% glitch reduction and 28.69% power reduction that are much better than those of gate sizing and buffer insertion performed independently.

We propose an ASK modulator and Antenna driver for multi-standard 13.56 MHz RFID readers and NFC devices. The proposed transmitters of RFID readers and NFC devices consist of ASK modulator, inverting output driving buffer and off-chip antenna with a matching circuit. The ASK modulation depth can easily be controlled by adjusting duty ratio by the delay line circuit. The test chip was fabricated by using a 0.35 µm double poly CMOS process. The measured results demonstrated that the proposed circuit has met the standard specifications.

We have thoroughly investigated the effect of on-chip decoupling capacitors on the simultaneous switching noise (SSN) and the radiated emission. Furthermore, we have successfully demonstrated an efficient design method for on-chip decoupling capacitors on an 8-bit microcontroller without increasing the die size, which results in more than 10 dB of suppressed radiated emission.

The effect of the power/ground plane on the through-hole signal via is analyzed in a viewpoint of a band-stop filter. When the through-hole signal via passes through the power/ground plane, the return current path discontinuity of the through-hole signal via occurs due to the high impedance of the power/ground plane. Since the high impedance is produced by the power/ground plane resonance, it acts as a band-stop filter, which is connected to the signal trace in series. Therefore, the power/ground plane filters off its resonance frequency component by absorbing and reflecting from the signal on the through-hole signal via, and consequently the signal distortion, the power/ground plane noise voltage, and the consequent radiated emission occur. With S-parameter and TDR-TDT measurements, the band-stop effect of the power/ground plane on the through-hole signal via is confirmed. And then, this analysis is applied to the clock transmission through the through-hole signal via to obtain the clearer confirmation. The measurements of the distorted clock waveforms, the induced power/ground plane noise voltages, and the radiated emissions depending on the power/ground plane impedance around the through-hole signal via are shown.

Surface wave distribution over electromagnetic bandgap (EBG) plate is measured and suppression of surface wave propagation over the EBG is investigated. We used a micro current probe that detects H-field strength of the propagating transverse magnetic (TM) microwave up to 6 GHz. By scanning with the probe over the EBG, we visualized surface wave distribution at various frequencies. This visualized map shows that the EBG plate suppresses the surface wave propagation within the bandgap frequency. We utilized this effect for the antenna reflective shield. By combining the EBG with a microstrip patch antenna, this EBG works as a reflective shield and the front-to-backward radiation ratio of antenna is increased. In this experiment, we fabricated three types of shield board; mushroom type of EBG that has hexagonal textured patches connected with via-holes, textured surface without via-holes, and plane metal. By comparing the surface wave distributions and beam patterns of antenna with various shields, we found that the visualized map of TM surface wave gives us direct and intuitive information and helpful tips in designing the EBG reflective shield for patch antenna.

Information diffusion analysis in social networks is of significance since it enables us to deeply understand dynamic social interactions among users. In this paper, we introduce approaches to discovering information diffusion process in social networks based on process mining. Process mining techniques are applied from three perspectives: social network analysis, process discovery and community recognition. We then present experimental results by using a real-life social network data. The proposed techniques are expected to employ as new analytical tools in online social networks such as blog and wikis for company marketers, politicians, news reporters and online writers.

An efficient way to optimize the hardware consumption in a low-voltage ΔΣ modulator for D/A converters is described. The modulator employs a ROM selection scheme for multiplications and the new buffer-and-routing ROM structure to minimize the hardware consumption. Furthermore, a guideline of the power-delay-and-area product (PDAP) for compelling issues such as power dissipation, delay time, and chip area consumption in the modern digital-circuit design is proposed. After the validity of the concept has been proved in comparison with that of the conventional guideline of the power-delay product in several behavioral blocks, it was employed in the circuit design. Fabricated in a standard digital 0.35-µm CMOS technology, the modulator achieves a signal-to-noise ratio (SNR) of 96 dB with an oversampling ratio of 256 under the supply of 2.0 V.

A system based on application of Fuzzy Cognitive Map (FCM) to perform on-line fault diagnosis is presented. The diagnostic part of the system is composed of two diagnostic schemes. The first one (basic diagnostic algorithm) can be considered as a simple transition of Shiozaki's signed directed graph approach to FCM framework. The second one is an extended version of the basic diagnostic algorithm where an important concept, the temporal associative memories (TAM) recall of FCM, is adopted. In on-line application, self-generated fault FCM model generates predicted pattern sequence through the TAM recall process, which is compared with observed pattern sequence to declare the origin of fault. As the resultant diagnosis scheme takes short computation time, it can be used for on-line fault diagnosis of large and complex processes, and even for incipient fault diagnosis. In practical case, since real observed pattern sequence may be different from predicted one through the TAM recall owing to propagation delay between process variables, the time indexed fault FCM model incorporating delay time is proposed. The utility of the proposed system is illustrated in fault diagnosis of a tank-pipe system.

Complex rule conditions are commonly required to describe complicated business semantics. In these cases, efficient condition evaluation is crucial for high performance of active database systems. Most previous works used the incremental evaluation techniques, whose operations are relatively expensive due to the processing based on the exact calculation of the condition expression. In this paper we propose a new filtering technique that effectively identifies false condition in an early stage of condition monitoring. Since the results of condition evaluation tend to be false in most practical cases, an efficient filtering method can highly facilitate fast condition evaluation. The proposed filtering technique is developed based on the new perspective of database state and database operations, i. e. , a vector space model. We first present vector representations of database states, database operations, and complex condition expressions. Then, we propose a filtering method based on the properties of a vector space, called the sphere containment test. Our proposed method determines the truth value of the rule conditions only with the delta vectors maintained in main memory. We compare our method with a typical incremental evaluation method and show that the proposed method can give a significant performance enhancement.

The use of flash memory based storage devices is rapidly increasing, and user demands for high performance are also constantly increasing. The performance of the flash storage device is greatly influenced by cleaning operations of Flash Translation Layer (FTL). Various studies have been conducted to lower the cost of cleaning operations. However, there are limits to achieve sufficient performance improvement of flash storages without help of a host system, with only limited information in storage devices. Recently, SCSI, eMMC, and UFS standards provide an interface for sending semantic information from a host system to a storage device. In this paper, we analyze effects of semantic information on performance and lifetime of flash storage devices. We evaluate performance and lifetime improvement through SA-FTL (Semantic Aware Flash Translation Layer), which can take advantage of semantic information in storage devices. Experiments show that SA-FTL improves performance and lifetime of flash based storages by up to 30 and 35%, respectively, compared to a simple page-level FTL.

This paper presents intelligent memory, a new memory architecture capable of providing efficient lock-free synchronization. In the intelligent memory, a sequence of operations on a shared object associated with that memory module can be processed without any intervention so that an environment for the synchronization can be provided by executing a critical section itself in that memory module. For this, we present a memory architecture for the intelligent memory having minimal instruction set and develop a progtramming model, called Critical Section Procedure (CSP), which consists of shared data structures and operations on them. Intelligent memory is intended to eliminate waste of processing time such as busy waiting in spin lock and the retry due to process contentions in existing lock-free synchronization schemes. Simulation results show that the intelligent memory provides better throughput compared with the spin lock and the existing lock-free synchronization schemes.

This paper presents a methodology with which to construct an equivalent simulation model of closed-loop BCI testing for a vehicle component. The proposed model comprehensively takes the transfer impedance of the test configuration into account. The methodology used in this paper relies on circuit modeling and EM modeling as well. The BCI test probes are modeled as the equivalent circuits, and the frequency-dependent losses characteristics in the probe's ferrite are derived using a PSO algorithm. The measurement environments involving the harness cable, load simulator, DUT, and ground plane are designed through three-dimensional EM simulation. The developed circuit model and EM model are completely integrated in a commercial EM simulation tool, EMC Studio of EMCoS Ltd. The simulated results are validated through comparison with measurements. The simulated and measurement results are consistent in the range of 1MHz up to 400MHz.

With iterative turbo decoding, the reliability of each bit in a frame is not same after some iterations. We propose novel bit-level hybrid automatic repeat request (HARQ) schemes with turbo codes in which only the unreliable bit and its neighboring bits are retransmitted based on the decoding reliability. The proposed bit-level HARQ schemes improve error performance compared with conventional HARQ schemes.