This paper demonstrates an efficient modelling method for artificial materials using digital filtering (DF) techniques. To demonstrate the efficiency of the DF technique it is applied to an electromagnetic bandgap (EBG) structure and a capacitively-loaded loop the so-called, CLL-based metamaterial. Firstly, this paper describes fine mesh simulations, in which a very small cell size (0.10.10.1 mm3) is used to model the details of an element of the structures to calculate the scattering parameters. Secondly, the scattering parameters are approximated with Padé forms and then factorised. Finally the factorised Padé forms are converted from the frequency domain to the time domain. As a result, the initial features in the fine meshes are effectively embedded into a numerical simulation with the DF boundary, in which the use of a coarse mesh is feasible (1,000 times larger in the EBG structure simulation and 680 times larger in the metamaterial simulation in terms of the volumes). By employing the coarse mesh and removal of the dielectric material calculations, the heavy computational burden required for the fine mesh simulations is mitigated and a fast, efficient and accurate modelling method for the artificial materials is achieved. In the case of the EBG structure the calculation time is reduced from 3 hours to less than 1 minute. In addition, this paper describes an antenna simulation as a specific application example of the DF techniques in electromagnetic compatibility field. In this simulation, an electric field radiated from a dipole antenna is enhanced by the DF boundary which models an artificial magnetic conductor derived from the CLL-based metamaterial. As is shown in the antenna simulation, the DF techniques model efficiently and accurately large-scale configurations.

In this paper, an efficient method is proposed to accurately analyze large-scale power/ground (P/G) networks, where inductive parasitics are modeled with the partial reluctance. The method is based on frequency-domain circuit analysis and the technique of vector fitting, and obtains the time-domain voltage response at given P/G nodes. The frequency-domain circuit equation including partial reluctances is derived, and then solved with the GMRES algorithm with rescaling, preconditioning and recycling techniques. With the merit of sparsified reluctance matrix and iterative solving techniques for the frequency-domain circuit equations, the proposed method is able to handle large-scale P/G networks with complete inductive modeling. Numerical results show that the proposed method is orders of magnitude faster than HSPICE, several times faster than INDUCTWISE, and capable of handling the inductive P/G structures with more than 100,000 wire segments.

Bag-of-Visual-Words representation has recently become popular for scene classification. However, learning the visual words in an unsupervised manner suffers from the problem when faced these patches with similar appearances corresponding to distinct semantic concepts. This paper proposes a novel supervised learning framework, which aims at taking full advantage of label information to address the problem. Specifically, the Gaussian Mixture Modeling (GMM) is firstly applied to obtain "semantic interpretation" of patches using scene labels. Each scene induces a probability density on the low-level visual features space, and patches are represented as vectors of posterior scene semantic concepts probabilities. And then the Information Bottleneck (IB) algorithm is introduce to cluster the patches into "visual words" via a supervised manner, from the perspective of semantic interpretations. Such operation can maximize the semantic information of the visual words. Once obtained the visual words, the appearing frequency of the corresponding visual words in a given image forms a histogram, which can be subsequently used in the scene categorization task via the Support Vector Machine (SVM) classifier. Experiments on a challenging dataset show that the proposed visual words better perform scene classification task than most existing methods.

A methodology to automatically convert fixed point data type representations into integer data types for high level synthesis is presented in this work. Our method converts all major C operations using fixed point data types into integer data types, models quantization and overflow modes, type conversion and casting. The conversion rule for each operation is described in detail as well as a regression test environment with 600 test cases to validate the method and to verify the correctness of each conversion compared to the same cases written in SystemC. The test environment converts each test case with fixed point data types into integer data types and synthesizes them with a high level synthesis tool to generate RTL. An RTL simulation is ran and the results in turn compared to the SystemC's OSCI simulation. For all of the 600 test cases the RTL simulation results matched the SystemC results proving that each conversion is accurately modeled. A larger real test case is also presented to validate the conversion method in a complex case.

Substrate noise analysis has become increasingly important in recent LSI design. This is because substrate noise, which affects PLLs, causes jitter that results in timing error. Conventional analysis techniques of substrate noise are, however, impractical for large-scale designs that have hundreds of millions of transistors because the computational complexity is too huge. To solve this problem, we have developed a fast substrate noise analysis technique for large-scale designs, in which a chip is divided into multiple domains and the circuits of each domain are reduced into a macro model. Using this technique, we have designed a processor chip for use in the supercomputer (die size: 20 mm 21 mm, frequency: 3.2 GHz, transistor count: 350M). Computation time with this design is five times faster than that with a 1/3000 scale design using a conventional technique, while resulting discrepancy with measured period jitter is less than 15%.

The precise noise modeling of complementary metal oxide semiconductor image sensor (CMOS image sensor: CIS) is a significant key in understanding the noise source mechanisms, optimizing sensor design, designing noise reduction circuit, and enhancing image quality. Therefore, this paper presents an accurate random telegraph signal (RTS) noise analysis model and a novel quantitative evaluation method in motion picture for the visual sensory evaluation of CIS. In this paper, two main works will be introduced. One is that the exposure process of a video camera is simulated, in which a Gaussian noise and an RTS noise in pinned-photodiode CMOS pixels are modeled in time domain and spatial domain; the other is that a new video quality evaluation method for RTS noise is proposed. Simulation results obtained reveal that the proposed noise modeling for CIS can approximate its physical process and the proposed video quality evaluation method for RTS noise performs effectively as compared to other evaluation methods. Based on the experimental results, conclusions on how the spatial distribution of an RTS noise affects the quality of motion picture are carried out.

Multitude parameters in the design process of a reconfigurable instruction-set processor (RISP) may lead to a large design space and remarkable complexity. Quantitative design approach uses the data collected from applications to satisfy design constraints and optimize the design goals while considering the applications' characteristics; however it highly depends on designer observations and analyses. Exploring design space can be considered as an effective technique to find a proper balance among various design parameters. Indeed, this approach would be computationally expensive when the performance evaluation of the design points is accomplished based on the synthesis-and-simulation technique. A combined analytical and simulation-based model (CAnSO**) is proposed and validated for performance evaluation of a typical RISP. The proposed model consists of an analytical core that incorporates statistics collected from cycle-accurate simulation to make a reasonable evaluation and provide a valuable insight. CAnSO has clear speed advantages and therefore it can be used for easing a cumbersome design space exploration of a reconfigurable RISP processor and quick performance evaluation of slightly modified architectures.

This paper describes a proposed propagation estimation method and TCP/IP-based evaluations for mobile communications employing a stratospheric platform. To estimate a wireless channel, a realistic and detailed description of its physical environment must be accurately defined. Therefore, a building distribution model characterizing the physical environment in areas in Japan is presented. The analyses of the propagation estimation method are based on the "ray-tracing" model. The results from the proposed method are derived depending on elevation and azimuth angles. In order to validate our results, comparisons between the proposed method and our previous measurement are made for a typical semi-urban area in Japan. The comparisons show close agreement between the estimation results and the measurement results. Finally and interestingly, we present communication performance evaluations based on TCP/IP protocol by using the results achieved from our channel estimation with semi-analytical and simulation approach.

The algebra of communicating shared resources (ACSR) is a timed process algebra which extends classical process algebras with the notion of a resource. In analyzing ACSR models, the existing techniques such as bisimulation checking and Hennessy-Milner Logic (HML) model checking are very important in theory of ACSR, but they are difficult to use for large complex system models in practice. In this paper, we suggest a framework to verify ACSR models against their requirements described in an expressive timed temporal logic. We demonstrate the usefulness of our approach with a real world case study.

Inductive effect becomes important for on-chip global interconnects, like the power/ground (P/G) grid. Because of the locality property of partial reluctance, the inverse of partial inductance, the window-based partial reluctance extraction has been applied for large-scale interconnect structures. In this paper, an efficient method of partial reluctance extraction is proposed for large-scale regular P/G grid structures. With a block reuse technique, the proposed method makes full use of the structural regularity of the P/G grid. Numerical results demonstrate the proposed method is able to efficiently handle a P/G grid with up to one hundred thousands wire segments. It is several tens times faster than the window-based method, while generating accurate frequency-dependent partial reluctance and resistance.

We propose a sketch-based modeling system where all user input is performed from a unique viewpoint. The strokes drawn by the user must not then be restricted to the drawing plane: their orientation in the 3D space is automatically determined by the system. The desired surface is reconstructed from a grid made of two groups of similar lines, that are considered co-planar. The orientation of the two sets of planes is determined by assuming that at the intersection of a representative line of each group, those two lines are perpendicular.

The goal of personal-style handwriting synthesis is to produce texts in the same style as an individual writer by analyzing the writer's samples of handwriting. The difficulty of handwriting synthesis is that the output should have the characteristics of the person's handwriting as well as looking natural, based on a limited number of available examples. We develop a synthesis algorithm which produces handwriting that exhibits naturalness based on the probabilistic character model.

Analysis of cascading outages in power systems is important for understanding why large blackouts emerge and how to prevent them. Cascading outages are complex dynamics of power systems, and one cause of them is the interaction between swing dynamics of synchronous machines and protection operation of relays and circuit breakers. This paper uses hybrid dynamical systems as a mathematical model for cascading outages caused by the interaction. Hybrid dynamical systems can combine families of flows describing swing dynamics with switching rules that are based on protection operation. This paper refers to data on a cascading outage in the September 2003 blackout in Italy and shows a hybrid dynamical system by which propagation of outages reproduced is consistent with the data. This result suggests that hybrid dynamical systems can provide an effective model for the analysis of cascading outages in power systems.

For statistical language model training, target domain matched corpora are required. However, training corpora sometimes include both target domain matched and unmatched sentences. In such a case, training set selection is effective for both reducing model size and improving model performance. In this paper, training set selection method for statistical language model training is described. The method provides two advantages for training a language model. One is its capacity to improve the language model performance, and the other is its capacity to reduce computational loads for the language model. The method has four steps. 1) Sentence clustering is applied to all available corpora. 2) Language models are trained on each cluster. 3) Perplexity on the development set is calculated using the language models. 4) For the final language model training, we use the clusters whose language models yield low perplexities. The experimental results indicate that the language model trained on the data selected by our method gives lower perplexity on an open test set than a language model trained on all available corpora.

In this paper, we present a high-performance VC-1 main-profile decoder for high-definition (HD) video applications, which can decode HD 720p video streams with 30 fps at 80 MHz. We implemented the decoder with a one-poly eight-metal 0.13 µm CMOS process, which contains about 261,900 logic gates and on-chip memories of 13.9 KB SRAM and 13.1 KB ROM and occupies an area of about 5.1 mm2. In designing the VC-1 decoder, we used a template-based SoC design flow, with which we performed the design space exploration of the decoder by trying various configurations of communication channels. Moreover, we also describe architectures of the computation blocks optimized to satisfy the requirements of VC-1 HD applications.

In this paper, we study the end-to-end TCP performance over a path deploying a High-Availability cluster, whose characteristics are highlighted by the failover procedure to remove single-point failure. This paper proposes an approach, called High-Availability Local Recovery (HALR), to enhance TCP performance in the face of a cluster failover. To minimize the latency of retransmission, HALR saves TCP packets selectively and resends them locally after the failover is finished. For better understanding, we further develop simple analytic models to predict the TCP performance in the aspect of flow latency under a range of failover times and the effects of HALR. Using simulation results, we validate our models and show that HALR improves the TCP performance significantly over a failover event as compared with the original TCP. Typically, HALR reduces the flow latency from 4.1 sec to less than 1.9 sec when the failover time equals to 500 ms. The simulation by real packet trace further demonstrates that the memory requirement of the proposed solution is not a concern for modern network equipments.

An adaptive per-survivor processing maximum likelihood sequence estimation (PSP-MLSE) using state-space based recursive least-squares (RLS) is proposed for rapidly time varying multi-path fading channels. Unlike PSP-MLSE using Kalman filtering, it does not require the knowledge of model statistics, and with an aid of state-space modeling, it has a robust performance to the fade rate, compared to PSP-MLSE using conventional RLS.

In this paper, an alternative approach is presented, to design equalizers (or matching networks) with commensurate (or equal length) transmission lines. The new method automatically yields the matching network topology with characteristic impedances of the commensurate lines. In the implementation process of the new technique first, the driving point impedance data of the matching network is generated by tracing a pre-selected transducer power gain shape, without optimization. Then, it is modelled as a realizable bounded-real input reflection coefficient in Richard domain, which in turn yields the desired equalizer topology with line characteristic impedances. This process results in an excellent initial design for the commercially available computer aided design (CAD) packages to generate final circuit layout for fabrication. An example is given to illustrate the utilization of the new method. It is expected that the proposed design technique is employed as a front-end, to commercially available computer aided design (CAD) packages which generate the actual equalizer circuit layout with physical dimensions for mass production.

In this paper, active frequency selective surfaces (FSS) having a squared aperture with a metal plate loading are described. Active FSS elements using switched PIN diodes are discussed with an equivalent circuit model. A unit cell consists of a square aperture element with metal island loading and one PIN diode placed at the upper gap, considering the vertical polarization. The electromagnetic properties of the active FSS structure are changed by applying dc bias to the substrate, and they can be estimated by the equivalent circuit model of the FSS structure and PIN diode. This active FSS design enables transmission to be switched on or off at 2.3 GHz, providing high transmission when the diodes are in an off state and high isolation when the diodes are on. The equivalent circuit model in the structure is investigated by analyzing transmission and reflection spectra. Measurements on active FSS are compared with numerical calculations. The experimentally observed frequency responses are also scrutinized.

This paper proposes a novel approach of constructing statistical preference models for context-aware personalized applications such as recommender systems. In constructing context-aware statistical preference models, one of the most important but difficult problems is acquiring a large amount of training data in various contexts/situations. In particular, some situations require a heavy workload to set them up or to collect subjects capable of answering the inquiries under those situations. Because of this difficulty, it is usually done to simply collect a small amount of data in a real situation, or to collect a large amount of data in a supposed situation, i.e., a situation that the subject pretends that he is in the specific situation to answer inquiries. However, both approaches have problems. As for the former approach, the performance of the constructed preference model is likely to be poor because the amount of data is small. For the latter approach, the data acquired in the supposed situation may differ from that acquired in the real situation. Nevertheless, the difference has not been taken seriously in existing researches. In this paper we propose methods of obtaining a better preference model by integrating a small amount of real situation data with a large amount of supposed situation data. The methods are evaluated using data regarding food preferences. The experimental results show that the precision of the preference model can be improved significantly.