Physics principles of a new type of microwave input amplifiers are described. Cyclotron wave electrostatic amplifier (CWESA) has a low noise level, broad band, switchable gain, super high self-protection against microwave overloads, rapid recovery and small DC consumption. CWESAs are widely used in Russian pulse Doppler radars and other systems.

In this paper, we describe the properties of an external cavity modelocked semiconductor laser with a tunability of wavelength, pulse width and repetition rate. This modelocked laser generates optical pulses with pulse widths down to 180 fs and with repetition rates up to 14 GHz in a 120 nm wavelength range near 1. 55 µm or 1. 3 µm. The generated pulses are close to the transform limit and are therefore suitable for very high speed communication systems. In addition to the tunability, this pulse source is a compact and mechanically stable device. We report on two applications of this pulse source in optical time division multiplexing experiments. In the first example the modelocked laser is used as an all-optical clock recovery. In the second example the modelocked laser was used to characterize an interferometric switch by pump-probe experiments.

Nyberg and Rueppel recently proposed a new EIGamal-type digital signature scheme with message recovery feature and its six variants. The advantage of small signed message length is effective especially in some applications like public key certifying protocols or the key exchange. But two forgeries that present a real threat over such applications are pointed out. In certifying public keys or key exchanges, redundancy is not preferable in order to store or transfer small data. Therefore the current systems should be modified in order to integrate the Nyberg-Ruepple's signature into such applications. However, there has not been such a research that prevents the forgeries directly by improving the signature scheme. In this paper, we investigate a condition to avoid the forgeries directly. We also show some new message recovery signatures strong against the forgeries by adding a negligible computation amount to their signatures, while not increasing the signature size. The new scheme can be integrated into the above application without modifying the current systems, while maintaining the security.

This paper considers a probabilistic model for a database recovery action with checkpoint generations when system failures occur according to a renewal process whose renewal density depends on the cumulative operation period since the last checkpoint. Necessary and sufficient conditions on the existence of the optimal checkpoint interval which maximizes the ergodic availability are analytically derived, and solvable examples are given for the well-known failure time distributions. Further, several methods to be needed for numerical calculations are proposed when the information on system failures is not sufficient. We use four analytical/tractable approximation methods to calculate the optimal checkpoint schedule. Finally, it is shown through numerical comparisons that the gamma approximation method is the best to seek the approximate solution precisely.

We present a novel replication technique for parallel applications where instances of the replicated application are active on different group of processors called replicas. The replication technique is based on the FTAG (Fault Tolerant Attribute Grammar) computation model. FTAG is a functional and attribute based model. The developed replication technique implements "active parallel replication," that is, all replicas are active and compute concurrently a different piece of the application parallel code. In our model replicas cooperate not only to detect and mask failures but also to perform parallel computation. The replication mechanisms are supported by FTAG run time system and are fully application-transparent. Different novel mechanisms for checkpointing and recovery are developed. In our model during rollback recovery only that part of the computation that was detected faulty is discarded. The replication technique takes full advantage of parallel computing to reduce overall computation time.

This paper proposes a differentially-coded-quadrature-phase-shift-keying (DQPSK) coherent demodulator using a new simultaneous carrier and bit-timing recovery scheme (SCBR). The new DQPSK SCBR (DSCBR) scheme works with a frequently used preamble, whose baseband signal alternates between two diagonal decision points, for example, a repeated bit-series of "1001." With the DSCBR scheme, the proposed demodulator achieves a significantly agile carrier and bit-timing recovery using an open-loop approach with a one-part preamble. To illustrate this, a preamble of 8 symbols is applicable with the Eb/No degradation from the theory over AWGN of 0.2 dB. It is also shown that the proposed demodulator achieves an improvement in the required Eb/No of more than 2 dB over differential detection over Ricean fading communication channels. The channels are modeled for wireless broadband communication systems with directional antennas or line of sight (LOS) paths. This paper concludes that the proposed demodulator is a strong candidate for receivers in wireles broadband communication systems.

We propose a new bit timing recovery (BTR) scheme, what we call Step Sampled BTR (SSBTR), that can lower the sampling clock frequency and shorten the clock phase convergence time, for burst signals in high bit rate wireless access systems. The SSBTR scheme has the following characteristics. A sine wave resulting from the BTR code passing through a Nyquist Transmission System is always used, the sampling clock has a lower frequency than the system clock, and the clock phase of Intermediate Frequency (IF) signal input can be estimated from as few as 3 sampled data. The SSBTR scheme corrects the clock phase only once in a burst signal. Therefore, in some wireless access systems, some kind of operation must be performed after the SSBTR, in order to deal with long burst signals, instability of the system clock, and so on. In other wireless access systems that do not have these problems, clock phase can be fixed by the SSBTR scheme alone. The preformance of the SSBTR scheme with respect to additive white Gaussian noise (AWGN) was examined by computer simulation. In addition, when SSBTR is implemented in hardware, there are imperfections in the circuitry that lead to phase estimation error and thus deterioration, so we studied the effects of several such imperfections by computer simulation. The results of these simulations clarify the performance of the SSBTR scheme.

We present a comparison of correlated failures for multiversion software using community error recovery (CER) and software breeding (SB). In CER, errors are detected and recovered at checkpoints which are inserted in all the versions of the software. SB is analogous to the breeding of plants and animals. In SB, versions consist of loadable modules, and a driver exchanges the modules between versions to detect and eliminate faulty modules. We formulate reliability models to estimate the probability of failure for software using either CER or SB. Our reliability models assume failures in the checkpoints in CER and the driver in SB. We use beta-binomial distribution for modeling correlated failures of versions, because much of the evidence suggests that the assumption that failures in versions occur independently is not always true. Our comparison indicates that multiversion software using SB is more reliable than that using CER when the probability of failure in the checkpoints in CER or the driver in SB is 10-7.

This paper presents a new offset-quadrature-phase-shift-keying (OQPSK) coherent demodulation scheme for wireless asynchronous transfer mode (WATM) systems that premise the Ricean fading communication channels (e.g., typically with derectional antennas). The presented demodulator is basically advanced from a simultaneous carrier and bit-timing recovery (SCBR) scheme by newly employing a phase compensated filter and a reverse-modulation scheme for OQPSK. This advancement aims to enhance the carrier phase tracking performance against the phase fluctuation due to the fading and/or the phase rotation caused by the carrier frequency error of the oscillator. Design consideration and performance evaluation of the demodulator are extensively carried out under Ricean fading channels typical of the WATM systems as well as additive white Gaussian noise (AWGN) channels. The evaluation ressults show that the advanced SCBR (ASCBR) scheme achieves a bit-error-rate/cell-error-rate (BER/CER) performance close to ideal coherent detection with a considerably short preamble, e.g., 8 symbols. Specifically, compared with differential detection (evaluated for QPSK with the hard-wired clock), the new coherent demodulator achieves a significant required Eb/No improvement, which becomes larger as the fading condition degrades. This paper concludes that the ASCBR scheme is a strong candidate for the Ricean-fading-premise WATM systems.

This paper focuses on recovering from processor transient faults in pipelined multiprocessor systems. A pipelined machine may employ out of order execution and branch prediction techniques to increase performance, thus a precise computation state would not be available. We propose an efficient scheme to maintain the precise computation state in a pipelined machine. The goal of this paper is to implement checkpointing and rollback recovery utilizing the technique of precise interrupt in a pipelined system. Detailed analysis is included to demonstrate the effectiveness of this method.

In bandlimited QPSK and QAM transmission systems, phase jitter occurs in the output of a carrier recovery circuit that uses a fourth-power multiplier. To analyze the phase jitter, an exact expression was derived for the autocorrelation function and power spectral density for the case in which bandlimited Gaussian noise and a QPSK or QAM signal with random modulation and arbitrary waveform are simultaneously applied to the fourth-power multiplier. Using this expression, the rms phase jitter of the recovered carrier in root-cosine-rolloff transmission systems for QPSK, 16QAM, 64QAM and 256QAM was calculated. It was shown that the conventional theories for rectangular waveforms are special cases of our theory.

This paper describes a new timing circuit design technique for asynchronous burst-mode data transmission such as Fiber-To-The-Home (FTTH). It enables to the handling of asynchronous burst-mode data. Without an external reference clock signal, it can make a quick extraction of clock signal from received data packets using a "gating-timing circuit" and a "burst PLL." The gating-timing circuit employs bit gating for a quick phase response, and the burst PLL employs frame gating for quick frequency adjustment to differences between packets and clock extraction. This circuit has a simple configuration without any external oscillators, which reduces both cost and power. A fabricated 0.5-µm CMOS IC exhibits instantaneous response within one bit for 156 Mb/s asynchronous data packets.

This paper proposes a new simultaneous carrier and bit-timing recovery (CBR) scheme for offset quadrature phase shift keying (O-QPSK) for agile acquisition over satellite communication channels. The proposed simultaneous CBR scheme employs a preamble shared for the carrier and bit-timing recover, which has a specific bit-pattern designed so that its baseband signal alternates between two adjacent decision points at the symbol rate. Using the preamble, the proposed simultaneous CBR scheme estimates the carrier phase and the bit-timing, simultaneously and independently, by open-loop approach. For comparison, this paper also describes the performance and configuration of a joint carrier and bit-timing recovery scheme, which is expanded for O-QPSK from the one conventionally proposed for QPSK. This paper demonstrates with simulation results that the proposed simultaneous CBR scheme significantly improves the agility of acquisition: a mere 30-symbol preamble is sufficient for low-Eb/No channels typical of satellite communication systems. The proposed CBR scheme is also advantageous from the viewpoint of digital implementation: it processes at 2 samples/symbol and eliminates an analog voltage control clock (VCC). The proposed simultaneous CBR scheme is a strong candidate for TDMA systems that require the high data-transmission and frequency utilization efficiency.

The Time-Slicing paradigm is a newly developed method for the training of neural networks for speech recognition. The neural net is trained to spot the syllables in a continuous stream of speech. It generates a transcription of the utterance, be it a word, a phrase, etc. Combined with a simple error recovery method the desired units (words or phrases) can be retrieved. This paradigm uses a recurrent neural network trained in a modular fashion with natural connectionist glue. It processes the input signal sequentially regardless of the input's length and immediately extracts the syllables spotted in the speech stream. As an example, this character string is then compared to a set of possible words, picking out the five closest candidates. In this paper we describe the time-slicing paradigm and the training of the recurrent neural network together with details about the training samples. It also introduces the concept of natural connectionist glue and the recurrent neural network's architecture used for this purpose. Additionally we explain the errors found in the output and the process to reduce them and recover the correct words. The recognition rates of the network and the recovery rates for the words are also shown. The presented examples and recognition rates demonstrate the potential of the time-slicing method for continuous speech recognition.

A very simple but general scheme has been developed to calculate burst error occurrences due to cycle slip in clock recovery on frequency-selective Nakagami-Rice fading channels. The scheme, which we call the "Equivalent Transmission-Path Model," plays a role in connecting "wave propagation" with "digital transmission characteristics" in a general manner. First computer simulations assuming various types of delay profiles identify the "key parameters in Nakagami-Rice fading" that principally dominate the occurrence of cycle slips. Following this a simple method is developed to calculate the occurrence frequency of cycle slips utilizing the nature of the key parameters. Then, the accuracy of the scheme is confirmed through comparison between calculated values and simulation results. Finally, based on the scheme, calculated results on cycleslip occurrences are presented in line-of-sight fading environments.

This paper proposes a fast timing recovery method with a decision feedback equalizer for baudrate sampling. The proposed method features two special techniques. The first one is for coarse estimation of the sampling phase. Internal signals of the oversampled analog-to-digital converter at different phases are directly taken out for parallel evaluation. The second technique provides fine tuning with a phase-modification stepsize which is adaptively controlled by the residual intersymbol interference. Simulation results by a full-duplex digital transmission system with a multilevel line code show superiority of the proposed method. The coarse timing estimation and the fine tuning reduce 75% and 40% of the time required by the conventional method,respectively. The overall saving in timing recovery is almost 60% over the conventional method. The proposed method could easily be extended to other applications with a decision feedback equalizer.

Optical Feedering between Base Stations and Control Station is an effective technique for future microcellular mobile communication systems. The use of Laser Diode (LD) in such a system leads to the generation of intermodulation products, which consequently affect a system performance and ultimately restrain the maximum number of users that the system can serve. The problem becomes further intensified in case of CDMA system which is a candidate for future cellular mobile and personal communication systems. In this paper LD's Nonlinearity compensation technique for Direct Sequence spread spectrum CDMA signals in optical communication system is presented. This technique involves the implementation of a nonlinear block herein after called Post Nonlinearity Recovery Block (PNRB). This block is designed to exhibit the characteristics inverse to those of LD. The block is designed theoretically by deriving the complete expressions for Transfer functions. Some useful results of theoretical investigation of a proposed scheme have been presented, which form the basis for the experimental test system. The work is novel because, (i) Compensation analysis has been carried out for DS-CDMA signals for the first time, and (ii) Compensation has been proposed on the control station instead of base station, which is different from the conventional techniques and offers several additional advantages. Performance of the system with and without PNRB is evaluated by Intermodulation Distortion (IMD) and SNR Analysis. The results show that LDs' nonlinearity distortion level can be compensated to a remarkable extent.

To realize better bit error rate performance in fast fading environments, this paper proposes the open loop reverse modulation carrier recovery scheme which employs a new open loop carrier extractor and regenerator instead of using a feed back loop. The proposed scheme realizes stable regenerated carrier signals to achieve low bit error rate not only under additive white Gaussian noise environments but also under fast fading environments. Computer simulations clarify that the proposed scheme always achieves better bit error rates than conventional differential detection or coherent detection with feed back loops under the various fading environments examined.

This paper describes reverse modulation carrier recovery with a tank-limiter for Offset QPSK (OQPSK) burst signals. Acquisition performance is discussed taking into account hardware implementation errors in the carrier recovery circuit. The results indicate hardware implementation errors cause a significant recovered carrier phase error during BTR (Bit Timing Recovery) of OQPSK burst signals. A phase error reduction technique by modifying the BTR code for OQPSK burst signals is proposed to improve the acquisition performance. Computer simulation and hardware experiments confirmed its improvement. The performance of a prototype OQPSK burst demodulator using the proposed carrier recovery scheme is also presented.

This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low Eb/No environments.