This paper presents an experimental environment of an intelligent tutoring system called EXPITS. In this environment, users learn functions and the structure of the intelligent tutoring system and characteristics of knowledge processing. EXPITS provides facilities for investigating internal processes and internal states of the intelligent tutoring system. These facilities include visualization tools and controllers of internal processes. Because the internal states and behavior of ITS depend on student's understanding states, one cannot get total understanding of ITS without information about student's knowledge states. To solve this problem, we introduce a pseudo student which simulates a human student in order to visualize explicitly all information which affects ITS behavior. Target users of EXPITS are school teachers, who are users of intelligent tutoring systems, university students who are studying artificial intelligence and postgraduate students who are specially studying intelligent tutoring systems. We have designed EXPITS to achieve different learning objectives for these three kinds of users. The learning objective for school teachers is to understand the differnce between intelligent tutoring systems and traditional CAI systems. University students are expected to understand characteristics of knowledge processing and rule based systems. Lastly, EXPITS provides postgraduate students who are studying intelligent tutoring systems with a test bed for examining ability and efficiency of the system in different configurations by changing parameters and by replacing constituents of the system. To achieve these purposes, EXPITS has experimental facilities for the following four themes; relationship between the domain knowledge representation method and teaching activities, the selection method of teaching paradigms, relationship between problem solving processes and teaching activities, and student modeling.

Mean Time Between Failures (MTBF) is an important measure of practical repairable systems, but it has not been obtained for a repairable linear consecutive-k-out-of-n: F system. We first present a general formula for the (steady-state) availability of a repairable linear consecutive-k-out-of-n: F system with nonidentical components by employing the cut set approach or a topological availability method. Second, we present a general formula for frequency of system failures of a repairable linear consecutive-k-out-of-n: F system with nonidentical components. Then the MTBF for the repairable linear consecutive-k-out-of-n: F system is shown by using the frequency of system failure and availability. Lastly, we derive some figures which show the relationship between the MTBF and repair rate µorρ(=λ/µ) in the repairable linear consecutive-k-out-of-n: F system. The figures can be easily used and are useful for reliability design.

With the evolution of semiconductor technology, automotive electronics has made tremendous progress. The aim of automotive electronics is to improve the basic automotive functions of vehicles (running, turning, and stopping) from the standpoint of environmental protection, energy conservation, and transportation efficiency. This paper introduces the process of automotive electronics with an emphasis on major control systems such as engines and brakes. The role of ASICs in automotive control systems is also presented with actual examples of ASICs that are used in these systems.

This letter shows that VEPs can be easily measured by using color cards as the color stimulus, and that the responses evoked by a difference in chroma could be described largely by the value of the first principal component in principal component analysis.

In this article, we consider a hysteresis oscillator which includes periodic thresholds. This oscillator relates to a model of human's sleep-wake cycles. Deriving a one dimensional return map rigorously, we can clarify existence regions of various periodic attractors in some parameter subspace. Also, we clarify co-existence regions of periodic attractors and existence regions of quasi-periodic attractors. Some of theoretical results are confirmed by laboratory measurements.

The ray-tracing algorithm can synthesize very realistic images. However, the ray tracing is very time consuming. To solve this problem, a load balancing strategy using temporal coherence between images in an animation is presented for balancing computational loads among processing elements of a parallel processng system. Our parallel processing model is based on a space subdivision method for the ray-tracing algorithm. A subdivided object space is distributed among processing elements of the parallel system. To clarify the effectiveness of the load balancing strategy, we examine the system performance by computer simulation.

It was more than 10 years ago that the first map navigation system, as an example of invehicle information system, has appeared in the market in Japan. Today's navigation system has been improved to the level that the latest system has 10 micro-processors, 7 MBytes of memories, and 4 GBytes of external data storage for map database. From the viewpoint of the automobile driver, there are still some problems with the system. Major problems in general are a lack of traffic information, better human interface, and a need for cost-reduction. The introduction of application specific ICs (ASICs) is expected to make systems smaller, costless, and give higher speed response. Today's in-vehicle information systems are reviewed function by function to discover what functions need to be implemented into ASICs for future systems, what ASICs will be required, and what technology has to be developed. It is concluded that more integration technology is expected including high parformance CPUs, large capacity memories, interface circuits, and some analog circuits such as DA converter. To develop this technology, some, major problems such as power consumption, number of input/output signals, as well as design aid and process technology are pointed out.

This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.

This paper presents a method for verifying safety property of a communication protocol modeled as two extended communicating finite-state machines with two unbounded FIFO channels connecting them. In this method, four types of atomic formulae specifying a condition on a machine and a condition on a sequence of messages in a channel are introduced. A human verifier describes a logical formula which expresses conditions expected to be satisfied by all reachable global states, and a verification system proves that the formula is indeed satisfied by such states (i.e. the formula is an invariant) by induction. If the invariant is never satisfied in any unsafe state, it can be concluded that the protocol it safe. To show the effectiveness of this method, a sample protocol extracted from the data transfer phase of the OSI session protocol was verified by using the verification system.

Until now, in a communication system which deals with multiple processes, system behavior has been described by a fixed number of processes. The state reachability problem for specified processes was generally deliberated within a pre-defined number of processes, and was analyzed by essentially searching for all possible behaviors. However, in a system whose number of processes is arbitrary, a given state which is not reachable in some situations which consists of a small number of processes might be reachable in another situation which consists of a larger number of processes. This article discusses the above problem, assuming that the behavior of a system is described by an arbitrary number of processes. After discussing the relationship between our model and the Petri net model, we clarify the properties between the set of reachable states and the number of processes involved in the system, and show an algorithm to obtain a sufficient number of processes for resolving the reachability problem.

A new automated main distributing frame (AMDF) system is developed that reduces operating costs in metallic-cable main distributing frames (MDFs) used for communication networks. In this AMDF system, a robot inserts connecting-pins into the crosspoint holes of matrix-boards. This process allows jumpering to be completed within three minutes and the route-setting for line testing within one minute. The AMDF system provides approximately 2,100 office equipment cable-terminals. Parallel installation of several AMDF systems allows larger MDF systems to be constructed. This system reduces costs and achieves high reliability through three new technologies: high-density matrix-board, precision pin-handling, and a highly reliable system control. Test results for a prototype AMDF system confirm their effectiveness.

A text-to-speech conversion system for Japanese has been developed for the purpose of producing high-quality speech output. This system consists of four processing stages: 1) linguistic processing, 2) phonological processing, 3) control parameter generation, and 4) speech waveform generation. Although the processing at the first stage is restricted to the texts on general weather conditions, the other three stages can also cope with texts of news and narrations on other topics. Since the prosodic features of speech are largely related to the linguistic information, such as word accent, syntactic structure and discourse structure, linguistic processing of a wider range than ever, at least a sentence, is indispensable to obtain good quality speech with respect to the prosody. From this point of view, input text was restricted to the weather forecast sentences and a method for linguistic processing was developed to conduct morpheme, syntactic and semantic analyses simultaneously. A quantitative model for generating fundamental frequency contours was adopted to make a good reflection of the linguistic information on the prosody of synthetic speech. A set of prosodic rules was constructed to generate prosodic symbols representing prosodic structures of the text from the linguistic information obtained at the first stage. A new speech synthesizer based on the terminal analog method was also developed to improve the segmental quality of synthetic speech. It consists of four paths of cascade connection of pole/zero filters and three waveform generators. The four paths are respectively used for the synthesis of vowels and vowel-like sounds, nasal murmur and buzz bar, friction, and plosion, while the three generators produce voicing source waveform approximated by polynomials, white Gaussian noise source for fricatives and impulse source for plosives. The validity of the approach above has been confirmed by the listening tests using speech synthesized by the developed system. Improvements both in the quality of prosodic features and in the quality of segmental features were realized for the synthetic speech.

In this paper the two different paradigms for the design of responsive, i.e., distributed fault-tolerant real-time systems, the event-triggered (ET) approach and the time-triggered (TT) approach, are analyzed and compared. The comparison focuses on the temporal properties and considers the issues of predictability, testability, resource utilization, extensibility, and assumption coverage.

Space-time tradeoff is a very fundamental issue to design a fault-tolerant real-time (called responsive) system. Routing a message in large computer networks is efficient when each node knows the full topology of the whole network. However, in the hierarchical routing schemes, no node knows the full topology. In this paper, a tradeoff between an optimality of path length (message delay: time) and the amount of topology information (routing table size: space) in each node is presented. The schemes to be analyzed include K-scheme (by Kamoun and Kleinrock), G-scheme (by Garcia and Shacham), and I-scheme (by authors). The analysis is performed by simulation experiments. The results show that, with respect to average path length, I-scheme is superior to both K-scheme and G-scheme, and that K-scheme is better than G-scheme. Additionally, an average path length in I-scheme is about 20% longer than the optimal path length. On the other hand, for the routing table size, three schemes are ranked in reverse direction. However, with respect to the order of size of routing table, the schemes have the same complexity O (log n) where n is the number of nodes in a network.

The emerging discipline of responsive systems demands fault-tolerant and real-time performance in uniprocessor, parallel, and distributed computing environments. The new proposal for responsiveness measure is presented, followed by an introduction of a model for responsive computing. The model, called CONCORDS (CONsensus/COmputation for Responsive Distributed Systems), is based on the integration of various forms of consensus and computation (progress or recovery). The consensus tasks include clock synchronization, diagnosis, checkpointing scheduling and resource allocation.

This paper proposes a group-to-group communications algorithm that can extend the range of distributed systems where we can achieve active replication fault-tolerance to partner model distributed systems, in which all processes communicate with each other on an equal footing. Active replication approach, in which all replicated processes are active, can achieve fault-tolerance with low overhead because checkhpoint setting and rollback are not required for recovery from process failure. This algorithm guarantees that each replicated process in a process group has the same execution history and that communications between process groups keeps consistency even in the presence of process failure and message loss. The number of control messages that must be transmitted between processes for a communication between process groups is only a linear order of the number of replicated processes in each process group. Furthemore, this algorithm reduces the overhead for reconfiguration of a process group by keeping process failure and recovery information local to each process group.

A responsive network architecture is essential in future open distributed systems. In this paper, a framework that provides the foundations for a responsive network architecture for an internetworking environment is proposed. It is called the Virtually Separated Link (VSL) model. By incorporating this framework, communication of both data and control information can be completed in bounded time. Consequently, a protocol can initiate a recovery mechanism in bounded time, or allow an application to do the same. Its functionalities augment existing resource reservation protocols that support multimedia communication. An overview of a real-time network protocol that is based on this framework is also presented.

A new concept for a positioning satellite system based on a new satellite constellation has been studied. The system needs a minimum of four satellites injected into quasi-geostationary orbit (QGEO) with high inclination. Due to the QGEO characteristic, the satellites are orbiting within continuous visibility range of ground control stations (GCS), from which the satellite time is controlled through the link connections of the feeder and the intersatellite communication (ISC). Consideration is made for the required high accuracy and quality checks against malfunction, wherever the satellites may be positioned. The orbit data processing function, another major function, is performed independently of the time control. The case of global coverage attained by twelve satellites has been studied in this paper. When a constellation of satellites for a global navigation satellite system (GNSS) is designed, conditions to obtain a good geometric dilution of precision (GDOP) at all places and times should be considered. Therefore, the satellites will be spread out in wide directions and are in an asymmetrical arrangement when seen by an observer are considered when setting the parameters of the ephemerides of the constellation. Under the restraints of the designed constellation, the GDOP value distribution for a third of the world map with area time parameters is computed and summarized in histograms for the system evaluation.

High speed simulation of neural networks can be achieved through parallel implementations capable of exploiting their massive inherent parallelism. In this paper, we show how this inherent parallelism can be effectively exploited on parallel data-driven systems. By using these systems, the asynchronous parallelism of neural networks can be naturally specified by the functional data-driven programs, and maximally exploited by pipelined and scalable data-driven processors. We shall demonstrate the suitability of data-driven systems for the parallel simulation of neural networks through a parallel implementation of the widely used back propagation networks. The implementation is based on the exploitation of the network and training set parallelisms inherent in these networks, and is evaluated using an image data compression network.

One of the most interesting and most analyzed aspects of the CPU design is the instruction set design. How many and which operations to be provided by hardware is one of the most fundamental issues relaing to the instruction set design. This paper describes a novel method that formulates the instruction set design of ASIP (an Application Specific Integrated Processor) using a combinatorial appoach. Starting with the whole set of all possible candidata instructions that represesnt a given application domain, this approach selects a subset that maximizes the performance under the constraints of chip area, power consumption, and functional module sharing relation among operations. This leads to the efficient implementation of the selected instructions. A branch-and-bound algorithm is used to solve this combinatorial optimization problem. This approach selects the most important instructions for a given application as well as optimizing the hardware resources that implement the selected instructions. This approach also enables designers to predict the perfomance of their design before implementing them, which is a quite important feature for producing a quality design in reasonable time.