We have investigated the microwave-detected photoconductivity responses from the amorphous In--Ga--Zn--O (a-IGZO) thin films. The time constant extracted by the slope of the slow part of the reflectivity signals are correlated with TFT performances. We have evaluated the influences of the sputtering conditions on the quality of a-IGZO thin film, as well as the influences of gate insulation films and annealing conditions, by comparing the TFT characteristics with the microwave photoconductivity decay ($mu$-PCD). It is concluded that the $mu$-PCD is a promising method for in-line process monitoring for the IGZO-TFTs fabrication.

This report describes a crystallization method we developed for amorphous (a)-Si film by using 405-nm laser diodes (LDs). The proposed method has been used to fabricate bottom gate (BG) microcrystalline (µc)-Si TFTs for the first time. A µc-Si film with high crystallinity was produced and high-performance BG µc-Si TFTs with a field effect mobility of 3.6 cm2/Vs and a current on/off ratio exceeding 108 were successfully demonstrated. To determine the advantages of a 405-nm wavelength, a heat flow simulation was performed with full consideration of light interference effects. Among commercially available solid-state lasers and LDs with wavelengths having relatively high optical absorption coefficients for a-Si, three (405, 445, and 532 nm) were used in the simulation for comparison. Results demonstrated that wavelength is a crucial factor for the uniformity, efficiency, and process margin in a-Si crystallization for BG µc-Si TFTs. The 405-nm wavelength had the best simulation results. In addition, the maximum temperature profile on the gate electrode through the simulation well explained the actual crystallinity distributions of the µc-Si films.

The electrical properties of poly-Si thin film transistors (TFTs) using rapid thermal annealing with various gate oxide thicknesses were studied in this work. It was found that Poly-Si TFT electrical characteristics with the thinnest gate oxide thickness after RTA treatment exhibits the largest performance improvement compared to TFT with thick oxide as a result of the increased incorporated amounts of the nitrogen and oxygen. Thus, the combined effects can maintain the advantages and avoid the disadvantages of scaled-down oxide, which is suitable for small-to-medium display mass production.

We have fabricated the transparent bottom gate and top gate TFTs using new oxide material of Al-Zn-Sn-O (AZTO) as an active layer. The AZTO active layer was deposited by RF magnetron sputtering at room temperature. Our novel TFT showed good TFT performance without post-annealing. The field effect mobility and the sub-threshold swing were improved by the post-annealing, and the mobility increased with SnO2 content. The AZTO TFT (about 4 mol% AlOx, 66 mol% ZnO, and 30 mol% SnO2) exhibited a mobility of 10.3 cm2/Vs, a turn-on voltage of 0.4 V, a sub-threshold swing of 0.6 V/dec, and an on/off ratio of 109. Though the bottom gate AZTO TFT showed good electrical performance, the bias stability was relatively poor. The bias stability was significantly improved in the top gate AZTO TFT. We have successfully fabricated the transparent AMOLED panel using the back-plane composed with top gate AZTO TFT array.

The TFT-LCD image has non-uniform brightness that is the major difficulty of finding the visible defect called Mura in the field. To facilitate Mura detection, background signal shading should level off and Mura signal must be amplified. In this paper, Mura signal amplification and background signal flattening method is proposed based on human visual system (HVS). The proposed DC normalized contrast sensitivity function (CSF) is used for the Mura signal amplification and polynomial regression (PR) is used to level off the background signal. In the enhanced image, tri-modal thresholding segmentation technique is used for finding Dark and White Mura at the same time. To select reliable defect, falsely detected invisible region is eliminated based on Weber's Law. By the experimental results of artificially generated 1-d signal and TFT-LCD image, proposed algorithm has novel enhancement results and can be applied to real automated inspection system.

We demonstrate a novel display structure for color electronic paper for the first time. Fully transparent amorphous oxide TFT array is directly deposited onto color filter array and combined with E Ink Imaging Film. Taking advantage of the transparent property of the oxide TFT, the color filter and TFT array are positioned at the viewing side of the display. This novel "Front Drive" display structure facilitates the alignment of the color filter and TFT dramatically.

In this paper, we describe an accelerative current-programming method for active matrix OLED (AM-OLED) display. This new method uses common source configuration, "Acceleration Control" line and some mechanisms to prevent the programming current from flowing through OLED device. It would solve the basic problem of the current-programming pixel circuit: a long programming period, especially at the dark gray-level. The proposed method accelerates the current programming process at any gray levels, and it would be the solution for the problem.

We investigated the electrical properties of hole transport materials such as TPD, α-NPD and m-MTDATA using in-situ field effect measurement. TPD, α-NPD and m-MTDATA films showed p-type semiconducting properties, and their electrical parameters such as conductivity, carrier mobility and carrier concentration were obtained. We also examined the effect of the substrate temperature during vacuum deposition and the thermal treatment after deposition, on the electrical parameters of the films. Experimental results showed that conductivity and carrier mobility decreased as the substrate temperature increased over the glass transition temperature. These decreases in conductivity and carrier mobility as a result of thermal treatment appear to be strongly related to the degradation mechanism of organic electroluminescent devices.

Amorphous silicon thin film transistors(a-Si TFTs) with a channel-etched structure were fabricated. The key technologies to realize these simple-process TFTs were 1) fabricating data lines and pixel electrodes of indium tin oxide(ITO); 2) carrying out tapered dry etching of plural layers of the a-Si and gate insulator silicon nitide; and 3) forming silicide layer to reduce the contact resistance between the phosphorousdoped a-Si and ITO. Excellent image quality, with a high contrast ratio of more than 100: 1, was obtained for video graphic array(VGA) mode TFT-LCDs using a dot inversion driving method. Furthermore, the transmission distribution was uniform with less than a 4.5% deviation on the whole display area although the ITO data line resistances were as large as 120 kΩ per line.

We report recent progress in the development of Liquid Crystal(LC) materials for the TN-TFT and ECB-TFT technologies, which require LC materials with positive and negative dielectric anisotropy, respectively. Many kinds of new LC materials have been synthesized and have been evaluated based on their fundamental physical properties. We have succeeded in identifying new LC materials, and developing new LC mixtures based on those, so that the current typical requirements of TFT-LCDs e.g. fast switching times, low power consumption, good viewing angles and wide operation temperature ranges together with high reliability can be fulfilled.

A new evaluation technique of hot carrier degradation is proposed and applied to practical evaluation of p-channel polycrystalline silicon thin film transistors (TFT). The proposed technique introduces emission microscopy which is particularly effective for evaluating TFT devices. We have developed an automatic measurement system in which measurement of the electrical characteristics and monitoring the photo emission are done simultaneously. Using this system, we have identified the dominant mechanism of hot carrier degradation in TFTs, and evaluated the effect of plasma hydrogenation on hot carrier degradation.

Transmittance distribution along a horizontal line in LCDs addressed by amorphous silicon TFTs was investigated using measurements and calculations. Nonuniformity of the distribution, in which the transmittance increased with increasing distance from the left edge of the LCD, was observed in a 10 inch diagonal TFT-LCD. The cause of the nonuniformity was attributed to the decrease in voltage drop due to the gate source parasitic capacitance and the increase in gate voltage fall time due to large line resistance, based on the measurements of voltage drops in TFT test elements and calculations considering the decrease in voltage drop. The distribution could be improved by reducing the line resistance and parasitic capacitance in the actual LCD.