IEICE TRANSACTIONS on Electronics
High-Frequency Precise Characterization of Intrinsic FinFET Channel
Summary :
This paper presents a precise characterization of high-frequency characteristics of intrinsic channel of FinFET. For the de-embedding of the parasitics attached to the source, drain and gate terminals, it proposes special calibration patterns which can place the reference surface just beside the intrinsic part of the FinFET. It compares the measured S parameter data up to 40 GHz with the device simulation and shows good matching. The experimental data of the through pattern also confirms the accuracy of the de-embedded parasitics and extracted intrinsic part of FinFET.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E95-C No.4 pp.752-760
- Publication Date
- 2012/04/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E95.C.752
- Type of Manuscript
- PAPER
- Category
- Semiconductor Materials and Devices
Authors
Hideo SAKAI
Shinichi O'UCHI
Takashi MATSUKAWA
Kazuhiko ENDO
Yongxun LIU
Junichi TSUKADA
Yuki ISHIKAWA
Tadashi NAKAGAWA
Toshihiro SEKIGAWA
Hanpei KOIKE
Kunihiro SAKAMOTO
Meishoku MASAHARA
Hiroki ISHIKURO
Keyword
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Hideo SAKAI, Shinichi O'UCHI, Takashi MATSUKAWA, Kazuhiko ENDO, Yongxun LIU, Junichi TSUKADA, Yuki ISHIKAWA, Tadashi NAKAGAWA, Toshihiro SEKIGAWA, Hanpei KOIKE, Kunihiro SAKAMOTO, Meishoku MASAHARA, Hiroki ISHIKURO, "High-Frequency Precise Characterization of Intrinsic FinFET Channel" in IEICE TRANSACTIONS on Electronics,
vol. E95-C, no. 4, pp. 752-760, April 2012, doi: 10.1587/transele.E95.C.752.
Abstract: This paper presents a precise characterization of high-frequency characteristics of intrinsic channel of FinFET. For the de-embedding of the parasitics attached to the source, drain and gate terminals, it proposes special calibration patterns which can place the reference surface just beside the intrinsic part of the FinFET. It compares the measured S parameter data up to 40 GHz with the device simulation and shows good matching. The experimental data of the through pattern also confirms the accuracy of the de-embedded parasitics and extracted intrinsic part of FinFET.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.752/_p
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@ARTICLE{e95-c_4_752,
author={Hideo SAKAI, Shinichi O'UCHI, Takashi MATSUKAWA, Kazuhiko ENDO, Yongxun LIU, Junichi TSUKADA, Yuki ISHIKAWA, Tadashi NAKAGAWA, Toshihiro SEKIGAWA, Hanpei KOIKE, Kunihiro SAKAMOTO, Meishoku MASAHARA, Hiroki ISHIKURO, },
journal={IEICE TRANSACTIONS on Electronics},
title={High-Frequency Precise Characterization of Intrinsic FinFET Channel},
year={2012},
volume={E95-C},
number={4},
pages={752-760},
abstract={This paper presents a precise characterization of high-frequency characteristics of intrinsic channel of FinFET. For the de-embedding of the parasitics attached to the source, drain and gate terminals, it proposes special calibration patterns which can place the reference surface just beside the intrinsic part of the FinFET. It compares the measured S parameter data up to 40 GHz with the device simulation and shows good matching. The experimental data of the through pattern also confirms the accuracy of the de-embedded parasitics and extracted intrinsic part of FinFET.},
keywords={},
doi={10.1587/transele.E95.C.752},
ISSN={1745-1353},
month={April},}
Copy
TY - JOUR
TI - High-Frequency Precise Characterization of Intrinsic FinFET Channel
T2 - IEICE TRANSACTIONS on Electronics
SP - 752
EP - 760
AU - Hideo SAKAI
AU - Shinichi O'UCHI
AU - Takashi MATSUKAWA
AU - Kazuhiko ENDO
AU - Yongxun LIU
AU - Junichi TSUKADA
AU - Yuki ISHIKAWA
AU - Tadashi NAKAGAWA
AU - Toshihiro SEKIGAWA
AU - Hanpei KOIKE
AU - Kunihiro SAKAMOTO
AU - Meishoku MASAHARA
AU - Hiroki ISHIKURO
PY - 2012
DO - 10.1587/transele.E95.C.752
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2012
AB - This paper presents a precise characterization of high-frequency characteristics of intrinsic channel of FinFET. For the de-embedding of the parasitics attached to the source, drain and gate terminals, it proposes special calibration patterns which can place the reference surface just beside the intrinsic part of the FinFET. It compares the measured S parameter data up to 40 GHz with the device simulation and shows good matching. The experimental data of the through pattern also confirms the accuracy of the de-embedded parasitics and extracted intrinsic part of FinFET.
ER -
English
