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Hirokazu YAMAKURA Michihiko SUHARA
We have derived the physics-based equivalent circuit model of a semiconductor-integrated bow-tie antenna (BTA) for expressing its impedance and radiation characteristics as a terahertz transmitter. The equivalent circuit branches and components, consisting of 16 RLC parameters are determined based on electromagnetic simulations. All the values of the circuit elements are identified using the particle swarm optimization (PSO) that is one of the modern multi-purpose optimization methods. Moreover, each element value can also be explained by the structure of the semiconductor-integrated BTA, the device size, and the material parameters.
Kazukiyo JOSHIN Kozo MAKIYAMA Shiro OZAKI Toshihiro OHKI Naoya OKAMOTO Yoshitaka NIIDA Masaru SATO Satoshi MASUDA Keiji WATANABE
Gallium nitride high electron mobility transistors (GaN HEMTs) were developed for millimeter-wave high power amplifier applications. The device with a gate length of 80 nm and an InAlN barrier layer exhibited high drain current of more than 1.2 A/mm and high breakdown voltage of 73,V. A cut-off frequency $ extrm{f}_{ extrm{T}}$ of 113,GHz and maximum oscillation frequency $ extrm{f}_{ extrm{max}}$ of 230,GHz were achieved. The output power density reached 1 W/mm with a linear gain of 6.4,dB at load-pull measurements at 90,GHz. And we extracted equivalent circuit model parameters of the millimeter-wave InAlN/GaN HEMT and showed that the model was useful in simulating the millimeter-wave power performance. Also, we report a preliminary constant bias stress test result.
Kosuke KATAYAMA Mizuki MOTOYOSHI Kyoya TAKANO Chen Yang LI Shuhei AMAKAWA Minoru FUJISHIMA
E-band communication is allocated to the frequency bands of 71-76 and 81-86GHz. Radio-frequency (RF) front-end components for E-band communication have been realized using compound semiconductor technology. To realize a CMOS LNA for E-band communication, we propose a gain-boosted cascode amplifier (GBCA) stage that simultaneously provides high gain and stability. Designing an LNA from scratch requires considerable time because the tuning of matching networks with consideration of the parasitic elements is complicated. In this paper, we model the characteristics of devices including the effects of their parasitic elements. Using these models, an optimizer can estimate the characteristic of a designed LNA precisely without electromagnetic simulations and gives us the design values of an LNA when the layout constraint is ignored. Starting from the values, a four-stage LNA with a GBCA stage is designed very easily even though the layout constraint is considered and fabricated by a 65nm LP CMOS process. The fabricated LNA is measured, and it is confirmed that it achieves 18.5GHz bandwidth and over 24.3dB gain with 50.6mW power consumption. This is the first LNA to achieve a gain bandwidth of over 300GHz in the E-band among the LNAs utilizing any kind of semiconductor technologies. In this paper, we have proved that CMOS technology, which is suitable for baseband and digital circuitry, is applicable to a communication system covering the entire E-band.
Hideo SAKAI Shinichi O'UCHI Takashi MATSUKAWA Kazuhiko ENDO Yongxun LIU Junichi TSUKADA Yuki ISHIKAWA Tadashi NAKAGAWA Toshihiro SEKIGAWA Hanpei KOIKE Kunihiro SAKAMOTO Meishoku MASAHARA Hiroki ISHIKURO
This paper presents a precise characterization of high-frequency characteristics of intrinsic channel of FinFET. For the de-embedding of the parasitics attached to the source, drain and gate terminals, it proposes special calibration patterns which can place the reference surface just beside the intrinsic part of the FinFET. It compares the measured S parameter data up to 40 GHz with the device simulation and shows good matching. The experimental data of the through pattern also confirms the accuracy of the de-embedded parasitics and extracted intrinsic part of FinFET.
Eiji HIRAKI Yoshihiko HIROTA Mutsuo NAKAOKA Toshikazu HORIUCHI Yoshitaka SUGAWARA
This paper deals with a simple and practical power loss analysis simulator, which can actually estimate the total power losses of three phase voltage-fed Auxiliary resonant commutation pole snubber assisted soft switching inverter as well as hard-switching inverter. In order to estimate the switching power losses and conduction power losses of switching semiconductor power devices (IGBTs), which are incorporated into the inverters, the proposed practical simulator is making use of feasible switching power loss data tables and conduction power loss data tables, which are accumulated from the measured voltage and current operating waveforms of power semiconductor switching devices. The practical effectiveness of feasible simulation technique and power loss evaluations for power electronic conversion circuits and systems are confirmed by the simulation and experimental results basis under the conditions of soft switching and hard switching sinusoidal PWM schemes.
New physical models, algorithms, and parameters are needed to accurately model emerging silicon-on-insulator (SOI) devices. The modeling approaches for various emerging SOI technologies are discussed in this paper.
Yasushi SHIZUKI Ken ONODERA Fumio SASAKI Kazuhiro ARAI Hiroyuki YOSHINAGA Juichi OZAKI
A compact MMIC power amplifier which delivers P1dB of 25.8 dBm (380 mW) at 40 GHz has been developed. To make the chip width narrower, only one unit block using two parallel HEMTs is applied for a power stage. For achieving broadband interstage matching when using wide gate-width unit devices in the power stage, a new configuration of a unit block which contains a shunt capacitance is proposed.
This paper reports the application results of the state-of-the-art advanced process/device modeling to the 0.13 [µm] CMOS design solution. It has been demonstrated that the S/D-extension junction depth, the well profile, the channel profile and the drive current of the 0.13 [µm] CMOS can be predicted with reasonable accuracy. Further model improvement is required to predict the ΔL and the Vt-Lg characteristics of the devices with the tilted pocket I/I more accurately. It is quite beneficial to construct several design maps by using the state-of-the-art advanced TCAD in a 'carpet bombing' way in the early stage of the development of new generation CMOS.
TCAD (Technology Computer Aided Design) is the simulation of semiconductor processes and devices. Despite twenty years of development, there are still many TCAD skeptics. This paper will discuss some of the problems and limitations of TCAD, present some successful examples of its use, and discuss future simulation needs from a user's perspective. A key point is that the time pressures in modern semiconductor technology development often dictate the use of simple models for approximate results.
Measurement-based mathematical modeling is an attractive approach for simulating, accurately and efficiently, circuits based on active devices from a diverse range of constantly evolving processes and technologies. The principle of the measurement-based approach is that it is often most practical to characterize the device with various high-frequency measurements, and then mathematically transform the data to produce predictive device dynamical models for small-signal (linear) and large-signal (nonlinear) circuit design purposes. There are many mathematical, physical, and measurement considerations, however, that must be incorporated into any sound framework for successful measurement-based modeling. This paper will review some foundations of the subject and discuss some future trends. Review topics include constructing nonlinear constitutive relations from linear data parameterized by operating point and conservation laws including terminal charge conservation and energy conservation. Recent advances and trends will be discussed, such as pulsed I-V and pulsed S-parameter characterization with implications for electro-thermal and dispersive dynamical models, nonlinear wave-form measurements, and the relationship to some black-box behavioral modeling approaches.