Emerging solid state drives (SSDs) based on a next-generation memory technology have been recently released in market. In this work, we call them low-latency SSDs because the device latency of them is an order of magnitude lower than that of conventional NAND flash SSDs. Although low-latency SSDs can drastically reduce an I/O latency perceived by an application, the overhead of OS processing included in the I/O latency has become noticeable because of the very low device latency. Since the OS processing is executed on a CPU core, its operating frequency should be maximized for reducing the OS overhead. However, a higher core frequency causes the higher CPU power consumption during I/O accesses to low-latency SSDs. Therefore, we propose the device utilization-aware DVFS (DU-DVFS) technique that periodically monitors the utilization of a target block device and applies dynamic voltage and frequency scaling (DVFS) to CPU cores executing I/O-intensive processes only when the block device is fully utilized. In this case, DU-DVFS can reduce the CPU power consumption without hurting performance because the delay of OS processing incurred by decreasing the core frequency can be hidden. Our evaluation with 28 I/O-intensive workloads on a real server containing an Intel® Optane™ SSD demonstrates that DU-DVFS reduces the CPU power consumption by 41.4% on average (up to 53.8%) with a negligible performance degradation, compared to a standard DVFS governor on Linux. Moreover, the evaluation with multiprogrammed workloads composed of I/O-intensive and non-I/O-intensive programs shows that DU-DVFS is also effective for them because it can apply DVFS only to CPU cores executing I/O-intensive processes.

This paper presents the design and implementation of a quadrature voltage-controlled ring oscillator with the improved figure of merit (FOM) using the four single-ended inverter topology. Furthermore, a new architecture to prevent the latch-up in even number of stages composed of single-ended ring inverters is proposed. The design is implemented in 0.18 µm CMOS technology and the measurement results show a FOM of -163.8 dBc/Hz with the phase noise of -125.8 dBc/Hz at 4 MHz offset from the carrier frequency of 3.4 GHz. It exhibits a frequency tuning range from 1.23 GHz to 4.17 GHz with coarse and fine frequency tuning sensitivity of 1.08 MHz/mV and 120 kHz/mV, respectively.

Rf properties of the coupling circuit between the dc SQUID and the multiturn input coil have been studied in order to investigate the origin of the degradation of the SQUID characteristics due to the input coil. It is pointed out that rf properties of the coupling circuit become important due to the existence of the rf currents generated from Jasephson junctions. The rf properties of the coupling circuit have been measured by using the expanded model of the circuit with Cu electrodes. We observe that resonant structures appear in rf properties of the coupling circuit. This means that the SQUID coil coupled to the input coil can not be expressed by a simple inductance, as is not the case of the isolated SQUID. It is shown that the resonant structures result from the standing wave occurring in the coupling circuit. It is also shown that the resonant structures can be suppressed with the damping resistors. Based on the experimental results, a circuit model of the coupling circuit is obtained, which explains well the experimental results. The obtained results are useful to study the effect of the input coil on SQUID characteristics.

In order to reduce the size of a wireless system, we propose a design theory for the broadband impedance matching circuit which connects an electrically small antenna (ESA) to a semiconductor amplifier. We confirmed its validity for the case of connection between a small slot loop antenna with a small radiation resistance of Ra =0.776 Ω and a semiconductor amplifier with high input impedance of ZL =321-j871 Ω with the aid of the simulations by the electrical circuits using transmission lines as well as the electromagnetic field (EM field) simulator. We also made experiments on this antenna with matching circuits using high temperature superconductor YBCO thin films on MgO substrates.

High phase noise is a common problem in ring oscillators. Continuous conduction of the transistor in an analog tuning method degrades the phase noise of ring oscillators. In this paper, a digital control tuning which completely switches the transistors on and off, and a 1/f noise reduction technique are employed to reduce the phase noise. A 14-bit control signal is employed to obtain a small frequency step and a wide tuning range. Furthermore, multiphase ring oscillator with a sub-feedback loop topology is used to obtain a stable quadrature outputs with even number of stages and to increase the output frequency. The measured DCO has a frequency tuning range from 554 MHz to 2.405 GHz. The power dissipation is 112 mW from 1.8 V power supply. The phase noise at 4 MHz offset and 2.4 GHz center frequency is -134.82 dBc/Hz. The FoM is -169.9 dBc/Hz which is a 6.3 dB improvement over the previous oscillator design.

We propose a design theory of the miniaturized high temperature superconducting (HTS) coplanar waveguide (CPW) bandpass filter (BPF), which is composed of meanderline quarter-wavelength resonator, J- and K-inverters. The J- and K-inverters are realized by using interdigital gap and meander-shape inductor. To evaluate the kinetic inductance of the K-inverter, we fabricate the YBCO resonator connected with K-inverters and redesigned the YBCO filter parameters. Finally, we designed and fabricated the YBCO CPW quarter-wavelength resonator BPF by taking account of the kinetic inductance of the K-inverter. The experimental results are in agreement with the design parameters.

Recently, spiral inductors have widely been used instead of resistors in the design of matching circuits to enhance the thermal noise performance of a wireless transceiver. However, such elements usually have low quality factor (Q) and may encounter the self-resonance in microwave-frequency band which permits its use in higher frequencies, and on the other hand, they occupy the large on-chip space. This paper presents a new design theory for the impedance-matching circuits for a single-chip SiGe BiCMOS receiver front-end for 2.4 GHz-band wireless LAN (IEEE 802.11b). The presented matching circuits are composed of conductor-backed coplanar waveguide (CPW) meander-line resonators and impedance (K) inverter. The prototype front-end receiver is designed, fabricated and tested. A few of the measured results to verify the design theory are presented.

This paper presents the design and implementation of 0.9–4.8 GHz CMOS power amplifier (PA) with improved group delay variation and gain flatness at the same time for UWB transmitters. This PA design employs a two-stage cascade common source topology, a resistive shunt feedback technique and inductive peaking to achieve high gain flatness, and good input matching. Based on theoretical analysis, the main design factor for group delay variation is identified. The measurement results indicate that the proposed PA design has an average gain of 10.2 ± 0.8 dB while maintaining a 3-dB bandwidth of 0.57 to 5.8 GHz, an input return loss |S11| less than -4.4 dB, and an output return loss |S22| less than -9.2 dB over the frequency range of interest. The input 1 dB compression point at 2 GHz was -9 dBm while consumes 30 mW power from 1.5 V supply voltage. Moreover, excellent phase linearity (i.e., group delay variation) of ±125 ps was achieved across the whole band.

This paper presents the design of a second-order and a fourth-order bandpass filter (BPF) for 60 GHz millimeter-wave applications in 0.18 µm CMOS technology. The proposed on-chip BPFs employ the folded open loop structure designed on pattern ground shields. The adoption of a folded structure and utilization of multiple transmission zeros in the stopband permit the compact size and high selectivity for the BPF. Moreover, the pattern ground shields obviously slow down the guided waves which enable further reduction in the physical length of the resonator, and this, in turn, results in improvement of the insertion losses. A very good agreement between the electromagnetic (EM) simulations and measurement results has been achieved. As a result, the second-order BPF has the center frequency of 57.5 GHz, insertion loss of 2.77 dB, bandwidth of 14 GHz, return loss less than 27.5 dB and chip size of 650 µm810 µm (including bonding pads) while the fourth-order BPF has the center frequency of 57 GHz, insertion loss of 3.06 dB, bandwidth of 12 GHz, return loss less than 30 dB with chip size of 905 µm810 µm (including bonding pads).

Dynamic properties of electrical circuits containing a Josephson junction are studied analytically by approximating the sinusoidal current-phase relation by a triangular one. Analytical expressions are obtained for the circuit-parameter dependences of transient voltage waveforms, ac ripples of stationary-state voltage oscillation and minimum currents in several typical circuits, which are shown to be in good agreement with numerical results. It is also shown that these quantities can be well characterized in simple forms in terms of a frequency peculiar to each circuit.

This paper describes ultra-high capacity wavelength-division multiplexed (WDM) transmission technologies for 100-Tbit/s-class optical transport networks (OTNs). First, we review recent advances in ultra-high capacity transmission technologies focusing on spectrally-efficient multi-level modulation techniques and ultra-wideband optical amplification techniques. Next, we describe an ultra-high capacity WDM transmission experiment, in which high speed polarization-division multiplexed (PDM) 16-ary quadrature amplitude modulation (16-QAM), generated by an optical synthesis technique, in combination with coherent detection based on digital signal processing with pilotless algorithms, realize the high spectral efficiency (SE) of 6.4 b/s/Hz. Furthermore, ultra-wideband hybrid optical amplification utilizing distributed Raman amplification (DRA) and C- and extended L-band erbium-doped fiber amplifiers (EDFAs) is shown to realize 10.8-THz total signal bandwidth. By using these techniques, 69.1-Tbit/s transmission is demonstrated over 240-km of pure silica-core fibers (PSCFs). Furthermore, we describe PDM 64-QAM transmission over 160 km of PSCFs with the SE of 9.0 b/s/Hz.

An analytical method to make a trade off between tuning range and differential non-linearity (DNL) for a digitally controlled oscillator (DCO) is proposed. To verify the approach, a 12 bit DCO is designed, implemented in 0.18 µm CMOS technology, and tested. The measured DNL was -0.41 Least Significant Bit (LSB) without degrading other parameters which is the best so far among the reported DCOs.

Properties of the flux-flow type Josephson oscillator coupled to a quasiparticle detector through a planar stripline cavity are investigated in the millimeter wave region. The present coupling scheme is essential for magnetic field isolation between the oscillator and the Josephson rf-devices, as well as filtering of spurious harmonics.

The minimum current of a two-junction SQUID gate has been studied theoretically. An analytical expression for the current-voltage characteristics of the SQUID gate has been obtained, which includes the minimum current of the SQUID gate. Studies have been made of the dependences of the minimum current on parameters of the SQUID gate such as an interlinked magnetic flux, a loop inductance and a resistance. It is shown that the minimum current of the SQUID gate depends strongly on the interlinked magnetic flux, while it becomes the same as that of a single junction in the absence of the magnetic flux. It is also shown that the obtained analytical results agree well with those of computer simulation.

Microwave characteristics of a LiNbO3 optical modulator employing superconductor electrodes (Pb-In-Au) as a transmission line of a traveling signal has been studied experimentally in the temperature range from 300 K to 4.2 K. At frequencies between 8 GHz and 12 GHz it is shown that the obtained modulation efficiency increases as expected from theory when the superconductor undergoes the transition from a normal state to a superconducting state. The present results dumonstrate the possible applications of superconducting electrodes to high performance LiNbO3 optical modulators.

An analytical solution of the London equation for the weakly coupled grain model of high Tc superconducting thin films has been obtained in the case of finite thickness by taking full account of anisotropic conductivities. Using the solution, we provide general expressions for the transmission-line parameters of high Tc superconducting transmission lines. Dependences of the inductance and resistance on the grain size, coupling strength and film thickness have been numerically evaluated and discussed.

This Letter employs transmission-line theory for the impedance-matching circuits for a single-chip power amplifier (PA) and verifies for 5 GHz-band wireless LAN (IEEE 802.11a) applications. The presented matching circuits are composed of conductor-backed coplanar waveguide (CPW) meander-line resonators and impedance (K) inverters. One of the advantages of the presented circuits is that it can save on-chip space occupied by the matching circuits compared to that using the spiral inductors, thus reducing the cost. The prototype chip, which consists of PA and matching circuits, is designed employing the presented theory and fabricated. A few of the measured results to verify the design theory are presented.

We propose the new and highly accurate design theory of the high Tc superconducting (HTS) miniaturized coplanar waveguide (CPW) bandpass filters (BPFs) with highly packed meanderlines. BPFs are designed using the external quality factor (Qe) and coupling constant (k) (Q-k method). These parameters are estimated from the transmission coefficient obtained by the 2.5-dimensional electromagnetic field simulator. Moreover, the Q-k method is compared with the J-b method (designed using admittance inverter and susceptance slope parameter) presented previously; in this way we confirmed that the Q-k method has higher accuracy than the J-b method. We realized the design of a the highly packed meanderline CPW BPF (5 pole, center frequency = 2 GHz, fractional band width = 15 MHz, ripple = 0.1 dB) in a 3.5 mm 8 mm substrate.

A new type of Josephson NDRO memory cell is presented, where a sense gate is coupled directly to the memory part, instead of the conventional magnetic coupling scheme. The memory cell operates without complexity of the sequence of signals, and the operation margin is shown to be 20%.