Genetic algorithms are a general problem-solving technique that has been widely used in computational biology. In this paper, we present a framework to map hierarchical parallel genetic algorithms for protein folding problems onto computational grids. By using this framework, the two level communication parts of hierarchical parallel genetic algorithms are separated. Thus both parts of the algorithm can evolve independently. This permits users to experiment with alternative communication models on different levels conveniently. The underlying programming techniques are based on generic programming, a programming technique suited for the generic representation of abstract concepts. This allows the framework to be built in a generic way at application level and thus provides good extensibility and flexibility. Experiments show that it can lead to significant runtime savings on PC clusters and computational grids.

Direction of arrival (DOA) estimation as a fundamental issue in array signal processing has been extensively studied for many applications in military and civilian fields. Many DOA estimation algorithms have been developed for different application scenarios such as low signal-to-noise ratio (SNR), limited snapshots, etc. However, there are still some practical problems that make DOA estimation very difficult. One of them is the correlation between sources. In this paper, we develop a sparsity-based method to estimate the DOA of coherent signals with sparse linear array (SLA). We adopt the off-grid signal model and solve the DOA estimation problem in the sparse Bayesian learning (SBL) framework. By considering the SLA as a ‘missing sensor’ ULA, our proposed method treats the output of the SLA as a partial output of the corresponding virtual uniform linear array (ULA) to make full use of the expanded aperture character of the SLA. Then we employ the expectation-maximization (EM) method to update the hyper-parameters and the output of the virtual ULA in an iterative manner. Numerical results demonstrate that the proposed method has a better performance in correlated signal scenarios than the reference methods in comparison, confirming the advantage of exploiting the extended aperture feature of the SLA.

High-speed IP address lookup with fast prefix update is essential for designing wire-speed packet forwarding routers. The developments of optical fiber and 100 Gbps interface technologies have placed IP address lookup as the major bottleneck of high performance networks. In this paper, we propose a novel structure named Compressed Multi-way Prefix Tree (CMPT) based on B+ tree to perform dynamic and scalable high-speed IP address lookup. Our contributions are to design a practical structure for high-speed IP address lookup suitable for both IPv4 and IPv6 addresses, and to develop efficient algorithms for dynamic prefix insertion and deletion. By investigating the relationships among routing prefixes, we arrange independent prefixes as the search indexes on internal nodes of CMPT, and by leveraging a nested prefix compression technique, we encode all the routing prefixes on the leaf nodes. For any IP address, the longest prefix matching can be made at leaf nodes without backtracking. For a forwarding table with u independent prefixes, CMPT requires O(logmu) search time and O(mlogmu) dynamic insert and delete time. Performance evaluations using real life IPv4 forwarding tables show promising gains in lookup and dynamic update speeds compared with the existing B-tree structures.

In this paper, a miniaturized absorptive/transmissive radome with switchable passband and wide absorbing band is designed. Pin diodes are loaded on the radome in order to obtain switchable passband and miniaturized unit cells, while the resistor loaded double square loops are used to absorb the incident wave. The total thickness of the radome is only 4.5mm. Its transmission and absorbing properties are verified by both synthetic experiments and measurements in the anechoic chamber. Furthermore, the switchable passband of the radome is also evaluated using a waveguide simulator.

Considering worse-case channel uncertainties, we investigate the robust energy efficient (EE) beamforming design problem in a K-user multiple-input-single-output (MISO) interference channel. Our objective is to maximize the worse-case sum EE under individual transmit power constraints. In general, this fractional programming problem is NP-hard for the optimal solution. To obtain an insight into the problem, we first transform the original problem into its lower bound problem with max-min and fractional form by exploiting the relationship between the user rate and the minimum mean square error (MMSE) and using the min-max inequality. To make it tractable, we transform the problem of fractional form into a subtractive form by using the Dinkelbach transformation, and then propose an iterative algorithm using Lagrangian duality, which leads to the locally optimal solution. Simulation results demonstrate that our proposed robust EE beamforming scheme outperforms the conventional algorithm.

In this paper, a new digital true random number generator based on Cross Feedback Ring Oscillators (CFRO) is proposed. The random sources of CFRO lie in delay variations (jitter), unpredictable transition behaviors as well as metastability. The CFRO is proved to be truly random by restarting from the same initial states. Compared with the so-called Fibonacci Ring Oscillator (FIRO) and Galois Ring Oscillator (GARO), the CFRO needs less than half of their time to accumulate relatively high entropy and enable extraction of one random bit. Only a simple XOR corrector is used to reduce the bias of output sequences. TRNG based on CFRO can be run continuously at a constant high speed of 150Mbps. For higher security, the TRNG can be set in stateless mode at a cost of slower speed of 10Mbps. The total logical resources used are relatively small and no special placement and routing is needed. The TRNG both in continuous mode and in stateless mode can pass the NIST tests and the DIEHARD tests.

In this letter, we focus on the subcarrier allocation problem for device-to-device (D2D) communication in cellular networks to improve the cellular energy efficiency (EE). Our goal is to maximize the weighted cellular EE and its solution is obtained by using a game-theoretic learning approach. Specifically, we propose a lower bound instead of the original optimization objective on the basis of the proven property that the gap goes to zero as the number of transmitting antennas increases. Moreover, we prove that an exact potential game applies to the subcarrier allocation problem and it exists the best Nash equilibrium (NE) which is the optimal solution to optimize the lower bound. To find the best NE point, a distributed learning algorithm is proposed and then is proved that it can converge to the best NE. Finally, numerical results verify the effectiveness of the proposed scheme.

In OFDM based mobile communication systems, channel variation during one symbol period introduces intercarrier interference (ICI). Conventional pilot-aided equalization mitigates the ICI at the price of band inefficiency. On the other hand, the blind or semi-blind equalization method, which utilizes the known statistic properties of the transmitted data, will raise system complexity. In this letter, without bandwidth-consuming pilots, a novel channel estimation and tracking method based on an iterative equalization technique (IET) is proposed. The proposed approach successfully achieves a good compromise between bandwidth efficiency and system complexity, and its validity is demonstrated by numerical simulations, especially for fast fading channel.

This paper describes the evaluation of a fiber-optic reflective displacement sensor that is compensated for variations in light source intensity, pressure, temperature and opacity of ambient medium. Additionally, the distance information is averaged over several points on the target surface, which reduces signal fluctuations due to inhomogeneities. Furthermore, a practical optical fiber reflective sensor model of measuring oil film thickness for thrust bearing is set up in this paper. Actual measurements were made with HEC 3000 tons' thrust bearing and the results were in good agreement with theoretical calculations.

In mobile OFDM systems, sub-carriers orthogonality will be broken due to Doppler shift, and this results in inter-carrier interference (ICI). Many methods have been proposed to compensate for this, however, these methods won't be suitable for fast fading caused by high mobile speed. In this letter, we propose a novel sampling theorem based pilot symbol-aided technique which can not only estimate the channel fading envelope (CFE) accurately under high relative Doppler frequency (RDF) but also achieve lower BER than conventional methods. The validity of the proposed method is demonstrated by computer simulations.

In this paper, we propose a true random number generator (TRNG) exploiting jitter and the chaotic behavior in cross ring oscillators (CROs). We make a further study of the feedback ring architecture and cross-connect the XOR gates and inverters to form an oscillator. The CRO utilizes totally digital logic circuits, and gains a high and robust entropy rate, as the jitter in the CRO can accumulate locally between adjacent stages. Two specific working modes of CRO in which the CRO can work in a consistent state and a free-running state respectively are introduced and analyzed both theoretically and experimentally. Finally, different stage lengths of cross ring true random number generators (CRTRNGs) are tested in different Field Programmable Gate Arrays (FPGAs) and test results are analyzed and compared. Especially, random data achieved from a design of 63-stage CRTRNG in Altera Cyclone IV passes both the NIST and Diehard test suites at a rate as high as 240Mbit/s.

In this paper, we study the spectral efficiency of the uplink multi-user large-scale distributed antenna systems (DAS) with imperfect channel state information. We propose the system model of multi-user DAS and illustrate the necessity of pilot reuse. Then, we derive the sum-rate of the system under pilot contamination. Furthermore, we investigate the asymptotical performance when the number of antennas goes to infinity. To reduce the pilot contamination, we present two novel pilot assignment algorithms to improve the spectral efficiency. Finally, we evaluate our proposed strategies through extensive simulations which show that compared with random pilot reuse, the min-max algorithm shows impressive performance with low complexity.

This paper considers a massive multiple-input-multiple-output (MIMO) relaying system with multi-pair single-antenna users. The relay node adopts maximum-ratio combining/maximum-ratio transmission (MRC/MRT) stratagem for reception/transmission. We analyze the spectral efficiency (SE) and power scaling laws with respect to the number of relay antennas and other system parameters. First, by using the law of large numbers, we derive the closed-form expression of the SE, based on which, it is shown that the SE per user increases with the number of relay antennas but decreases with the number of user pairs, both logarithmically. It is further discovered that the transmit power at the source users and the relay can be continuously reduced as the number of relay antennas becomes large while the SE can maintains a constant value, which also means that the energy efficiency gain can be obtained simultaneously. Moreover, it is proved that the number of served user pairs can grow proportionally over the number of relay antennas with arbitrary SE requirement and no extra power cost. All the analytical results are verified through the numerical simulations.

In this paper, the joint optimization issue of the cooperative precoder design is investigated for the transmission from the cooperative multi-point system to one mobile terminal. Based on the mean squared error minimization criterion, the problem is established for the cooperative precoder design. Unfortunately, this problem cannot be solved due to the block diagonal structure of the whole precoding matrix resulting from the fact that there is no data exchange among multiple base stations. In order to tackle this difficulty, the original problem is converted into an equivalent problem by stacking all of the nonzero entries in the block diagonal matrix into a long column vector. With the equivalent problem, the optimum solution is obtained in a closed-form expression by using the Lagrangian multiplier method. Numerical simulations illustrate the effectiveness of the proposed scheme in terms of bit error rate and spectral efficiency.

Regular on-site testing is an elementary means to obtain real-time data and state of Electromagnetic Compatibility (EMC) of electronics systems. Nowadays, there is a lot of measured EMC data while the application of the data is insufficient. So we put forward the concept of EMC model synthesis. To carry out EMC data mining with measured electromagnetic data, we can build or modify models and synthesize variation rules of electromagnetic parameters of equipment and EMC performance of systems and platforms, then realize the information synthesis and state prediction. The concept of EMC reliability is brought forward together with the definition and description of parameters such as invalidation rate and EMC lifetime. We studied the application of statistical algorithms and Artificial Neural Network (ANN) in model synthesis. Operating flows and simulation results as well as measured data are presented. Relative research can support special measurement, active management and predictive maintenance and replenishment in the area of EMC.

Field Programmable Gate Array (FPGA) implementation of Elliptic Curve Cryptography (ECC) over GF(p) is commonly not fast enough to meet the request of high-performance applications. There are three critical factors to determine the performance of ECC processor over GF(p): multiplication structure, modular multiplication algorithm, and scalar point multiplication scheduling. This work proposes a novel multiplication structure which is a two-stage pipeline on the basis of Karatsuba-Ofman algorithm. With the proposed multiplication structure, we design a 256-bit modular multiplier based on Improved Barret Modular Multiplication algorithm. Upon the modular multiplier, we finish the scalar point multiplication scheduling and implement a high-performance ECC processor on FPGA. Compared with the previous modular multipliers, our modular multiplier reduces the 256-bit modular multiplication time by 28% at least. Synthesis result on Altera Stratix II shows that our ECC processor can complete a 256-bit ECC scalar point multiplication in 0.51ms, which is at least 1.3 times faster than the currently reported FPGA ECC processors over GF(p).

A local program insertion (LPI) scheme for video broadcasting systems is proposed by using a novel rotate-and-forward strategy, which can be widely used when a local TV tower (LT) wants to insert its own TV signals into the signals from the main TV tower (MT) without any additional resources. In the proposed LPI scheme, the bit stream of MT is firstly modulated and transmitted through coordinated constellation mapping, Alamouti encoding and OFDM modulation. Then, the LT receives the MT signals and demodulates them into constellation symbols. Finally, the bit stream of LT is mapped as “rotate bit” to rotate the demodulated MT symbols and forward to the users. We show that our proposed LPI scheme does not require extra time or frequency resources and it is also a complexity-reduced scheme for the local TV tower (LT) since bit-level decoding is not required at the LT. In addition, it can increase the network exchanging capacity in term of bits per channel use (bpcu).

In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.

Linear feedback shift register (LFSR) reseeding is an effective method for test data reduction. However, the test patterns generated by LFSR reseeding generally have high toggle rate and thus cause high test power. Therefore, it is feasible to fill X bits in deterministic test cubes with 0 or 1 properly before encoding the seed to reduce toggle rate. However, X-filling will increase the number of specified bits, thus increase the difficulty of seed encoding, what's more, the size of LFSR will increase as well. This paper presents a test frame which takes into consideration both compression ratio and power consumption simultaneously. In the first stage, the proposed reseeding-oriented X-filling proceeds for shift power (shift filling) and capture power (capture filling) reduction. Then, encode the filled test cubes using the proposed Compatible Block Code (CBC). The CBC can X-ize specified bits, namely turning specified bits into X bits, and can resolve the conflict between low-power filling and seed encoding. Experiments performed on ISCAS'89 benchmark circuits show that our scheme attains a compression ratio of 94.1% and reduces capture power by at least 15% and scan-in power by more than 79.5%.

Three-dimensional integrated circuits (3D ICs) that employ through-silicon vias (TSVs) integrating multiple dies vertically have opened up the potential of highly improved circuit designs. However, various types of TSV defects may occur during the assembly process, especially the clustered TSV faults because of the winding level of thinned wafer, the surface roughness and cleanness of silicon dies,inducing TSV yield reduction greatly. To tackle this fault clustering problem, router-based and ring-based TSV redundancy architectures were previously proposed. However, these schemes either require too much area overhead or have limited reparability to tolerant clustered TSV faults. Furthermore, the repairing lengths of these schemes are too long to be ignored, leading to additional delay overhead, which may cause timing violation. In this paper, we propose a region-based TSV redundancy design to achieve relatively high reparability as well as low additional delay overhead. Simulation results show that for a given number of TSVs (8*8) and TSV failure rate (1%), our design achieves 11.27% and 20.79% reduction of delay overhead as compared with router-based design and ring-based scheme, respectively. In addition, the reparability of our proposed scheme is much better than ring-based design by 30.84%, while it is close to that of the router-based scheme. More importantly, the overall TSV yield of our design achieves 99.88%, which is slightly higher than that of both router-based method (99.53%) and ring-based design (99.00%).