A botnet attacks any Victim Hosts via the multiple Command and Control (C&C) Servers, which are controlled by a botmaster. This makes it more difficult to detect the botnet attacks and harder to trace the source country of the botmaster due to the lack of the logged data about the attacks. To locate the C&C Servers during malware/bot downloading phase, we have analyzed the source IP addresses of downloads to more than 90 independent Honeypots in Japan in the CCC (Cyber Clean Center) dataset 2010 comprising over 1 million data records and almost 1 thousand malware names. Based on GeoIP services, a Time Zone Correlation model has been proposed to determine the correlation coefficient between bot downloads from Japan and other source countries. We found a strong correlation between active malware/bot downloads and time zone of the C&C Servers. As a result, our model confirms that malware/bot downloads are synchronized with time zone (country) of the corresponding C&C Servers so that the botmaster can be possibly traced.

The capacity of general mobile ad hoc networks (MANETs) remains largely unknown up to now, which significantly hinders the development and commercialization of such networks. Available throughput capacity studies of MANETs mainly focus on either the order sense capacity scaling laws, the exact throughput capacity under a specific algorithm, or the exact throughput capacity without a careful consideration of critical wireless interference and transmission range issues. In this paper, we explore the exact throughput capacity for a class of MANETs, where we adopt group-based scheduling to schedule simultaneous link transmissions for interference avoidance and allow the transmission range of each node to be adjusted. We first determine a general throughput capacity upper bound for the concerned MANETs, which holds for any feasible packet delivery algorithm in such networks. We then prove that the upper bound we determined is just the exact throughput capacity for this class of MANETs by showing that for any traffic input rate within the throughput capacity upper bound, there exists a corresponding two-hop relay algorithm to stabilize such networks. A closed-form upper bound for packet delay is further derived under any traffic input rate within the throughput capacity. Finally, based on the network capacity result, we examine the impacts of transmission range and node density upon network capacity.

Gopalan, Klivans, and Zuckerman proposed a list-decoding algorithm for Reed-Muller codes. Their algorithm works up to a given list-decoding radius. Dumer, Kabatiansky, and Tavernier improved the complexity of the algorithm for binary Reed-Muller codes by using the well-known Plotkin construction. In this study, we propose a list-decoding algorithm for non-binary Reed-Muller codes as a generalization of Dumer et al.'s algorithm. Our algorithm is based on a generalized Plotkin construction, and is more suitable for parallel computation than the algorithm of Gopalan et al. Since the list-decoding algorithms of Gopalan et al., Dumer et al., and ours can be applied to more general codes than Reed-Muller codes, we give a condition for codes under which these list-decoding algorithms works.

We investigate the utilization of vector registers (VRs) on reducing memory references for single instruction multiple data fast Fourier transform calculation. We propose to group the butterfly computations in several consecutive stages to maximize utilization of the available VRs and take the advantage of the symmetries in twiddle factors. All the butterflies sharing identical twiddle factors are clustered and computed together to further improve performance. The relationship between the number of fused stages and the number of available VRs is then examined. Experimental results on different platforms show that the proposed method is effective.

This paper introduces the concept of order complexity, which represents the minimum number of partial ordering operations to make a string of perfectly ordered symbols. A novel variable-length code expressing such order complexity using binary digits is proposed herein. The proposed code is general, uniquely decipherable, and useful for coding a string of random permuted symbols having unknown statistics or which are preferred to have a uniform distribution.

In this paper, an area-efficient decoder architecture is proposed for the quasi-cyclic low-density parity check (QC-LDPC) codes specified in the IEEE 802.16e WiMAX standard. The decoder supports all the code rates and codeword lengths defined in the standard. In order to achieve low area and maximize hardware utilization, the decoder utilizes 4 decoding function units, which is the greatest common divisor of the expansion factors. In addition, the decoder adopts a novel scheduling scheme named stride scheduling, which stores the extrinsic messages in non-sequential order to replace the conventional complex flexible permutation network with simple small-sized cyclic shifters and also minimize the number of memory accesses. To further minimize the complexity, the number of extrinsic memory instances for 24 block columns is reduced to 5 banks by identifying independent sets. All the memory instances used in the decoder are single-port memories which cost less area and price compared to dual-port ones. Finally, the decoding function units have partially parallel structure to make the decoding throughput sufficiently over the requirement of the WiMAX standard. The proposed decoder is synthesized with 49 K equivalent gates and 54,144 bits of memory, and the implementation occupies 0.40 mm2 in a 65 nm CMOS technology.

In this paper, we propose a step size control method capable of quickly canceling acoustic echo even when double talk continues from the echo path change. This method controls the step size by substituting the norm of the difference vector between the coefficient vectors of a main adaptive filter (Main-ADF) and a sub-adaptive filter (Sub-ADF) for the estimation error provided by the former. Actually, the number of taps of Sub-ADF is limited to a quarter of that of Main-ADF, and the larger step size than that applied to Main-ADF is given to Sub-ADF; accordingly the norm of the difference vector quickly approximates to the estimation error. The estimation speed can be improved by utilizing the norm of the difference vector for the step size control in Main-ADF. We show using speech signals that in single talk the proposed method can provide almost the same estimation speed as the method whose step size is fixed at the optimum one and verify that even in double talk the estimation error, quickly decreases.

20-Gbps non return-to-zero (NRZ) – binary phase shift keying (BPSK) using the silicon Mach-Zehnder modulator is demonstrated and characterized. Measurement of a constellation diagram confirms successful modulation of 20-Gbps BPSK with the silicon modulator. Transmission performance is characterized in the measurement of bit-error-rate in accumulated dispersion range from -347 ps/nm to +334 ps/nm using SMF and a dispersion compensating fiber module. Optical signal-to-noise ratio required for bit-error-rate of 10-3 is 10.1 dB at back-to-back condition. It is 1.2-dB difference from simulated value. Obtained dispersion tolerance less than 2-dB power penalty for bit-error-rate of 10-3 is -220 ps/nm to +230 ps/nm. The symmetric dispersion tolerance indicates chirp-free modulation. Frequency chirp inherent in the modulation mechanism of the silicon MZM is also discussed with the simulation. The effect caused by the frequency chirp is limited to 3% shift in the chromatic dispersion range of 2 dB power penalty for BER 10-3. The effect inherent in the silicon modulation mechanism is confirmed to be very limited and not to cause any significant degradation in the transmission performance.

NAND multi-level cell (MLC) flash memories are widely used due to low cost and high capacity. However, the increased number of levels in MLC results in larger interference and errors. The errors in MLC flash memories tend to be directional and limited-magnitude. Many related works focus on asymmetric errors, but bidirectional errors also occur because of the bidirectional interference and the adjustment of the hard-decision reference voltages. To take advantage of the characteristics, we propose t bidirectional (lu,ld) limited-magnitude error correction codes, which can reduce errors more effectively. The proposed code is systematic, and can correct t bidirectional errors with upward and downward magnitude of lu and ld, respectively. The proposed method is advantageous in that the parity size is reduced, and it has lower bit error rate than conventional error correction codes with the same code rate.

This paper presents a 7-bit 1.5-GS/s time-interleaved (TI) SAR ADC. The scheme achieves better isolation between sub-ADCs thanks to embedding a track-and-hold (T/H) amplifier and reference voltage buffer in each sub-ADC. The proposed dynamic T/H circuit enables high-speed, low-power operation. The prototype is fabricated in a 65-nm CMOS technology. The total active area is 0.14,mm2 and the ADC consumes 36 mW from a 1.2-V supply. The measured results show the peak spurious-free dynamic range (SFDR) and signal-to-noise-and-distortion ratio (SNDR) are 52.4 dB and 39.6 dB, respectively, and an figure of Merit (FoM) of 300 fJ/conv. is achieved.

Lately, access loads on servers are increasing due to larger content size and higher request frequency in content distribution networks. Breadcrumbs (BC), an architecture with guidance information for locating a content cache, is designed to reduce the server load and to form content-oriented network autonomously in cooperation with cached contents over IP network. We also proposed Breadcrumbs+ which solves BC's endless routing loop problem. However, Breadcrumbs takes only a passive approach; BC entries are created only when a content is downloaded and only at routers on the download path but not at any other routers. We expect that active and adaptive control of guidance information with simple complexity improves its performance with keeping scalability. In this paper, we propose Active Breadcrumbs which achieves efficient content retrieval and load-balancing through active and adaptive control of guidance information by cache-nodes themselves. In addition, we show the effectiveness of Active Breadcrumbs through the extensive computer simulation.

Research and development of a multi-degree colorless, directionless and contentionless reconfigurable optical add-drop multiplexer (CDC-ROADM) has recently been attracting a lot of attention. A large-scale transponder aggregator (TPA) is indispensable for providing high-capacity flexible connections to optical networks. In this paper, we report our study of the requirements for the TPA, which is a key technology for achieving flexible optical networks. To meet the requirements, we have developed an 848 TPA prototype based on Si photonics technology. This prototype was made with a few 88 Si optical switches and designed to be used with a commercial ROADM system. The 88 Si optical switches are made by integrating 152 Mach Zehnder (MZ) Thermo Optoelectronic (TO) 22 optical switch elements. A double gate structure is introduced to achieve the high extinction ratio (ER) required for optical communication. To the best of our knowledge, this is the world's first Si-TPA that can be used with a commercial ROADM system. By evaluating the basic optical characteristics utilizing real-time 100 Gbps digital coherent detection as one of today's practical technologies and a 4.4 THz spectral bandwidth 20 Tbps super-channel with digital coherent detection, as a promising future technology, we have confirmed that our prototype Si-TPA has the potential for practical use and future extensibility.

This paper describes a unified VLSI architecture which can be applied to various types of transforms used in MPEG-2/4, H.264, VC-1, AVS and the emerging new video coding standard named HEVC (High Efficiency Video Coding). A novel design named configurable butterfly array (CBA) is also proposed to support both the forward transform and the inverse transform in this unified architecture. Hadamard transform or 4/8-point DCT/IDCT are used in traditional video coding standards while 16/32-point DCT/IDCT are newly introduced in HEVC. The proposed architecture can support all these transform types in a unified architecture. Two levels (architecture level and block level) of hardware sharing are adopted in this design. In the architecture level, the forward transform can share the hardware resource with the inverse transform. In the block level, the hardware for smaller size transform can be recursively reused by larger size transform. The multiplications of 4 or 8-point transform are implemented with Multiplierless MCM (Multiple Constant Multiplication). In order to reduce the hardware overhead, the multiplications of 16/32 point DCT are implemented with ICM (input-muxed constant multipliers) instead of MCM or regular multipliers. The proposed design is 51% more area efficient than previous work. To the author's knowledge, this is the first published work to support both forward and inverse 4/8/16/32-point integer transform for HEVC standard in a unified architecture.

In most phrase-based statistical machine translation (SMT) systems, the translation model relies on word alignment, which serves as a constraint for the subsequent building of a phrase table. Word alignment is usually inferred by GIZA++, which implements all the IBM models and HMM model in the framework of Expectation Maximum (EM). In this paper, we present a fully Bayesian inference for word alignment. Different from the EM approach, the Bayesian inference makes use of all possible parameter values rather than estimating a single parameter value, from which we expect a more robust inference. After inferring the word alignment, current SMT systems usually train the phrase table from Viterbi word alignment, which is prone to learn incorrect phrases due to the word alignment mistakes. To overcome this drawback, a new phrase extraction method is proposed based on multiple Gibbs samples from Bayesian inference for word alignment. Empirical results show promising improvements over baselines in alignment quality as well as the translation performance.

Recently, environmental monitoring applications or home automation systems often deal with wireless sensor data. These applications deal with multi-dimensional sensing data and most processing operations involves skyline queries. In this paper, we focus on skyline queries in WSNs. However, as the number of data dimensions increases, the results of skyline queries become unmanageably large which reduces the lifetime of the sensor network. To solve these problems, we propose a novel k-dominant skyline query processing method using filtering mechanisms. The filter is designed by considering the data property and the data transmission cost. Extensive experiments show that our proposed method results in significant performance improvements over the existing method.

This paper presents a novel adaptable 4-moduli set {2n + k, 2n+1, 2n-1, 22n+1}. It offers diverse dynamic ranges (DRs) from 25n-2n to 25n + k-2n + k that are used to conquer the over-range issue in RNS-application hardware designs. The proposed adaptable set possesses the coarse parameter n and fine parameter k. It not only has better parallelism and larger dynamic range (DR) than the existing adaptive 3-moduli sets, but also holds more sizable and flexible than the general 4-moduli sets with single parameter. For the adaptable R-to-B conversion, this paper first derives a fast reverse converting algorithm based on Chinese Remainder Theorem (CRT) and then presents the efficient converter architecture. From the experimental results, the proposed adaptable converter achieves better hardware performance in various DRs. Based on TSMC 0.18 µm CMOS technology, the proposed converter design is implemented and its results get at least 20.93% saving of Area-Delay-Power (ADP) products on average when comparing with the latest converter works.

The sub-channel is empty except each user's allocated sub-channel in an orthogonal frequency division multiple access (OFDMA) system. The scheme of cooperative communication using this empty sub-channel has been studied. But, because each user wastes the time slots in the cooperation phase, it is difficult to achieve the full rate. In this letter, a new cooperative communication scheme based on OFDMA is proposed to improve transmission rate in Rayleigh fading channel.

We present the design of a secure identifier-based inter-domain routing, SIR, for the identifier/locator split network. On the one hand, SIR is a distributed path-vector protocol inheriting the flexibility of BGP. On the other hand, SIR separates ASes into several groups called trust groups, which assure the trust relationships among ASes by enforceable control and provides strict isolation properties to localize attacks and failures. Security analysis shows that SIR can provide control plane security that can avoid routing attacks including some smart attacks which S-BGP/soBGP can be deceived. Meanwhile, emulation experiments based on the current Internet topology with 47,000 ASes from the CAIDA database are presented, in which we compare the number of influenced ASes under attacks of subverting routing policy between SIR and S-BGP/BGP. The results show that, the number of influenced ASes decreases substantially by deploying SIR.

In a multihop wireless network, wireless interference is a crucial factor in the maximum multiflow (MMF) problem, which studies the maximum throughput between multiple pairs of sources and sinks with a link schedule to support it. In this paper, we observe that network coding could help to decrease the impact of wireless interference, and thus propose a framework to study the MMF problem for multihop wireless networks with network coding. Firstly, a network model is established to describe the new conflict relations and schedulability modified by network coding. Next, we formulate the MMF problem to compute the maximum throughput of multiple unicast flows supported by the multihop wireless network with network coding, and show that its capacity region could be enlarged by performing network coding. Finally, we show that determining the capacity region of a multihop wireless network with network coding is an NP-hard problem, and thus propose a greedy heuristic algorithm, called coding-first collecting (CFC), to determine a capacity subregion of the network. We also show that finding an optimal hyperarc schedule to meet a given link demand function is NP-hard, and propose a polynomial algorithm, called coding-first scheduling (CFS), to find an approximate fractional hyperarc schedule in the multihop wireless network with network coding. A numerical analysis of a grid wireless network and a random wireless network is presented to demonstrate the efficiencies of the CFC algorithm and the CFS algorithm based on the framework.

In modern automobiles, Controller Area Network (CAN) has been widely used in different sub systems that are connected by using gateway. While a gateway is necessary to integrate different electronic sub systems, it brings challenges for the analysis of Worst Case Response Time (WCRT) for CAN messages, which is critical from the safety point of view. In this paper, we first analyzed the challenges for WCRT analysis of messages in gateway-interconnected CANs. Then, based on the existing WCRT analysis method proposed for one single CAN, a new WCRT analysis method that uses two new definitions to analyze the interfering delay of sporadically arriving gateway messages is proposed for non-gateway messages. Furthermore, a division approach, where the end-to-end WCRT analysis of gateway messages is transformed into the similar situation with that of non-gateway messages, is adopted for gateway messages. Finally, the proposed method is extended to include CANs with different bandwidths. The proposed method is proved to be safe, and experimental results demonstrated its effectiveness by comparing it with a full space searching based simulator and applying it to a real message set.