This paper proposes 0-1-A-Ā LUT, a new programmable logic using atom switches, and a delay-optimal mapping algorithm for it. Atom switch is a non-volatile memory device of very small geometry which is fabricated between metal layers of a VLSI, and it can be used as a switch device of very small on-resistance and parasitic capacitance. While considerable area reduction of Look Up Tables (LUTs) used in conventional Field Programmable Gate Arrays (FPGAs) has been achieved by simply replacing each SRAM element with a memory element using a pair of atom switches, our 0-1-A-Ā LUT achieves further area and delay reduction. Unlike the conventional atom-switch-based LUT in which all k input signals are fed to a MUX, one of input signals is fed to the switch array, resulting area reduction due to the reduced number of inputs of the MUX from 2k to 2k-1, as well as delay reduction due to reduced fanout load of the input buffers. Since the fanout of this input buffers depends on the mapped logic function, this paper also proposes technology mapping algorithms to select logic function of fewer number of fanouts of input buffers to achieve further delay reduction. From our experiments, the circuit delay using our k-LUT is 0.94% smaller in the best case compared with using the conventional atom-switch-based k-LUT.

Linear phase maximally flat digital differentiators (DDs) with stopbands obtained by minimizing the Lp norm are filters with important practical applications, as they can differentiate input signals without distortion. Stopbands designed by minimizing the Lp norm can be used to control the relationship between the steepness in the transition band and the ripple scale. However, linear phase DDs are unsuitable for real-time processing because each group delay is half of the filter order. In this paper, we proposed a design method for a low-delay maximally flat low-pass/band-pass FIR DDs with stopbands obtained by minimizing the Lp norm. The proposed DDs have low-delay characteristics that approximate the linear phase characteristics only in the passband. The proposed transfer function is composed of two functions, one with flat characteristics in the passband and one that ensures the transfer function has Lp approximated characteristics in the stopband. In the optimization of the latter function, Newton's method is employed.

A comprehensive method applying a nonlinear frequency compression (FC) as complementary to multi-band loudness compensation is proposed, which is able to improve loudness compensation and simultaneously increase high-frequency speech intelligibility for digital hearing aids. The proposed nonlinear FC (NLFC) improves the conventional methods in the aspect that the compression ratio (CR) is adjusted based on the speech intelligibility percentage in different frequency ranges. Then, an adaptive wide dynamic range compression (AWDRC) with a time-varying CR is applied to achieve adaptive loudness compensation. The experimental test results show that the mean speech identification is improved in comparison with the state-of-art methods.

As autonomous underwater vehicles (AUVs) have been widely used to perform cooperative works with sensor nodes for data-gathering, the need for long-range AUVs has further grown to support the long-duration cooperation with sensor nodes. However, as existing data-gathering protocols for the cooperative works have not considered AUVs' energy consumption, AUVs can deplete their energy more quickly before fulfilling their missions. The objective of this work is to develop an AUV based data-gathering protocol that maximizes the duration for the cooperative works. Simulation results show that the proposed protocol outperforms existing protocols with respect to the long-range AUVs.

This paper proposes approximated log likelihood ratios (LLRs) for single carrier millimeter-wave (mmW) transmission systems in the presence of phase noise. In mmW systems, phase noise on carrier wave signals in very high frequency bands causes severe performance degradation. In order to mitigate the impairments of phase noise, forward error correction (FEC) techniques, such as low density parity check (LDPC) code, are effective. However, if the probabilistic model does not capture the exact behavior of the random process present in the received signal, FEC performance is severely degraded, especially in higher order modulation or high coding rate cases. To address this issue, we carefully examine the probabilistic model of minimum mean square error (MMSE) equalizer output including phase noise component. Based on the derived probabilistic model, approximated LLR computation methods with low computational burden are proposed. Computer simulations confirm that the approximated LLR computations on the basis of the derived probabilistic model are capable of improving bit error rate (BER) performance without sacrificing computational simplicity in the presence of phase noise.

Software-based error detection techniques, which includes error detection mechanism (EDM) transformation, are used for error localization in post-silicon validation. This paper evaluates the performance of EDM for timing error localization with a noise-aware logic simulator and 65-nm test chips assuming the following two EDM usage scenarios; (1) localizing a timing error occurred in the original program, and (2) localizing as many potential timing errors as possible. Simulation results show that the EDM transformation customized for quick error detection cannot locate electrical timing errors in the original program in the first scenario, but it detects 86% of non-masked errors potential bugs in the second scenario, which mean the EDM performance of detecting electrical timing errors affecting execution results is high. Hardware measurement results show that the EDM detects 25% of original timing errors and 56% of non-masked errors. Here, these hardware measurement results are not consistent with the simulation results. To investigate the reason, we focus on the following two differences between hardware and simulation; (1) design of power distribution network, and (2) definition of timing error occurrence frequency. We update the simulation setup for filling the difference and re-execute the simulation. We confirm that the simulation and the chip measurement results are consistent.

The rapid prototyping of a mixed-signal system-on-chip (SoC) has been enabled by reusing predesigned intellectual properties (IPs) and by integrating newly designed IP into the top design of SoC. The IPs have been designed on various hardware description levels, which leads to challenges in simulations that evaluate the prototyping. One traditional solution is to convert these heterogeneous IP models into equivalent models, that are described in a single description language. This conversion approach often requires manual rewriting of existing IPs, and this results in description loss during the model projection due to the absence of automatic conversion tools. The other solutions are co-simulation/emulation approaches that are based on the coupling of multiple simulators/emulators through connection modules. The conventional methods do not have formal theoretical backgrounds and an explicit interface for integrating the simulator into their solutions. In this paper, we propose a general co-simulation approach based on the high-level architecture (HLA) and a newly-defined programming language interface for interoperation (PLI-I) between heterogeneous IPs as a formal simulator interface. Based on the proposed PLI-I and HLA, we introduce formal procedures of integration and interoperation. To reduce integration costs, we split these procedures into two parts: a reusable common library and an additional model-dependent signal-to-event (SE) converter to handle differently abstracted in/out signals between the coupled IPs. During the interoperation, to resolve the different time-advance mechanisms and increase computation concurrency between digital and analog simulators, the proposed co-simulation approach performs an advanced HLA-based synchronization using the pre-simulation concepts. The case study shows the validation of interoperation behaviors between the heterogeneous IPs in mixed-signal SoC design, the reduced design effort in integrating, and the synchronization speedup using the proposed approach.

This paper investigates the effect of noises added to hidden units of AutoEncoders linked to multilayer perceptrons. It is shown that internal representation of learned features emerges and sparsity of hidden units increases when independent Gaussian noises are added to inputs of hidden units during the deep network training. It is also shown that the weights that connect the contaminated hidden units with the next layer have smaller values and outputs of hidden units tend to be more definite (0 or 1). This is expected to improve the generalization ability of the network through this automatic structuration by adding the noises. This network structuration was confirmed by experiments for MNIST digits classification via a deep neural network model.

We study the problem of determining the minimum number of open-edge guards which guard the interior of a given orthogonal polygon with holes. Here, an open-edge guard is a guard which is allowed to be placed along open edges of a polygon, that is, the endpoints of the edge are not taken into account for visibility purpose. It is shown that finding the minimum number of open-edge guards for a given orthogonal polygon with holes is NP-hard.

This paper explores the potential of orbital angular momentum (OAM) multiplexing as a means to enable high-speed wireless transmission. OAM is a physical property of electro-magnetic waves that are characterized by a helical phase front in the propagation direction. Since the characteristic can be used to create multiple orthogonal channels, wireless transmission using OAM can enhance the wireless transmission rate. Comparisons with other wireless transmission technologies clarify that OAM multiplexing is particularly promising for point-to-point wireless transmission. We also clarify three major issues in OAM multiplexing: beam divergence, mode-dependent performance degradation, and reception (Rx) signal-to-noise-ratio (SNR) reduction. To mitigate mode-dependent performance degradation we first present a simple but practical Rx antenna design method. Exploiting the fact that there are specific location sets with phase differences of 90 or 180 degrees, the method allows each OAM mode to be received at its high SNR region. We also introduce two methods to address the Rx SNR reduction issue by exploiting the property of a Gaussian beam generated by multiple uniform circular arrays and by using a dielectric lens antenna. We confirm the feasibility of OAM multiplexing in a proof of concept experiment at 5.2 GHz. The effectiveness of the proposed Rx antenna design method is validated by computer simulations that use experimentally measured values. The two new Rx SNR enhancement methods are validated by computer simulations using wireless transmission at 60 GHz.

Due to the increase of outsourcing by IC vendors, we face a serious risk that malicious third-party vendors insert hardware Trojans very easily into their IC products. However, detecting hardware Trojans is very difficult because today's ICs are huge and complex. In this paper, we propose a hardware-Trojan classification method for gate-level netlists to identify hardware-Trojan infected nets (or Trojan nets) using a support vector machine (SVM) or a neural network (NN). At first, we extract the five hardware-Trojan features from each net in a netlist. These feature values are complicated so that we cannot give the simple and fixed threshold values to them. Hence we secondly represent them to be a five-dimensional vector and learn them by using SVM or NN. Finally, we can successfully classify all the nets in an unknown netlist into Trojan ones and normal ones based on the learned classifiers. We have applied our machine-learning-based hardware-Trojan classification method to Trust-HUB benchmarks. The results demonstrate that our method increases the true positive rate compared to the existing state-of-the-art results in most of the cases. In some cases, our method can achieve the true positive rate of 100%, which shows that all the Trojan nets in an unknown netlist are completely detected by our method.

In the field of adaptive notch filtering, Monotonically Increasing Gradient (MIG) algorithm has recently been proposed by Sugiura and Shimamura [1], where it is claimed that the MIG algorithm shows monotonically increasing gradient characteristics. However, our analysis has found that the underlying theory in [1] includes crucial errors. This letter shows that the formulation of the gradient characteristics in [1] is incorrect, and reveals that the MIG algorithm fails to realize monotonically increasing gradient characteristics when the input signal includes white noise.

In this letter, we propose two robust and distributed game-based algorithms, which are the modifications of two algorithms proposed in [1], to solve the joint base station selection and resource allocation problem with imperfect information in heterogeneous cellular networks (HCNs). In particular, we repeatedly sample the received payoffs in the exploitation stage of each algorithm to guarantee the convergence when the payoffs of some users (UEs) in [1] cannot accurately be acquired for some reasons. Then, we derive the rational sampling number and prove the convergence of the modified algorithms. Finally, simulation results demonstrate that two modified algorithms achieve good convergence performances and robustness in the incomplete information scheme.

When the random variable has a completely monotone density function, we call it bursty (BRST) random variable. At first, we prove that the entropy of inter-arrival time is smaller than or equal to the entropy of inter-departure time in an infinite-server system GI/GI/∞ having general renewal arrivals. On the basis of that result, we prove that a BRST/GI/∞ having bursty arrivals and the associated loss system BRST/GI/c/c have the following paradoxical behavior: In the BRST/GI/∞, the stationary number of customers as well as the inter-departure time become stochastically less variable, as the service time becomes stochastically more variable. Also for the loss system BRST/GI/c/c, the blocking probability decreases and the inter-departure time becomes stochastically less variable, as the service time becomes stochastically more variable.

Based on the reconstruction of the augmented interference-plus-noise (IPN) covariance matrix (CM) and the estimation of the desired signal's extended steering vector (SV), we propose a novel robust widely linear (WL) beamforming algorithm. Firstly, an extension of the iterative adaptive approach (IAA) algorithm is employed to acquire the spatial spectrum. Secondly, the IAA spatial spectrum is adopted to reconstruct the augmented signal-plus-noise (SPN) CM and the augmented IPNCM. Thirdly, the extended SV of the desired signal is estimated by using the iterative robust Capon beamformer with adaptive uncertainty level (AU-IRCB). Compared with several representative robust WL beamforming algorithms, simulation results are provided to confirm that the proposed method can achieve a better performance and has a much lower complexity.

Shrinking feature sizes and higher levels of integration in semiconductor device manufacturing technologies are increasingly causing the gap between defect levels estimated in the design stage and reported ones for fabricated devices. In this paper, we propose a unified weighted fault coverage approach that includes both bridge and open faults, considering the critical area as the incident rate of each fault. We then propose a test pattern reordering scheme that incorporates our weighted fault coverage with an aim to reduce test costs. Here we apply a greedy algorithm to reorder test patterns generated by the bridge and stuck-at automatic test pattern generator (ATPG), evaluating the relationship between the number of patterns and the weighted fault coverage. Experimental results show that by applying this reordering scheme, the number of test patterns was reduced, on average, by approximately 50%. Our results also indicate that relaxing coverage constraints can drastically reduce test pattern set sizes to a level comparable to traditional 100% coverage stuck-at pattern sets, while targeting the majority of bridge faults and keeping the defect level to no more than 10 defective parts per milion (DPPM) with a 99% manufacturing yield.

This letter proposes a heuristic algorithm to select check variables, which are points of comparison for error detection, for soft-error tolerant datapaths. Our soft-error tolerance scheme is based on check-and-retry computation and an efficient resource management named speculative resource sharing (SRS). Starting with the smallest set of check variables, the proposed algorithm repeats to add new check variable one by one incrementally and find the minimum latency solution among the series of generated solutions. During the process, each new check variable is selected so that the opportunity of SRS is enlarged. Experimental results show that improvements in latency are achieved compared with the choice of the smallest set of check variables.

For a service-oriented architecture based system, the problem of synthesizing a concrete model, i.e., behavioral model, for each service configuring the system from an abstract specification, which is referred to as choreography, is known as the choreography realization problem. In this paper, we assume that choreography is given by an acyclic relation. We have already shown that the condition for the behavioral model is given by lower and upper bounds of acyclic relations. Thus, the degree of freedom for behavioral models increases; developing algorithms of synthesizing an intelligible model for users becomes possible. In this paper, we introduce several metrics for intelligibility of state machines, and study the algorithm of synthesizing Pareto efficient state machines.

This paper discusses the use of a common computer mouse as a pointing interface for tabletop displays. In the use of a common computer mouse for tabletop displays, there might be an angular distance between the screen coordinates and the mouse control coordinates. To align those coordinates, this paper introduces a screen coordinates calibration technique using a shadow cursor. A shadow cursor is the basic idea of manipulating a mouse cursor without any visual feedbacks. The shadow cursor plays an important role in obtaining the angular distance between the two coordinates. It enables the user to perform a simple mouse manipulation so that screen coordinates calibration will be completed in less than a second.

The 1-bit band-pass delta-sigma modulator (BP-DSM) achieves high resolution by using the oversampling technique. This method allows direct RF signal transmission from a digitally modulated signal, using a 1-bit digital pulse train. However, it has been previously reported that the adjacent channel leakage ratio (ACLR) in a target frequency band degrades due to the pulse transition mismatch between rising and falling waveforms in the time domain. This paper clarifies that the spurious distortion in BP-DSM is caused by the asymmetricity of the waveform about the center of an eye pattern in the time axis, and proposes a 1-bit BP-DSM with the compensator consisting of a fractional delay filter and a binary data differentiator to cancel out the asymmetry in the target frequency band. This can accurately provide a wideband cancellation signal with more than 100MHz bandwidth, including the adjacent channel, within 50dB power dynamic range. Using long term evolution (LTE) signals with 5MHz bandwidth at 0.8GHz, we simulated the spurious distortion, performing various combinations of rising and falling times in the eye pattern, and the proposed 1-bit BP-DSM always achieved high ACLR, up to 60dB, in 140MHz bandwidth, under all conditions.