The reduction of the signaling load associated with IP mobility management is one of the significant challenges to IP mobility support protocols. Hierarchical Mobile IPv6 (HMIPv6) aims to reduce the number of the signaling messages in the backbone networks, and improve handoff performance by reducing handoff latency. However, this does not imply any change to the periodic binding update (BU) to the home agent (HA) and the correspondent node (CN), and now a mobile node (MN) additionally should send it to the mobility anchor point (MAP). Moreover, the MAP should tunnel the received packets to be routed to the MN. These facts mean that the reduction of the BU messages in the backbone networks can be achieved at the expense of the increase in the signaling bandwidth consumption within a MAP domain. On the other hand, it is observed that an MN may habitually stay for a relatively long time or spend on using much Internet in a specific cell (hereafter, home cell) covering its home, office or laboratory, etc. Thus, considering the preceding facts and observation, HMIPv6 may not be favorable especially during a home cell residence time in terms of signaling bandwidth consumption. To overcome these drawbacks of HMIPv6, we propose a history-based auxiliary mobility management strategy (H-HMIPv6) to enable an MN to selectively switch its mobility management protocols according to whether it is currently in its home cell or not in HMIPv6 networks. The operation of H-HMIPv6 is almost the same as that of HMIPv6 except either when an MN enters/leaves its home cell or while it stays in its home cell. Once an MN knows using its history that it enters its home cell, it behaves as if it operates in Mobile IPv6 (MIPv6), not in HMIPv6, until it leaves its home cell; No periodic BU messages to the MAP and no packet tunneling occur during the MN's home cell residence time. The numerical results indicate that compared with HMIPv6, H-HMIPv6 has apparent potential to reduce the signaling bandwidth consumption and the MAP blocking probability.

In this paper, we propose a new error feedback (EF) structure for 2-D separable-denominator digital filters described by a rational transfer function. In implementing two-dimensional separable-denominator digital filters, the minimum delay elements structures are common. In the proposed structure, the filter feedback-loop corresponding to denominator polynomial is placed at a different location compared to the commonly used structures. The proposed structure can minimize the roundoff noise more than the previous structure though the number of multipliers is less than that of previous one. Finally, we present a numerical example by designing the EF on the proposed structure and demonstrate the effectiveness of the proposed method.

It is well known that the trellises of lattices can be employed to decode efficiently. It was proved in [1] and [2] that if a lattice L has a finite trellis under the coordinate system , then there must exist a basis (b1,b2,,bn) of L such that Wi=span() for 1in. In this letter, we prove this important result in a completely different method, and give an efficient method to compute all bases of this type.

Since the inception of Globally Asynchronous Locally Synchronous (GALS) VLSI design, GALS has been considered a promising design technique for multi-clock-domain System-on-Chip (SoC). Among the handshake protocols available for SoC design, delay insensitive (DI) handshake protocol is becoming a core technology, since it facilitates robust data transfer regardless of wire delay variation. In this paper, a new data encoding scheme Differential Value Encoding (DVE) is proposed for two-phase 1-of-N DI handshake protocol. Compared with the conventional data encoding method, the proposed scheme effectively reduces the crosstalk effect on wires sending sequentially increasing data patterns, resulting in reduction of the data transfer time. Simulation results with SPEC CPU 2000 benchmarks and sequentially increasing data pattern reveal that the DVE scheme can reduce the crosstalk effect by tens of percentage and significantly decrease the data transfer time.

This paper describes a 3.5 V operation InGaP HBT MMIC power amplifier module for use in GSM/EDGE dual-mode, 900/1800/1900 MHz triple band handset applications. Conventional GSM amplifiers have a high linear gain of 40 dB or more to realize efficiency operation in large gain compression state exceeding at least 5 dB. On the other hand, an EDGE amplifier needs a linear operation to prevent signal distortion. This means that a high linear gain amplifier cannot be applied to the EDGE amplifier, because the high gain leads to the high noise power in the receive band (Rx-noise). In order to solve this problem, we have changed the linear gain of the amplifier between GSM and EDGE mode. In EDGE mode, the stage number of the amplifier changes from three to two. To reduce a high gain, the first stage transistors in the amplifier is bypassed through the diode switches. This newly proposed bypass circuit enables a high gain in GSM mode and a low gain in EDGE, thus allowing the amplifier to operate with high efficiency in both modes while satisfying the Rx-noise specification. In conclusion, with diode switches and a band select switch built on the MMIC, the module delivers a Pout of 35.5 dBm and a PAE of about 50% for GSM900, a 33.4 dBm Pout and a 45% PAE for GSM1800/1900. While satisfying an error vector magnitude (EVM) of less than 4% and a receive-band noise power of less than -85 dBm/100 kHz, the module also delivers a 29.5 dBm Pout and a PAE of over 25% for EDGE900, a 28.5 dBm Pout and a PAE of over 25% for EDGE1800/1900.

Machine transliteration is an automatic method to generate characters or words in one alphabetical system for the corresponding characters in another alphabetical system. Machine transliteration can play an important role in natural language application such as information retrieval and machine translation, especially for handling proper nouns and technical terms. The previous works focus on either a grapheme-based or phoneme-based method. However, transliteration is an orthographical and phonetic converting process. Therefore, both grapheme and phoneme information should be considered in machine transliteration. In this paper, we propose a grapheme and phoneme-based transliteration model and compare it with previous grapheme-based and phoneme-based models using several machine learning techniques. Our method shows about 1378% performance improvement.

Most branch predictors use the PC information of the branch instruction and its dynamic Global Branch History (GBH). In this letter, we suggest a Branch Direction History (BDH) as the third component of the branch prediction and analyze its impact upon the prediction accuracy. Additionally, we propose a new branch predictor, direction-gshare predictor, which utilizes the BDH combined with the GBH. At first, we model a neural network with (PC, GBH, and BDH) and analyze their actual impact upon the branch prediction accuracy, and then we simulate our new predictor, the direction-gshare predictor. The simulation results show that the aliasing in Pattern History Table (PHT) is significantly reduced by the additional use of BDH information. The direction-gshare predictor outperforms bimodal predictor, two-level adaptive predictor and gshare predictor up to 15.32%, 5.41% and 5.74% respectively, without additional hardware costs.

This paper presents a VLSI processor for high-speed and reliable stereo matching based on adaptive window-size control of SAD(Sum of Absolute Differences) computation. To reduce its computational complexity, SADs are computed using multi-resolution images. Parallel memory access is essential for highly parallel image processing. For parallel memory access, this paper also presents an optimal memory allocation that minimizes the hardware amount under the condition of parallel memory access at specified resolutions.

In this paper, the 1-D real-valued discrete Gabor transform (RDGT) proposed in our previous work and its relationship with the complex-valued discrete Gabor transform (CDGT) are briefly reviewed. Block time-recursive RDGT algorithms for the efficient and fast computation of the 1-D RDGT coefficients and for the fast reconstruction of the original signal from the coefficients are then developed in both the critical sampling case and the oversampling case. Unified parallel lattice structures for the implementation of the algorithms are studied. And the computational complexity analysis and comparison show that the proposed algorithms provide a more efficient and faster approach for the computation of the discrete Gabor transforms.

Finding DC operating points of transistor circuits is a very important and difficult task. The Newton-Raphson method employed in SPICE-like simulators often fails to converge to a solution. To overcome this convergence problem, homotopy methods have been studied from various viewpoints. For efficiency of homotopy methods, it is important to construct an appropriate homotopy function. In conventional homotopy methods, linear auxiliary functions have been commonly used. In this paper, a homotopy method for solving transistor circuits using a nonlinear auxiliary function is proposed. The proposed method utilizes the nonlinear function closely related to circuit equations to be solved, so that it efficiently finds DC operating points of practical transistor circuits. Numerical examples show that the proposed method is several times more efficient than conventional three homotopy methods.

In order to reduce the size of a wireless system, we propose a design theory for the broadband impedance matching circuit which connects an electrically small antenna (ESA) to a semiconductor amplifier. We confirmed its validity for the case of connection between a small slot loop antenna with a small radiation resistance of Ra =0.776 Ω and a semiconductor amplifier with high input impedance of ZL =321-j871 Ω with the aid of the simulations by the electrical circuits using transmission lines as well as the electromagnetic field (EM field) simulator. We also made experiments on this antenna with matching circuits using high temperature superconductor YBCO thin films on MgO substrates.

This paper presents a framework for automatic video region-of-interest determination based on visual attention model. We view this work as a preliminary step towards the solution of high-level semantic video analysis. Facing such a challenging issue, in this work, a set of attempts on using video attention features and knowledge of computational media aesthetics are made. The three types of visual attention features we used are intensity, color, and motion. Referring to aesthetic principles, these features are combined according to camera motion types on the basis of a new proposed video analysis unit, frame-segment. We conduct subjective experiments on several kinds of video data and demonstrate the effectiveness of the proposed framework.

This paper proposes "Multipath Control and Proactive Control" to realize a robust QoS control system for mobile multimedia communication in an IP-based cellular network. In this network, all kinds of traffic will share the same backbone network. This requires a QoS system that differentiates services according to the required quality. Though DiffServ is thought to be a promising technique for achieving QoS, an effective path control scheme and a technique that is suitable enough for rapid traffic changes are not yet available. Our solution is multipath control using linear optimization combined with proactive control using traffic anomaly detection. Simulation results show that multipath control and proactive control improve system performance in terms of throughput and packet loss when rapid traffic change takes place.

This paper focuses on the underdetermined blind source separation (BSS) of three speech signals mixed in a real environment from measurements provided by two sensors. To date, solutions to the underdetermined BSS problem have mainly been based on the assumption that the speech signals are sufficiently sparse. They involve designing binary masks that extract signals at time-frequency points where only one signal was assumed to exist. The major issue encountered in previous work relates to the occurrence of distortion, which affects a separated signal with loud musical noise. To overcome this problem, we propose combining sparseness with the use of an estimated mixing matrix. First, we use a geometrical approach to detect when only one source is active and to perform a preliminary separation with a time-frequency mask. This information is then used to estimate the mixing matrix, which allows us to improve our separation. Experimental results show that this combination of time-frequency mask and mixing matrix estimation provides separated signals of better quality (less distortion, less musical noise) than those extracted without using the estimated mixing matrix in reverberant conditions where the reverberant time (TR) was 130 ms and 200 ms. Furthermore, informal listening tests clearly show that musical noise is deeply lowered by the proposed method comparatively to the classical approaches.

A robust microphone array for speech enhancement and noise suppression is studied in this paper. To overcome target signal cancellation problem of conventional beamformer caused by array imperfections or reverberation effects of acoustic enclosure, the proposed microphone array adopts an arbitrary model of channel transfer function (TF) relating microphone and speech source. Since the estimation of channel TF itself is often intractable, herein, transfer function ratio (TFR) is estimated instead and used to form a suboptimal beamformer. A robust TFR estimation method is proposed based on signal subspace analysis technique against stationary or slowly varying noise. Experiments using simulated signal and actual signal recorded in a real room illustrate that the proposed method has high performance in adverse environment.

This paper proposes a partial order reduction algorithm for timed trace theoretic verification in order to detect both safety failures and timing failures of timed circuits efficiently. This algorithm is based on the framework of timed trace theoretic verification according to the original untimed trace theory. Consequently, its conformance checking supports hierarchical structure when verifying timed circuits. Experimenting with the STARI and DME circuits, the proposed approach shows its effectiveness.

This paper introduces the multiple signal classification (MUSIC) method that utilizes the transfer characteristics of microphones located at the same place, namely aggregated microphones. The conventional microphone array realizes a sound localization system according to the differences in the arrival time, phase shift, and the level of the sound wave among each microphone. Therefore, it is difficult to miniaturize the microphone array. The objective of our research is to build a reliable miniaturized sound localization system using aggregated microphones. In this paper, we describe a sound system with N microphones. We then show that the microphone array system and the proposed aggregated microphone system can be described in the same framework. We apply the multiple signal classification to the method that utilizes the transfer characteristics of the microphones placed at a same location and compare the proposed method with the microphone array. In the proposed method, all microphones are placed at the same place. Hence, it is easy to miniaturize the system. This feature is considered to be useful for practical applications. The experimental results obtained in an ordinary room are shown to verify the validity of the measurement.

This paper focuses on SIMD processor synthesis and proposes a SIMD instruction set/functional unit synthesis algorithm. Given an initial assembly code and a timing constraint, the proposed algorithm synthesizes an area-optimized processor core with optimal SIMD functional units. It also synthesizes a SIMD instruction set. The input initial assembly code is assumed to run on a full-resource SIMD processor (virtual processor) which has all the possible SIMD functional units. In our algorithm, we introduce the SIMD operation decomposition and apply it to the initial assembly code and the full-resource SIMD processor. By gradually reducing SIMD operations or decomposing SIMD operations, we can finally find a processor core with small area under the given timing constraint. The promising experimental results are also shown.

Recently, automatic speech recognition in a car has practical uses for applications like car-navigation and hands-free telephone dialers. For noise robustness, the current successes are based on the assumption that there is only a stationary cruising noise. Therefore, the recognition rate is greatly reduced when there is music or news coming from a radio or a CD player in the car. Since reference signals are available from such in-vehicle units, there is great hope that echo cancellers can eliminate the echo component in the observed noisy signals. However, previous research reported that the performance of an echo canceller is degraded in very noisy conditions. This implies it is desirable to combine the processes of echo cancellation and noise reduction. In this paper, we propose a system that uses echo cancellation and spectral subtraction simultaneously. A stationary noise component for spectral subtraction is estimated through the adaptation of an echo canceller. In our experiments, this system significantly reduced the errors in automatic speech recognition compared with the conventional combination of echo cancellation and spectral subtraction.

Visibility culling techniques have been studied extensively in computer graphics for interactive walkthrough applications in recent years. In this paper, a visibility culling approach by exploiting hardware-accelerated occlusion query is proposed. Organizing the regular grid representation of input scene as an octree-like hierarchy, a 2-tier view frustum culling algorithm is to efficiently cull away nodes invisible from a given viewpoint. Employing the eye-siding number of nodes, we can quickly enumerate an occlusion front-to-back order and effectively maximize the number of parallelizable occlusion queries for nodes while traversing the hierarchy. As experimental results show, our approach improves the overall performance in the test walkthrough.