In this paper we develop a new family of on-line adaptive learning algorithms for blind separation of time delayed and convolved sources. The algorithms are derived for feedforward and fully connected feedback (recurrent) neural networks on basis of modified natural gradient approach. The proposed algorithms can be considered as generalization and extension of existing algorithms for instantaneous mixture of unknown source signals. Preliminary computer simulations confirm validity and high performance of the proposed algorithms.

The authors previously proposed a reconfigurable architecture called the "XL-scheme" in order to cope with processor element (PE) faults as well as link faults. However, they described an algorithm for compensating only for link faults. They determined the potential ability to tolerate faults of the XL-scheme for simultaneous faults of links and PEs, and left a reconstruction algorithm for simultaneous PE and link faults to be studied in the future. This paper briefly explains the XL-scheme and gives a reconstruction algorithm for simultaneous PE and link faults. The algorithm first replaces faulty PEs with healthy ones and then replaces faulty links with healthy ones. We then compute the reliabilities of the mesh-arrays with simultaneous PE and link faults by simulation. We compare the reliability of the XL-scheme with that of the one-and-half track switch model. It is seen that the former is much larger than the latter. Furthermore, we show the result for processing time.

The construction of fault-tolerant processor arrays with interconnections of cube-connected cycles (CCCs) by using an advanced spare-connection scheme for k-out-of-n redundancies called "generalized additional bypass linking" is described. The connection scheme uses bypass links with wired OR connections to spare processing elements (PEs) without external switches, and can reconfigure complete arrays by tolerating faulty portions in these PEs and links. The spare connections are designed as a node-coloring problem of a CCC graph with a minimum distance of 3: the chromatic numbers corresponding to the number of spare PE connections were evaluated theoretically. The proposed scheme can be used for constructing various k-out-of-n configurations capable of quick broadcasting by using spare circuits, and is superior to conventional schemes in terms of extra PE connections and reconfiguration control. In particular, it allows construction of optimal r-fault-tolerant configurations that provide r spare PEs and r extra connections per PE for CCCs with 4x PEs (x: integer) in each cycle.

A novel approach to the cache coherent Multistage Interconnection Network (MIN) called the MINC (MIN with Cache control mechanism) is proposed. In the MINC, the directory is located only on the shared memory using the Reduced Hierarchical Bit-map Directory schemes (RHBDs). In the RHBD, the bit-map directory is reduced and carried in the packet header for quick multicasting without accessing the directory in each hierarchy. In order to reduce unnecessary packets caused by compacting the bit map in the RHBD, a small cache called the pruning cache is introduced in the switching element. The simulation reveals the pruning cache works most effectively when it is provided in every switching element of the first stage, and it reduces the congestion more than 50% with only 4 entries. The MINC cache control chip with 16 inputs/outputs is implemented on the LPGA (Laser Programmable Gate Array), and works with a 66 MHz clock.

This paper reports the thermal stability of particulate media, which include Co-Fe oxide, CrO2, and thick and thin MP tapes. By measuring the time decay of magnetization at room temperature, fluctuation fields were obtained as a function of reverse applied field. It was clarified that the fluctuation field has a constant and minimum value when the reverse applied field is equal to coercivity. Minimum fluctuation fields for the four particulate tapes were measured at several environmental temperatures ranging from -75 to +100. It was also clarified that the fluctuation field normalized by remanence coercivity increases as the environmental temperature increases for all tapes, indicating that it is a good measure of thermal stability. Activation volumes were also deduced as a function of temperature.

Advanced scientific and engineering problems require massively parallel computing. Critical to the designand ultimately the performanceof such computing systems is the interconnection network binding the computing elements, just as is the cardiovascular network to the human body. This paper develops a new interconnection network, "Tori connected mESHes (TESH)," consisting of k-ary n-cube connection of supernodes that comprise meshes of lower level nodes. Its key features are the following: it is hierarchical, thus allowing exploitation of computation locality as well as easy expansion (up to a million processors), and it appears to be well suited for 3-D VLSI implementation, for it requires far fewer number of vertical wires than almost all known multi-computer networks. Presented in the paper are the architecture of the new network, node addressing and message routing, 3-D VLSI/ULSI considerations, and application of the network to massively parallel computing. Specifically, we discuss the mapping on to the network of stack filtering, a hardware oriented technique for order statistic image filtering.

In this paper, we propose a novel algorithm for all-digital high speed symbol synchronization to be called the MBECM (Modified-Band Edge Component Maximization). The proposed algorithm has a structure based on the spectral line method. It simplifies and modifies the existing BECM algorithm to compensate for the timing offset caused by different phase characteristics of the BPF (band pass filter) at 1/2T and -1/2T. The algorithm is also independent of the carrier recovery and requires only two samples per symbol for its operation. Until now the timing detector's characteristics of the spectral line method including the M-BECM was not analyzed, particularly effect of the timing offset at convergence point. We analyze the timing detector's characteristics of the M-BECM and derive expressions for the timing detector's mean value (often called the S-curve) as a function of the normalized symbol-clock phase, the rolloff parameterand the bandwidth of the BPF. By using these expressions, the PDbias for eliminating the timing offset at an optimal convergence point are calculated. We also analyze and evaluate performance of the proposed algorithm in various ways such as jitter, timing detector output characteristics, etc. and suggest improvements. The proposed M-BECM is compared to the popular Gardner algorithm for high speed modem applications. The proposed algorithm has simpler structure than the Gardner algorithm and simulation results reveal that the proposed algorithm has better overall performance than the Gardner algorithm in narrow band.

This work is targeted to understand the operating principle of the feedback type echo canceller for use in an FM broadcasting receiver and to study its compensating features and the effects of the practical operating environment on its performance. The effects of the tap interval and the compensation performance in the presence of an echo with excess delay 0 - 15 µs are examined. The results show that the tap interval should be selected according to the observable bandwidth of the channel transfer function and the performance of a feedback type echo canceller has a wavelike curve with respect to the excess delay of the echo. To improve the performance of the feedback type echo canceller, an adaptive echo canceller operating with CM algorithm is proposed and examined with computer simulation. The results show that the compensation performance is improved.

Nonlinearity is an important factor in the biological neural networks. The motion perception and learning in them have been studied on the simplest type of nonlinearity, multiplication. In this paper, asymmetrical neural networks with nonlinear function, are studied in the biological neural networks. Then, the nonlinear higher-order system is discussed in the neural networks. The second-order system in the nonlinear biological system is shown to play an important role in the movement detection. From the theoretical analysis, it is shown that the third-order one does not contribute to the detection and the fourth-order one becomes to the second-order in the movement detection function. Hassenstein and Reichardt network (1956) and Barlow and Levick network (1965) of movements are similar to the asymmetrical network developed here. To make clear the difference among these asymmetrical networks, we derive α-equation of movement, which shows the detection of movement. During the movement, we also can derive the movement equation, which implies the movement direction regardless of the parameter α.

Microcellular radio direct-sequence code division multiple access (DC-CDMA) system using optical link to connect their base stations to a central station is a solution of cost-effective and efficient spectrum reuse to meet the growing demand for mobile communications. In addition to the inherent multiuser interference (MUI) of CDMA signals, the system capacity is significantly reduced by a nonlinear distortion (NLD) due to the nonlinearity of optical link. In this paper, a two-stage cancellation technique is introduced into the system to cancel both the MUI and the NLD. It is performed at the receiver of the central station where the random ingredients of all user signals are estimated, and the MUI and the NLD are rebuilt and removed from the received signal. The validity of the cancellation technique is theoretically analyzed and shown by the numerical results. The analytical method and its results are also applicable to other general nonlinear CDMA.

A neural network of massively interconnected digital neurons is presented for the total coloring problem in this paper. Given a graph G (V, E), the goal of this NP-complete problem is to find a color assignment on the vertices in V and the edges in E with the minimum number of colors such that no adjacent or incident pair of elements in V and E receives the same color. A graph coloring is a basic combinatorial optimization problem for a variety of practical applications. The neural network consists of (N+M) L neurons for the N-vertex-M-edge-L-color problem. Using digital neurons of binary outputs and range-limited non-negative integer inputs with a set of integer parameters, our digital neural network is greatly suitable for the implementation on digital circuits. The performance is evaluated through simulations in random graphs with the lower bounds on the number of colors. With a help of heuristic methods, the digital neural network of up to 530, 656 neurons always finds a solution in the NP-complete problem within a constant number of iteration steps on the synchronous parallel computation.

The present study investigated the human ability to selectively process pictures and words in free recall. We explored whether successful bias towards a subset of priority items occurs at the expense of the remaining items-i.e., whether successful priority item bias necessitates the dumping of information related to non-priority items. It has been shown that an increase in the percentage of correct recalls to items given priority in the pre-test instructions induces a decrease in the percentage of correct recalls for non-priority items. Even in a free recall experimental paradigm, the information dumping phenomenon was observed. However, there were no effects of stimulus presentation time and stimulus modality (picture vs. word) on the percentage of correct recalls detected.

It is well known that offset errors in the multipliers of neural LSIs can have fatal effects on performance. The aim of this study is to understand theoretically how offset errors affect performance of neural LSIs. We have used a single-layer perceptron as an example, and compare our theoretically derived results with computer simulations. We have found that offset errors in the multipliers for the forward process can be canceled out through learning, but those for the updating process cannot be. We have examined the asymptotic behavior of learning for the updating process and derived a mathematical expression for dL, the excess of the averaged loss function L. The derived expression gives us a basis for estimating robustness with respect to the offset errors. Our analysis indicates that dL can be expressed in the form of a quadratic form of offset errors and the inverse of the Hessian matrix of L. We have found that increasing the number of synapses degrades the performacne. We have also learned that enlarging the input signal level and reducing the signal level of the desired response can be effective techniques for reducing the effects of offset errors of the updating process.

Small-scale video on demand system will be necessary in the future. Cluster drives, which use optical disk drives, are a good buffer memory for this purpose because the cost per megabyte is low. An ordinary optical cluster drive has many SCSI buses and up to seven optical drives are connected to each SCSI bus. One drive from each bus is assembled to make a group of a cluster drive. The difference betweeen SCSI bus data transfer rate and sustained disk transfer rate enables the cluster drive to be simplified. Several drives on an SCSI bus make a sub-group. The video data is striped onto those sub-groups. When the total data transfer rate from disks within a sub-group exceeds the bus transfer rate, some drives can not acquire the bus. When drives connected to one SCSI bus are not identical, the block size of the data to be recorded on each drive has to be adjusted so that the maximum effective data transfer rate can be obtained. When the cycle times of a slow and fast drive are set identical, the effective data transfer rate is maximum, where one cycle consists of command time, minimum bus free time, disk read time, and bus transfer time.

The multipass rendering method based on the global illumination model can generate the most photo-realistic images. However, since the multipass rendering method is very time consuming, it is impractical in the industrial world. This paper discusses a massively parallel processing approach to fast image synthesis by the multipass rendering method. Especially, we focus on the performance evaluation of the view-dependent object-space parallel processing on the (Mπ)2 which has been proposed in our previous paper. We also propose two kinds of distributed frame buffer system named cached frame buffer and multistage-interconnected frame buffer. These frame buffer systems can solve the access conflict problem on the frame buffer. The simulation results show that the (Mπ)2 has a scalable performance. For example, the (Mπ)2 with more than 4000 processing elements can achieve an efficiency of over 50%. We also show that both of the proposed distributed frame buffer systems can relieve the overhead due to frame buffer access in the (Mπ)2 in the case that a large number of high-performance processing elements are adopted in the system.

For the solutions of linear systems of equations with unsymmetric coefficient matrices, we propose an improved version of the quasi-minimal residual (IQMR) method by using the Lanczos process as a major component combining elements of numerical stability and parallel algorithm design. For Lanczos process, stability is obtained by a coupled two-term procedure that generates Lanczos vectors scaled to unit length. The algorithm is derived such that all inner products and matrixvector multiplications of a single iteration step are independent and communication time required for inner product can be overlapped efficiently with computation time. Therefore, the cost of global communication on parallel distributed memory computers can be significantly reduced. The resulting IQMR algorithm maintains the favorable properties of the Lanczos process while not increasing computational costs. The efficiency of this method is demonstrated by numerical experimental results carried out on a massively parallel distributed memory computer, the Parsytec GC/PowerPlus.

We present a scalable parallel memory architecture with a skew scheme by which permanent-concentration-free strides, if any, do not depend on the number of ways in parallel memory interleaving. The permanent-concentration is a kind of memory access conflict. With conventional skew schemes, permanent-concentration-free strides depended on the number of banks (or bank groups) in parallel memory (=number of ways in parallel memory interleaving). We analyze two kinds of cause of conflicts: permanent-concentration occurs when memory access requests concentrate in limited number of banks (or bank groups) in parallel memory, and transient-concentration, when memory access requests transiently concentrate in some banks (or bank groups) in parallel memory. We have identified permanent-concentration-free strides, which are independent of the number of banks (or bank groups) in parallel memory, by solving two concentrations separately. The strategy is to increase the size of address block of shifting address assignment to the parallel memory in order to reduce permanent-concentrations, and make the size of the buffer for each banks (or bank groups) in the parallel memory match the size of address block of shifting in order to absorb transient-concentrations. The skew scheme uses the same size of address block of shifting address assignment for memory systems for different numbers of banks (or bank groups) in parallel memory. As a result, scalability for permanent-concentration-free strides is achieved independent of the number of banks (or bank groups) in parallel memory.

This paper first proposes a new approach to designing high-quality, low-diameter, small mean-internode-distance (MID), k-subcubic-connected cyclic networks. The approach is a modification of the k-cubic-connected cyclic (k-ccc) network in which there are N=k2k-1 instead of N=k2k nodes in the k-ccc network. The special features of this network are: (1) It fills the gap between the number of nodes in k-ccc and (k+1)-ccc networks, but retains a constant number of link (3) per node in the network, (2) it allows higher quality, smaller diameters and mean internode distances hypercube networks with the same numbers of nodes. A second novel approach consists of a k+-sccc network with the same number of nodes as the k-ccc but with smaller diameters and mean internode distances. A generalized k-ccc network formed by nodes N=k2m is introduced for n-cube and k-ccc (modified or normal) networks that allows minimum network quality to be obtained where m may or may not equal to k. A routing algorithm for 4-sccc is also presented.

Linear programming techniques are useful in many diverse applications such as: production planning, energy distribution etc. To find an optimal solution of the linear programming problem, we have to repeat computations and it takes a lot of processing time. For high speed computation of linear programming, special purpose hardware has been sought. This paper proposes a systolic array for solving linear programming problems using the revised simplex method which is a typical algorithm of linear programming. This paper also proposes a modified systolic array that can solve linear programming problems whose sizes are very large.

The graph partitioning problem is a famous combinatorial problem and has many applications including VLSI circuit design, task allocation in distributed computer systems and so on. In this paper, a novel neural network for the m-way graph partitioning problem is proposed where the maximum neuron model is used. The undirected graph with weighted nodes and weighted edges is partitioned into several subsets. The objective of partitioning is to minimize the sum of weights on cut edges with keeping the size of each subset balanced. The proposed algorithm was compared with the genetic algorithm. The experimental result shows that the proposed neural network is better or comparable with the other existing methods for solving the m-way graph partitioning problem in terms of the computation time and the solution quality.