A training data selection method is proposed for multilayer neural networks (MLNNs). This method selects a small number of the training data, which guarantee both generalization and fast training of the MLNNs applied to pattern classification. The generalization will be satisfied using the data locate close to the boundary of the pattern classes. However, if these data are only used in the training, convergence is slow. This phenomenon is analyzed in this paper. Therefore, in the proposed method, the MLNN is first trained using some number of the data, which are randomly selected (Step 1). The data, for which the output error is relatively large, are selected. Furthermore, they are paired with the nearest data belong to the different class. The newly selected data are further paired with the nearest data. Finally, pairs of the data, which locate close to the boundary, can be found. Using these pairs of the data, the MLNNs are further trained (Step 2). Since, there are some variations to combine Steps 1 and 2, the proposed method can be applied to both off-line and on-line training. The proposed method can reduce the number of the training data, at the same time, can hasten the training. Usefulness is confirmed through computer simulation.

We developed a glass ferrule fiber optic connector. During development, we also studied wear-resistant coating technology for preventing scratches on the surface of a glass ferrule. The method of coating was sputtering, and the material was alumina. We confirmed that a thin uniform coating could be formed on the ferrule surface to improve the durability of glass ferrule connectors.

A more judicious choice of trial functions to implement the Improved Circuit Theory (ICT) application to multi-element antennas is achieved. These new trial functions, based on Tai's modified variational implementation for single element antennas, leads to an ICT implementation applicable to much longer co-planar dipole arrays. The accuracy of the generalized impedance formulas is in good agreement with the method of moments. Moreover, all these generalized formulas including the radiation pattern expressions are all in closed-form. This leads to an ICT implementation which still requires much shorter CPU time and lesser computer storage compared to method of moments. Thus, for co-planar dipole arrays, the proposed implementation presents a relatively very efficient method and would therefore be found useful in applications such as CAD/CAE systems.

This paper describes the fiber unit blowing length of an optical fiber distribution system for business buildings which employs pipe cable, fiber units and the fiber unit blowing technique. The relationship between the applied force and the length of a fiber unit blown into a straight pipe is investigated theoretically and experimentally and the fiber unit blowing length is estimated. Moreover, the pipe bending radius which has a small bending resistance force is clarified. Cables, fiber units and unit blowing equipment are manufactured based on the results and their transmission and mechanical characteristics are confirmed to be stable.

This paper studies a congestion control scheme in integrated variable bit-rate video, audio and data (e. g. , image or text) communications, where each video stream is synchronized with the corresponding audio stream. When the audio and video streams are output, media synchronization control is performed. To avoid congestion, we employ a dynamic video resolution control scheme which dynamically changes the video encoding rate according to the network loads. By simulation, the paper evaluates the performance of the scheme in terms of throughput, loss rate, average delay, and mean square error of synchronization. Numerical results show the effectiveness of the scheme.

A technique for realization of low-voltage OTAs is presented in this letter. A very low-voltage differential-output OTA is realized by employing a new common-mode amplifier in the common-mode feedback circuit. The results of PSpice simulations are shown. The proposed OTA can operate at a 0. 9 V supply voltage.

This paper examines the design considerations for an opamp to be used in a low-power consumption LCD driver IC: (1) slew rate enhancement suitable for a rail-to-rail input stage; (2) improved phase compensation with reduced compensation capacitance; and (3) limitation of instantaneous current consumption. The experimental results support our opamp design approach and indicate the feasibility of a 10 µA quiescent current opamp.

In this letter, a realization of current-mode active filter using current followers as active element is described. We show the constructions of second-order lowpass, highpass and bandpass filters. The high-order filters can be realized by a cascade connection of these second filters. As examples, the second-order lowpass and highpass filters are designed for frequency of 5 MHz. The effectiveness of the proposed method is demonstrated through SPICE simulation.

The paper is focused on the architectural and technological solutions that will allow the transition from small to huge capacity ATM Switching Systems. This path starts from the industrial nodes available today and will arrive at the photonic switching architecture. The progressive introduction of photonics has already started with the use of optical interconnections in ATM nodes of hundreds of Gbit/s. A balanced use of microelectronics and photonics is the correct answer to the Terabit/s switching system challenge. After presenting a modular ATM Switching System, some technological solutions like Multichip Modules and Optical Interconnections are presented in order to explain how node capacity can be expanded. Some results of the research activity on photonic Switching are finally shown in order to exploit the great attitude of this technique to obtain very high throughput nodes.

Predicting the performance of high speed wide area ATM networks (WANs) is a difficult task. Evaluating the performance of these systems by means of mathematical models is not yet feasible. As a result, the creation of simulation models is usually the only means of predicting and evaluating the performance of such systems. In this paper, we use measurements to validate simulation models of TCP/IP over high speed ATM wide area networks. Validation of simulations with measurements is not common; however, it is needed so that simulation models can be used with confidence to accurately characterize the performance of ATM WANs. In addition, the appropriate level of complexity of the simulation models needs to be determined. The results show that under appropriate conditions simulation models can accurately predict the performance of complex high speed ATM wide area networks. This work also shows that the user perceived performance is dependent on host processing demands.

Asynchronous Transfer Mode (ATM) networks are expected to support a diverse mix of traffic sources requiring different Quality Of Service (QOS) guarantees. This paper initially examines several existing scheduling disciplines which offer delay guarantees in ATM switches. Among them, the Earliest-Due-Date (EDD) discipline has been regarded as one of the most promising scheduling disciplines. The EDD discipline schedules the departure of a cell belonging to a call based on the delay priority assigned for that call during the call set-up. Supporting n delay-based service classes through the use of n respective urgency numbers D0 to Dn-1 (D0D1 Dn-1), EDD allows a class-i cell to precede any class-j (j>i) cell arriving not prior to (Dj-Di)-slot time. The main goal of the paper is to determine the urgency numbers (Dis), based on an in-depth queueing analysis, in an attempt to offer ninety-nine percentile delay guarantees for higher priority calls under various traffic loads. In the analysis, we derive system-time distributions for both high- and low-priority cells based on a discrete-time, single-server queueing model assuming renewal and non-renewal arrival processes. The validity of the analysis is justified via simulation. With the urgency numbers (Dis) determined, we further propose a feasible efficient VLSI implementation architecture for the EDD scheduling discipline, furnishing the realization of QOS guarantees in ATM switches.

Although ATM networks support various traffic requirements, but many data applications are unable to precisely specify traffic parameters such as bit rate. These applications generally require a dynamic share of the available bandwidth among all active connections, they are called available-bit-rate (ABR) service. Due to bursty and unpredictable pattern of an ABR data stream, its traffic control is more challenging than other services. In this paper, we present an improved ABR traffic control approach, called Offset Proportional Rate Control Algorithm (OPRCA). The proposed approach achieves high link utilization, low delay and weighted fair sharing among contenting sources according to the predefined OPR. The implementation is much simpler than that of existing schemes. OPRCA combines an end-to-end rate control with link-by-link feedback control, and employs a buffering scheme that avoids Head-of-Line (HOL) blocking. It can dynamically regulate the transmission rate of source traffic and maintain the real fairness among all active connections. Simulation results have shown the effectiveness of OPRCA in several performance aspects.

Typical concepts concerning memorizing capability of multilayer neural networks are statistical capacity and Vapnik-Chervonenkis (VC) dimension. These are differently defined each other according to intended applications. Although for the VC dimension several tighter upper bounds have been proposed, even if limited to networks with linear threshold elements, in literature, upper bounds on the statistical capacity are available only by the order of magnitude. We argue first that the proposed or ordinary formulation of the upper bound on the statistical capacity depends strongly on, and thus, it is possibly expressed by the number of the first hidden layer units. Then, we describe a more elaborated upper bound of the memorizing capacity of multilayer neural networks with linear threshold elements, which improves former results. Finally, a discussion of gaining good generalization is presented.

In this paper, we discuss configurations of photonic ATM (Asynchronous Transfer Mode) switches and their advantages in terms of the number of optical switching devices to be implemented on the system, the number of wavelengths, throughput, broadcast function etc. In particular, we focus on photonic ATM switch architectures which can be built in the near future; that is, with presently available optical and electrical devices. For example, we assume the optical devices such as optical gate switches with 40 dB on/off ratio. In this context, we evaluate 17 types of photonic ATM switches; they are 6 types of input buffer type switches, 6 types of output buffer type switches, 4 types of shared buffer switches, and 1 proposed type. From our evaluation, for cell switching, wavelength division switching technologies are desirable compared with space division switching technologies in the sense that the former enables us to build a photonic ATM switch with the less number of optical gate switches. Furthermore, we propose a switch architecture equipped with optical delay line buffers on outputs and electric buffers on inputs. We show that our switch architecture is superior in the number of required optical gate switch elements under the given conditions.

We propose a mechanically tunable passively mode-locked semiconductor laser with a high repetition rate using a simple configuration with a moving mirror located very close to a laser facet. This scheme is demonstrated for the first time by a novel micromechanical laser consisting of an InGaAsP/InP multisegment laser with a monolithic moving micro-mirror driven by an electrostatic comb structure. The main advantage of this laser is the capability of generating high-quality mode-locked pulses stabilized by a phase-locked loop (PLL) with low residual phase noise in a wide repetition-rate tuning range. This paper describes the basic concept and tuning performances utilizing the micromechanical passively mode-locked laser in 22-GHz fundamental mode-locking and in its second-harmonic mode-locking.

We show that moving objects can be detected from optical flow without using any knowledge about the magnitude of the noise in the flow or any thresholds to be adjusted empirically. The underlying principle is viewing a particular interpretation about the flow as a geometric model and comparing the relative "goodness" of candidate models measured by the geometric AIC.

Optimization of InGaAs/InAlAs multiple quantum well structures for high-speed and low-driving modulation, as well as polarization insensitivity and low chirp, was investigated as a function of well thickness and strain magnitude. As a result, very short optical pulses with 4-6 ps was obtained using a low driving-voltage (<2. 0 Vpp) electroabsorption modulator module operating at a 40-GHz large signal modulation. Small chirp operation for low insertion loss (<8 dB from fiber-to-fiber) with prebias was also demonstrated and the product of the pulse width and the spectral width was estimated to be 0. 39 for a 5 ps pulse width that is nearly transform-limited.

In this paper we review the stretched-pulse principle and discuss its inherent advantages for ultrashort pulse generation and transmission. An analytic theory of the stretched-pulse fiber laser is presented and shown to be in good agreement with experimental results. An extension of the stretched-pulse theory is applied to both fiber lasers and dispersion-allocated soliton transmission and then compared to numerical results. We also discuss the design and operation of an environmentally stable stretched-pulse fiber laser.

This paper describes an MOS current-mode sample-and-hold (S/H) circuit that potentially operates with a sub-1. 5 V supply voltage, 20 MHz clock frequency, and less than 0. 1% linearity. A newly developed voltage-to-current converter suppresses the voltage change at an input terminal and achieves low-voltage operation with superior linearity. Sample switches are differentially placed at the inputs of a differential amplifier so that the feedthrough errors from switches cancel out. The MOS current-mode S/H circuit is designed and simulated using CMOS 0. 6 µm device parameters. Simulation results indicate that an operation with 20 MHz clock frequency, linearity error of less than 0. 1%, and 1 MHz input from a 1. 5 V power supply is achievable.

This paper describes a method for analyzing active impedance, i. e. equivalent resistance and equivalent reactance, of a narrow-band transistor Colpitts crystal oscillator. This oscillator, employing an AT-cut resonator filter, has a very narrow-band width and an achievement of extremely low phase-noise characteristics is expected. The analysis proposed is based on an algebraic formula, which employs a nonlinear approximation for transistor gm, and a simplified circuit model. Calculated results are compared with the experimental results in the frequency characteristics of the oscillator active impedance with changing the driving signal current. Good agreement between the calculation and experimental results shows that the proposed technique is suitable for designing Colpitts crystal oscillators with resonator filters. In addition we apply this technique to the analysis of dual-mode crystal oscillators.