We introduce a subclass of context-free languages, called pure context-free (PCF) languages, which is generated by context-free grammars with only one type of symbol (i. e. , terminals and nonterminals are not distinguished), and consider the problem of identifying paralleled even monogenic pure context-free (pem-PCF) languages, PCF languages with restricted and enhanced features, from positive data only. In this paper we show that the ploblem of identifying the class of pem-PCF languages is reduced to the ploblem of identifying the class of monogenic PCF (mono-PCF), by decomposing each string of pem-PCF languages. Then, with its result, we show that the class of pem-PCF languages is polynomial time identifiable in the limit from positive data. Further, we refer to properties of its identification algorithm.

This paper evaluates the throughput performance of a switch architecture for broadband networks that is capable of switching variable-length packets. The structure is connectionless, so that no bandwidth reservation takes place before the user packet, or datagram, is transferred. The interconnection network is assumed to be internally non-blocking and provided with input queues. A previous approximated throughput analysis of the proposed system has been carried out under the hypothesis that the length of the offered packets is uniformly distributed. In this work we perform an exact throughput analysis and we show how the actual throughput of the system can be expressed analytically with a simple closed form. Moreover, we consider a more general case of packet length distributed as a truncated exponential. In this way it is possible to account for cases in which short packets are more frequent than long packets or, conversely, long packets are more frequent than short ones. The minimum throughput of the system is obtained when packets are uniformly distributed; a better performance is obtained when short (long) packets are more frequent than long (short) ones.

The novel application potential of mode-locked laser diodes (MLLDs) in ultrafast optical signal processing in addition to coherent optical pulse generation is described. As the most fundamental function of MLLDs, we show that the generation of ultrashort (2 ps) coherent optical pulses with low timing jitter (<0. 5 ps) at precisely controlled wavelength and repetition frequency can be achieved by employing a rigid module configuration for an external-cavity MLLD. We then discuss new aspects of MLLDs which are functions of ultrafast all-optical signal processing such as optical clock extraction and optical gating. All-optical clock extraction is based on the timing synchronization of MLLD output to the injected optical data pulse. When the passive mode-locking frequency of an MLLD is very close to the fundamental clock pulse frequency of optical data, the former frequency is pulled into the latter frequency by optical data injection. We show that same-frequency and subharmonic-frequency optical clock pulses can successfully be extracted from optical data pulses at bit rates of up to 80 Gbit/s with very simple configurations and very low excess timing jitter (<0. 1 ps). On the other hand, optical gating is due to absorption saturation and the following picosecond absorption recovery in a saturable absorber (SA) in an MLLD structure incorporating optical gate-pulse amplification. Here, MLLDs are anti-reflection coated and used as traveling wave devices instead of laser oscillators, and small saturation energy (<1 pJ) and ultrafast recovery time (<8 ps) are demonstrated. By combining all these MLLD functions, we successfully demonstrated an experiment with 40- to 10-Gbit/s all-optical demultiplexing processing.

This paper presents a new scheme to estimate depth in a natural three-dimensional scene using a multi-viewpoint image set. In the conventional Multiple-Baseline Stereo (MBS) scheme for the image set, although errors of stereo matching are somewhat reduced by using multiple stereo pairs, the use of square blocks of fixed size sometimes causes false matching, especially, in that image area where occlusion occurs and that image area of small variance of brightness levels. In the proposed scheme, the reference image is segmented into regions which are capable of being arbitrarily shaped, and a depth value is estimated for each region. Also, by comparing the image generated by projection with the original image, depth values are newly estimated in a top-down manner. Then, the error of the previous depth value is detected, and it is corrected. The results of experiments show advantages of the proposed scheme over the MBS scheme.

In this paper, we develop a novel method for tuning parameters known as the sensitivity parameters of membership functions used in a fuzzy classifier. The proposed method performs tuning by solving a set of inequalities. Each inequality represents a range of the ratio of the sensitivity parameters between the corresponding pair of classes. The range ensures the maximum classification rate for data of the two corresponding classes used for tuning. First, we discuss how such a set of inequalities is derived. We then propose an algorithm to solve the derived set of inequalities. We demonstrate the effectiveness of the proposed tuning method using two classification problems, namely, classification of commonly used iris data, and recognition of vehicle licence plates. The results are compared with those obtained by using the existing tuning method and with those by neural networks.

In this paper, two universal building blocks for complex filter using CCIIs, CFCCIIs, grounded resistors and grounded capacitors are presented. These can be used to realize various complex bandpass filters with arbitrary order. The paper shows that the response error of the proposed circuit caused by nonideality of active components is more easily compensated than that of the conventional one employing op-amps, and that the sensitivities for all components are relatively small. Experimental results are used for verifying the validity of the proposed circuits.

The paper is focused on the architectural and technological solutions that will allow the transition from small to huge capacity ATM Switching Systems. This path starts from the industrial nodes available today and will arrive at the photonic switching architecture. The progressive introduction of photonics has already started with the use of optical interconnections in ATM nodes of hundreds of Gbit/s. A balanced use of microelectronics and photonics is the correct answer to the Terabit/s switching system challenge. After presenting a modular ATM Switching System, some technological solutions like Multichip Modules and Optical Interconnections are presented in order to explain how node capacity can be expanded. Some results of the research activity on photonic Switching are finally shown in order to exploit the great attitude of this technique to obtain very high throughput nodes.

In [1] a generalized concatenated code was used to construct the t-fold unidirectional b-bit-byte error-correcting/d(dt)-fold unidirectional b-bit-byte error-detecting (t-UbEC/d(t)-UbED) codes. The concatenated code is to choose an inner code satisfying some disjoint sets and each set is a binary b-tuples unordered code. However, [1] gave five methods including trial and error to construct the optimal inner codes. Here, we present a systematic method for constructing the inner codes. It is shown that we can improve the coding efficiency for t-UbEC/d(t)-UbED) codes in some cases by using our inner codes.

It is shown from the Hilberts theory that if the real function Π(θ) has no zeros over the interval [0, 2π], it can be factorized into a product of the factor π+(θ) and its complex conjugate π-(θ)(=). This factorization is tested to decompose a real far-zone field pattern having zeros. To this end, the factorized factors are described in terms of bicomplex mathematics. In our bicomplex mathematics, the temporal imaginary unit "j" is newly defined to distinguish from the spatial imaginary unit i, both of which satisfy i2=-1 and j2=-1.

This paper proposes a novel broad-band MMIC VCO using an active inductor. This VCO is composed of a serial resonant circuit, in which the capacitor is in series with an active inductor that has a constant negative resistance. Since the inductance value of this active inductor is inversely proportional to the square of the transconductance and can vary widely with the FETs gate bias control, a broad-band oscillation tuning range can be obtained. Furthermore, since this active inductor can generate a constant negative resistance of more than 50Ω, the proposed VCO can oscillate against a 50Ω output load immediately without using additional impedance transformers. We have fabricated the VCO using a GaAs MESFET process. A frequency tuning range of more than 50%, from 1.56 to 2.85 GHz, with an output power of 4.41.0 dBm, was obtained. With a carrier of 2. 07 GHz, the phase noise at 1-MHz offset was less than -110 dBc/Hz. The chip size was less than 0. 61 mm2, and the power consumption was 80 mW. This broad-band analog design can be used at microwave frequencies in PLL applications as a compact alternative to other types of oscillator circuits.

This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.

In this letter, a realization of current-mode active filter using current followers as active element is described. We show the constructions of second-order lowpass, highpass and bandpass filters. The high-order filters can be realized by a cascade connection of these second filters. As examples, the second-order lowpass and highpass filters are designed for frequency of 5 MHz. The effectiveness of the proposed method is demonstrated through SPICE simulation.

This paper analyzes pulse characteristics of actively mode-locked fiber lasers by including the group-velocity dispersion and the Kerr nonlinearity of the fiber, both of which have not been taken into account in the conventional theory of mode locking. We show that chirped sech pulses are generated from nonlinear and dispersive fiber lasers. By considering the stability of the laser, we also derive design rules for the generation of ultra-short pulses.

We show that moving objects can be detected from optical flow without using any knowledge about the magnitude of the noise in the flow or any thresholds to be adjusted empirically. The underlying principle is viewing a particular interpretation about the flow as a geometric model and comparing the relative "goodness" of candidate models measured by the geometric AIC.

This paper deals with an orthogonal functional expansion of a non-linear stochastic functional of a stationary binary sequence taking 1 with unequal probability. Several mathematical formulas, such as multivariate orthogonal polynomials, recurrence formula and generating function, are given in explicit form. A formula of an orthogonal functional expansion for a stochastic functional is presented; the completeness of expansion is discussed in Appendix.

We present a collection of new network control protocols for high-speed networks that are geared to overcome some of the important drawbacks of existing protocols, namely (a) the inefficiencies of existing wait-for-reservation type of protocols for multigigabit wide area networks, (b) the implementation difficulties of credit-based flow control schemes, and (c) the packet resequencing problem of deflection-based schemes. Two of the protocols that will be outlined here were designed in the context of the DARPA sponsored Thunder and Lightning project, at the University of California, Santa Barbara, which is a continuing research effort to design and build a virtual-circuit switched, ATM-based, fiber optic network operating at link speeds of up to 40 Gb/s (see, for instance). The third protocol was designed in the context of MOST project, which is a project on (almost) all-optical switching supported by DARPA. All protocols achieve lossless transmission, efficient utilization of the capacity, and minimum pre-transmission delay for delay-sensitive traffic.

We propose a hardware-based packet forwarder for multi-gigabit IP backbone networks. The conventional Internet deploys routers as a key block, but its software-controlled architecture makes it hard to scale up the packet forwarders, especially for table-lookup processes. We propose introducing a pure connectionless (CL) switching approach with a hardware-based forwarder to construct the core part of a scalable IP multi-gigabit backbone. Compared to a software-based forwarder, the table-lookup time is reduced to 100 ns by using content-addressable memory. This hardware-based pipeline implementation easily achieves a maximum forwarding performance of up to 9. 6-Gbps, or 23 million packets per second, for applications ranging from traditional best-effort IP applications to newly emerging time-critical ones. We also consider additional processing when transferring IP packets to enhance best-effort quality. This is done using selective packet-level discarding, including early packet discard and its enhancement, to achieve minimum bandwidth guaranteed service at the packet level. We discuss the IP backbone scalability issue from the viewpoint of new IP-forwarder technologies, paying special attention to connection-oriented (CO) vs. CL switching and hardware vs. software implementation. A pure CL switching solution consisting of a CL server (CLS) and a CL client (CLC) is proposed to balance the hardware- and software-based CL transport functions. As a first step to this solution, a compact CLS has been developed. It supports 600-Mbps throughput and up to 9. 6-Gbps forwarding power using a modular architecture. It was evaluated in an ATM field trial using an experimental network. The results show the effectiveness of our approach to providing enhanced best effort services.

Predicting the performance of high speed wide area ATM networks (WANs) is a difficult task. Evaluating the performance of these systems by means of mathematical models is not yet feasible. As a result, the creation of simulation models is usually the only means of predicting and evaluating the performance of such systems. In this paper, we use measurements to validate simulation models of TCP/IP over high speed ATM wide area networks. Validation of simulations with measurements is not common; however, it is needed so that simulation models can be used with confidence to accurately characterize the performance of ATM WANs. In addition, the appropriate level of complexity of the simulation models needs to be determined. The results show that under appropriate conditions simulation models can accurately predict the performance of complex high speed ATM wide area networks. This work also shows that the user perceived performance is dependent on host processing demands.

We implement a graphical interface that automatically transforms a figure input by a mouse into a regular figure which the system infers is the closest to the input. The difficulty lies in the fact that the classes into which the input is to be classified have inclusion relations, which prohibit us from using a simple distance criterion. In this letter, we show that this problem can be resolved by introducing the geometric AIC.

An oversampling theorem for regular sampling in wavelet subspaces is established. The sufficient-necessary condition for which it holds is found. Meanwhile the truncation error and aliasing error are estimated respectively when the theorem is applied to reconstruct discretely sampled signals. Finally an algorithm is formulated and an example is calculated to show the algorithm.