A 7GS/s complete-DDFS-solution featuring a two-times interleaved RDAC with 1.2Vpp-diff output swing was fabricated in 65nm CMOS. The frequency tuning and amplitude resolutions are 24-bits and 10-bits respectively. The RDAC includes a mixed-signal, high-speed architecture for random swapping thermometer coding dynamic element matching that improves the narrowband SFDR up to 8dB for output frequencies below 1.85GHz. The proposed techniques enable a 7 GS/s operation with a spurious-free dynamic range better than 32dBc over the full Nyquist bandwidth. The worst case narrowband SFDR is 42dBc. This system consumes 87.9mW/(GS/s) from a 1.2V power supply when the RSTC-DEM method is enabled, resulting in a FoM of 458.9GS/s·2(SFDR/6)/W. A proof-of-concept chip with an active area of only 0.22mm2 was measured in prototypes encapsulated in a 144-pins low profile quad flat package.

The analytical derivation of the diversity-multiplexing tradeoff (DMT) for a half-duplex dynamic decode and forward (DDF) MIMO relay protocol has been regarded as an open problem. Recently, however, a minimization problem setting has been found, the solution of which corresponds to the DMT function for a half-duplex DDF MIMO relay protocol. In this paper, the DMT functions for three special half-duplex DDF MIMO relay protocols using two antennas at two of three nodes, source, relay, and destination nodes, and a single antenna at the other node are derived first. Then, the DMT function for a special half-duplex DDF MIMO relay protocol using two antennas at every node is derived. These DDF MIMO relay protocols are compared with one another and with some NAF MIMO relay protocols by simulation.

In this letter, dynamic decode-and-forward (DDF) protocol and static decode-and-forward (SDF) protocol are considered in a two-way half-duplex fading system, where two sources are equipped with multiple antennas and a relay is equipped with a single antenna. Their closed-form expressions of diversity multiplexing tradeoff (DMT) are derived, respectively. From the results, DDF always outperforms SDF in terms of DMT, achieves DMT gain over nonorthogonal amplify-and-forward (NAF) in low spectral efficiency scenarios, but is inferior to NAF in high spectral efficiency scenarios.

An analysis and design of a CMOS differential pair and a common source amplifier for shaping a triangular signal into 0-π/4 segments of sine and cosine waveforms are presented. By multiplexing these two shaped outputs, low distortion full sine and cosine signals can be produced at one fourth the frequency of the triangular input. These two circuits can be combined with one DAC and a phase accumulator to form a compact quadrature direct digital frequency synthesizer (Q-DDFS) suitable for generating low distortion sinusoidal signals at low frequency. The shapers are biased by two current generators specially designed to compensate for process parameter variations. MOS dimensional mismatch is also studied. The analog part of the Q-DDFS is synthesized using 0.18-micron n-well CMOS technology. A simulation shows that the circuit consumes 1.3 mW and can generate 19.96 mV 50 kHz sine and cosine signals with spurious free dynamic range (SFDR) of around 50 dBc from a Q-DDFS running at 1.6 MHz.

The increasing demand of low power Direct Digital Frequency Synthesizer (DDFS) leads to the requirement of efficient compression methods to reduce ROM size for storing sine function values. This paper presents a technique to achieve very high compression ratio by using the optimized four-segment linear difference method. The proposed technique results in the ROM compression ratio of about 117.3:1 and the word size reduction of 6 bits for the design of a DDFS with 11-bit sine amplitude output. This high compression ratio result is very promising to meet the requirement of low power consumption and low hardware complexity in digital VLSI technology.

We developed material and process technologies concerned to DDF, which is formed on MgO surface around the inter-pixel gap to prevent vertical crosstalk discharge in stripe rib structure. First we tried with thin film deposition and lift-off patterning to find Al2O3 and TiO2 are both available for DDF material. Next we tried with thick film printing in favor of mass productivity for large size PDPs. In case DDF included PbO glass, we met serious hardship in generating discharge. The problem was perfectly solved by having thick film DDF composed of 100 nm sized Al2O3 grains without glass component. Its γi was about 1/5 that of MgO, suggesting that the thick film DDF is almost compatible with thin film Al2O3 in electron emission characteristics. Such very small grain size contributes to DDF transparency, which is excellently high. In addition to it, such DDF is equipped with cushioning effect to prevent dot defects caused by rib breakage. Furthermore the DDF functions as getter during panel exhaustion to bring deep blue color by promoting deoxidization of blue phosphor provided that its volume is small enough. Transparent DDF may be rather better than black one with respect to bright room contrast ratio, not to mention to avoiding terrible sparking discharge. Thus material and process technologies for DDF have been almost fixed in success.

This paper presents a low-complexity equalization for M-ary biorthogonal keying based direct sequence ultra wideband (MBOK DS-UWB) systems. We focus on a Viterbi equalizer, which is based on maximum likelihood sequence estimation (MLSE). To reduce the computational complexity of MLSE-based equalizer, we use two strategies. One is the use of delayed-decision feedback sequence estimation (DDFSE), which is a hybrid estimation between MLSE and decision feedback estimation (DFE). And the other is the truncation of state transition in MLSE by considering MBOK pulse mapping. The reduced complexity sequence estimation is named as reduced state (RS)-DDFSE. By the use of RS-DDFSE, the complexity of Viterbi equalizer for MBOK DS-UWB is significantly reduced, by comparison with that of MLSE. The performance of RS-DDFSE based equalizer is evaluated on multipath fading channel models provided by IEEE802.15.3a. An analysis on trellis diagram of RS-DDFSE and simulation results show that the impact on error rate performance generated by the complexity lower is slight.

This paper presents high-speed low-power small-area accumulator designs to be used in DDFS systems. To reduce the Numerically Controlled Oscillator (NCO) design complexity and size, only the most significant bits of the accumulator drive the phase to amplitude mapping block. Those bits need to be updated on every sampling clock, while the least significant bits of the accumulator are not visible to the rest of the DDFS design and can be updated less frequently, which motivated the development of new accumulator designs. Without performance degradation, the proposed designs relieve constraints in implementation, and hence they can be employed for GHz-range DDFS, reduce power consumption up to 82% compared to standard accumulator design, and minimize chip area. For further power reduction, the proposed designs place the phase modulation adder at the front of the accumulator.

We propose a new cell configuration which newly employs discharge deactivation film (DDF). DDF is formed on MgO surface in stripe figure to cover it around the boundary of neighboring display lines. DDF prevents discharge cross talk between the lines even in case of stripe rib structure by virtue of its low secondary electron emission coefficient (γi). DDF also makes better address discharge response because it presumably moves address discharge closer to the surface dischage gap. On behalf of mass productivity for large size PDPs DDF is formed by simple screen-printing and firing method. And it consists of very fine Al2O3 grains without any inorganic binder. Such DDF is visually transparent and then helpful for high luminance and luminous efficiency. In addition to it, such DDF is presumably equipped with gas purifying character and then helpful for deep blue color and good white color balance accordingly. Further, DDF combined with sustain electrodes in specific figure which we call "CAPABLE DDF" brings about so high luminous efficiency for stripe rib structure as it may surpass box rib one. This probably means that vertically open discharge space in stripe rib structure is advantageous for high luminous efficiency. In our latest work for 46 inch-high definition PDPs, 2.1 lm/W and 1200 cd/m2 were both achieved under practical driving condition. Still it will be as high as 2.4 lm/W if each sustain electrode is shared by neighboring display lines. CAPABLE DDF allows more tolerance in DDF printing process. It also makes optical cross talk negligible even in stripe rib structure. And its durability against long time operation proved to have no specific problem. This presumably means that re-landing of sputtered MgO never reaches DDF surface. We believe this new technology can promise the future of stripe rib.

This paper describes a CORDIC-based direct digital frequency synthesizer in comparison with a ROM-based architecture. To optimize the hardware design parameters, we perform numerical analysis of the quantization effects for ROM and CORDIC-based architectures. The hardware costs of them are estimated in FPGA, which shows that the CORDIC-based architecture becomes better than the ROM-based when the required accuracy is 9 bits or more.