One of the main disadvantage of multi-carrier CDMA (MC-CDMA) signals is the high peak power of the transmitted signals which limits their applications. To account for this issue, we provide a simple signal processing for reducing the high crest factor (CF) of MC-CDMA signals. Using this modified MC-CDMA signal, the high CF due to Walsh spreading sequences can be mitigated without explicit side information and degradation in the detection performance.

Pilot-symbol-aided (PSA) channel estimation for OFDM wireless access systems enables the periodic estimation of channel frequency response by generating reference data from the received OFDM signals. The accuracy of this channel estimation can be improved through the average over a certain time period in each subcarrier-channel. However, the accuracy of the channel estimates by the average degrades as the Doppler shift is large due to a decrease in the average section size according to the Doppler shift for the tracking of the time-varying channel. This paper proposes a novel PSA channel estimation method to mitigate the influence of the noises and interferences. This method detects the channel estimates affected by the noises and interferences, and then removes them before the arithmetic or harmonic averaging to avoid propagating the influence of the noises and interferences. This paper also evaluated the proposed channel estimation method by clipping log-likelihood ratio (LLR) data to inspect the influence of the channel estimation on the LLR calculation by computer simulation.

This paper proposes a unified packet scheduling method that considers the delay requirement of each traffic data packet whether real time (RT) or non-real time (NRT), the channel conditions of each accessing user, and the packet type in hybrid automatic repeat request (ARQ), i.e., either initially transmitted packet or retransmitted packet, in the forward link for Orthogonal Frequency and Code Division Multiplexing (OFCDM) wireless access. In the proposed packet scheduling method, the overall priority function is decided based on PTotal = αDelayPDelay + αTypePType + αSINRPSINR (PDelay, PType, and PSINR are the priority functions derived from the delay requirement, type of packet, and the received signal-to-interference plus noise power ratio (SINR), respectively, and αDelay, αType, and αSINR are the corresponding weighting factors). The computer simulation results show that the weighting factor of each priority function as αType/αDelay = 0.6, αSINR/αDelay = 0.4 assuming the linear-type function in PDelay and a constant-type function in PType is optimized. Furthermore, we show that the outage probability for achieving the packet loss rate (PLR) of less than 10-3 for non-real time (NRT) traffic users employing the proposed packet scheduling method is reduced by approximately two orders of magnitude compared to that using the Priority Queuing (PQ) method while maintaining the PLR of real-time (RT) traffic users at the same level as that using the PQ method.

We evaluate the exact number of gates for circuits of Shor's factoring algorithm. We estimate the running time for factoring a large composite such as 576 and 1024 bit numbers by appropriately setting gate operation time. For example, we show that on the condition that each elementary gate is operated within 50 µsec, the running time for factoring 576 bit number is 1 month even if the most effective circuit is adopted. Consequently, we find that if we adopt the long gate operation-time devices or qubit-saving circuits, factorization will not be completed within feasible time on the condition that a new efficient modular exponentiation algorithm will not be proposed. Furthermore, we point out that long gate operation time may become a new problem preventing a realization of quantum computers.

This letter proposes a quadratic optimization decoding (QOD) for space-time block decoding in time-selective Rayleigh fading channels. When channels are fast fading, the simple decoding exploiting the orthogonal structure of the codes can not be used to achieve a proper error performance. In an effort to mitigate the severe performance degradation, in this letter least square decoding and QOD are considered for decoding. Simulation results show that the QOD shows a significant performance improvement compared to the least square and the conventional schemes.

Cowen gave a universal compact routing algorithm with a stretch factor of three and table-size of O(n2/3log4/3n) based on a simple and practical model. (The table-size is later improved to O(n1/2log3/2n).) This paper considers, using the same model, how the necessary table-size differs if the stretch factor must be less than three. It is shown that: (i) There is a routing algorithm with a stretch factor of two whose table-size is (n -+ 2)log n. (ii) There is a network for which any routing algorithm that follows the model and with a stretch factor of less than three needs a table-size of (n - 2)log n in at least one node. Thus, we can only reduce roughly an additive log n (i.e., table-entries) from the trivial table-size of n log n which obviously enables shortest-path routing. Furthermore it turns out that we can reduce only an additive log n (i.e., only one table-entry) from the trivial n log n if we have to achieve a stretch factor of less than two. Thus the algorithm (i) is (roughly) tight both in its stretch factor and in its table-size.

In this paper, we propose a multiuser detection (MUD) scheme for space-time block coded orthogonal frequency division multiplexing (STBC-OFDM) systems. We derive the optimum weight matrix used to decouple simultaneously signals from active multiple access users using the minimum mean square error (MMSE) multiuser detection method. The proposed scheme provides good performance over different models of the frequency selective fading channel. It is also to show that if the length of the cyclic prefix is larger than that of the channel, the performance of the detector depends on only the total energy extracted from multipath components but not the employed channel model, the number of multipath components or the delay of each multipath component.

The Mobius cube MQn proposed by Cull et al. is an alternative to the popular hypercube network. Recently, MQn was shown to be pancyclic, i.e., cycles of any lengths at least four can be embedded into it. Due to the importance of the fault tolerance in the parallel processing area, in this paper, we study an injured MQn with mixed node and link faults. We show that it is (n - 2)-fault-tolerant pancyclic for n 3, that is, an injured n-dimensional MQn is still pancyclic with up to (n - 2) faults. Furthermore, our result is optimal.

The polarized absorption measurement was employed to investigate the orientational order of the 4-n-4-pentyl-cyanobiphenyl (5CB) film of sub-nanometer thick. It was confirmed that this optical technique is simple but effective to observe the second orientational order parameter, S2, of the organic ultra thin film at the interface region.

In this paper, iterative adaptive soft parallel interference canceller (ASPIC) is proposed for turbo coded multiple-input multiple-output (MIMO) multiplexing. ASPIC is applied to transform a MIMO channel into single-input multiple-output (SIMO) channels for maximum ratio diversity combining (MRC). In the ASPIC, replicas of the interference are generated and subtracted from the received signals. For the generation of replicas with higher reliability, iterative ASPIC is proposed. It performs the iterative interference cancellation by feedback of the log-likelihood ratio (LLR) sequence obtained as the turbo decoder output. For iterative ASPIC, at the transmitter, the information sequence and parity sequence are transmitted from different antennas. In this paper, the achievable bit error rate (BER) performance, in a Rayleigh fading channel, for the turbo coded MIMO multiplexing with the proposed iterative ASPIC system is evaluated by computer simulation.

A large memory is typically designed with multiple identical memory blocks for reducing delay and power. The circuit verification of individual memory blocks can be effectively handled by the Symbolic Trajectory Evaluation (STE) approach. However, if multiple memory blocks are integrated into a single system, the STE approach cannot verify it economically. This paper introduces algorithms for verifying block-level connectivity of memories. The verification time of a large memory can be reduced drastically by using bottom-up verification scheme. That is, a memory block is first verified thoroughly, and then only the interconnection between memory blocks of the large memory needs to be verified. The proposed verification algorithms require (3n+2(log2n+1)+3log2m) Read/Write operations for a 2nm-bit memory, where n and m are the address width and data width, respectively. Also, the algorithms can verify 100% of the inter-port and intra-port signal misplaced faults of the address, data input, and data output ports.

In this paper, usage of undefined states on a State Transition Graph (STG) is addressed to obtain high fault coverage, in the area of Synthesis For Testability (SFT) of synchronous sequential circuits. Basically, a given STG could be modified by adding undefined states and distinguishable transitions so that each state might be included in one strongly-connected component as much as possible. Such modification decreases the number of redundant faults caused by the existence of unreachable states on an STG. For the modification, we propose two algorithms for both incompletely-specified STGs and completely-specified STGs, respectively. In case of incompletely-specified STGs, undefined states are added using unspecified transitions of defined states. In case of completely-specified STGs, undefined states are added by changing transitions specified on an STG while preserving state equivalence. Experimental results with MCNC benchmarks show that the number of redundant faults of gate-level circuits synthesized by our modified STGs are reduced, resulting in high fault coverage as well as short test generation time

We consider a rate control algorithm for elastic services to allocate bandwidth in a network subject to throughput and fairness constraints. Our algorithm achieves a max-min fair bandwidth allocation among contending elastic connections, and has desirable properties in that it can operate in a decentralized and asynchronous manner accounting in part for heterogeneity in round trip delays. The algorithm is simple and scalable in that, 1) the network links make local measurements of capacity and calculate local 'explicit rates' which are fed back to sources without requiring knowledge of the number of on-going connections, while 2) sources adjust their transmission rates so as not to exceed the received explicit rate indication. The algorithm is designed to track a "dynamic" network environment. We discuss its stability, convergence, and feasibility issues related to fair allocation and rate-based flow control. We also consider the role of sessions with priorities to differentiate among users with elastic services. Through rigorous analysis and simulations, we have shown that it has indeed desirable characteristics for networks with elastic services as well as other service types, which are expected to be common in future network environment.

New Recommendation and Future Standards highlight the Power Factor Correction (PFC) converter as a basic requirement for switching power supplies. Most high-frequency power factor correctors use resistor emulation to achieve a near-unity power factor and a small line current distortion. This technique requires forcing the input current with an average-current-mode control to follow the input voltage. Stability of this system was discussed previously by using some linear models. However, in this paper, two nonlinear phenomena have been encountered in the PFC circuit, period doubling bifurcation and chaos. Detection of these new instability phenomena in the stable regions predicted by the prior linear PFC models makes us more susceptible towards them, and reveals the need to consider a nonlinear models. A nonlinear model performing the practical operation of a boost PFC converter has been developed. Then, a simplified and accurate nonlinear model has been proposed and verified experimentally. As a result from this model, instability maps have been introduced to determine the boundary between stable and unstable operating ranges. Then, the period doubling bifurcation has been studied through a new proposed technique based on the capacitor storage energy. It is cleared that, As the load lessens, a required extra storage power is needed to achieve the significant increase in the output voltage. Then, if the PFC system can provide this extra energy, the operation can reach stability with new zero-storage energy else the system will have double-line zero energy that is period doubling bifurcation.

With the need and adoption of link aggregation where multiple links exist between two adjacent nodes in order to increase transmission capacity between them, there arise the problems of service guarantee and fair sharing of multiple servers. Although a lot of significant work has been done for single-server scheduling disciplines in the past years, not much work is available for multi-server scheduling disciplines. In this paper, we present and investigate two round robin based multi-server scheduling disciplines, which are Multi-Server Uniform Round Robin (MS-URR) and Multi-Server Deficit Round Robin (MS-DRR). In particular, we analyze their service guarantees and fairness bounds. In addition, we discuss the misordering problem with MS-DRR and present a bound for its misordering probability.

In this paper, we propose an autonomously distributed QoS control method for MPEG video streaming in a wide area network. The capacity of the links and the characteristics of video streams change dynamically. However, managing the condition of all the links and streams in the network is difficult. In the proposed method, the routers in the network monitor the conditions of the links and streams locally and control the transmission rate of the stream server. Picture-quality oriented fairness is achieved by reducing the transmission rate of the streams with the higher PSNR in the bottleneck link. The computer simulation results show that the proposed method can be applied to a wide area network.

Replication to mask the effects of failures is a basic technique for improving reliability of a file system. Consistency control protocols are implemented to ensure the consistency among these replicas. The native token-based mechanism which merely sequences the distributed requests suffered from the poor system utilization due to the lack of dependence checking between writes and management of out-of-ordered requests. Hence, in this paper, by utilizing the idempotent property of NFS and executing ahead most of independent WRITE requests, the new consistency control scheme is proposed to improve the performance of operations and failure recovery. Finally, a numeric case shows the efficiency of the new scheme.

We describe a new inconsistent case which is susceptible to occur while producing consistent answer set using prioritized default logic. We define new semantics for prioritized default logic in order to solve this problem. There is a sign difference between General and Extended logic programs. Extended logic programs are formulated using classical negation, For this reason, an inconsistent answer set can sometimes be produced. For the most part, default reasoning semantics successfully resolved this problem, but a conflict could still arise in one particular case. The purpose of this paper is to present this eventuality, and revise the semantics of default logic in order to give an answer to this problem.

Chemical sensor which can be used for a multi-purpose chemical measurement to detect various chemical substances with a small number of a sensor array was investigated. It was confirmed that chemical compounds adsorbed strongly and irreversibly on a platinum surface using conventional electrochemical methods and an instrumental surface analysis. The adsorbates were also analyzed by means of an electrochemical impedance spectroscopy under dynamic potential scan; measured impedance reflects CPE (constant phase element) properties of the electrode surface. The method provides a convenient technique for the surface analysis of adsorbing chemicals. The CPE response profile was modified through chemical adsorption/desorption and the interaction between the polarized surface and chemical substances. Consequently, various profiles depending on chemical substances were obtained and it had quantitative and qualitative information about chemicals interacting with the surface. The present method which does not require a specific electrochemical reaction can be applied for multi-purpose chemical sensors and also simple chemical analyses.

A stability of the cascade two-stage Power-Factor-Correction converter is investigated. The first stage is boost PFC converter to achieve a near unity power factor and the second stage is forward converter to regulate the output voltage. Previous researches studied the system using linear analysis. However, PFC boost converter is a nonlinear circuit due to the existence of the multiplier and the large variation of the duty cycle. Moreover, the effect of the second stage DC/DC converter on the first stage PFC converter adds more complexity to the nonlinear circuit. In this issue, low-frequency instability has been detected in the two-stage PFC converter assuring the limitation of the prior linear models. Therefore, nonlinear model is proposed to detected and explain these instabilities. The borderlines between stable and unstable operation has been made clear. It is cleared that feedback gains of the first stage PFC and the second stage DC/DC converters are the main affected parts to the total system stability. Then, a simplified nonlinear model is provided. Experiment confirm the two models with a good agreement. These nonlinear models have introduced new PFC design scheme by choosing the minimum required output capacitor and the feedback loop design.