In this paper, we describe a novel focusing mechanism that uses a varifocal mirror and its application to measuring the shape of solder bumps arrayed on an LSI package board based on the shape-from-focus technique. We used a copper-alloy mirror deformed by a piezoelectric actuator as a varifocal mirror to build a simple yet fast focusing mechanism. The varifocal mirror was situated at the focal point of the image-taking lens in image space so that the lateral magnification was constant during focusing and an orthographic projection was perfectly established. The focused plane could be shifted along the optical axis with a precision of 1.4 µm in a depth range of 1.3 mm by driving the varifocal mirror. A magnification of 1.97 was maintained during focusing. Evaluating the curvature of field and removing its effect from the depth data reduced errors. The shapes of 208 solder bumps, 260 µm high and arrayed at a pitch of 500 µm on the board, were measured. The entire 10 mm10 mm board was segmented into 34 partly overlapping sections. We captured 101 images in each section with a high-resolution camera at different focal points at 15 µm intervals. The shape of almost the entire upper hemisphere of a solder bump could be measured. The error in measuring the bump heights was less than 12 µm.

A micromirror for an external cavity diode laser is described. The mirror is supported by two sets of parallel torsion bars enabling piston motion as well as rotation. These motions are for realizing continuous wavelength tuning. Adjusting two rotations electrically, the pivot of the mirror rotation can be controlled. The long stroke of the vertical comb is realized by the deep three-dimensional structure prepared by the wafer bending method.

An electrostatically driven micromirror is described. The vertical comb of a three-dimensional microstructure is realized by bending the device wafer having microstructures. By resetting the bending angle, the tuning of the vertical gap between moving and stationary combs is possible. The characteristics of the vertical comb drive actuator can be tuned, confirming the performance.

Irregular Repeat-Accumulate (IRA) codes, introduced by Jin et al., have a linear-time encoding algorithm and their decoding performance is comparable to that of irregular low-density parity-check (LDPC) codes. Meanwhile the authors have introduced detailedly represented irregular LDPC code ensembles specified with joint degree distributions between variable nodes and check nodes. In this paper, by using density evolution method [7],[8], we optimize IRA codes specified with joint degree distributions. Resulting codes have higher thresholds than Jin's IRA codes.

This paper presents a performance and thresholds for Irregular Tree-LDPC codes. We obtain optimal irregular degree distributions and threshold by the density evolution technique. It is presented that Irregular Tree-LDPC code has performance gain at low SNR.

Displaced subdivision surface representation [13] is a new form of representing a polygonal surface model, where a detailed surface model is defined as a scaler-valued displacement map over a smooth domain surface; it puts forth a number of attractive features for editing, geometry compression, animation, scalability, and adaptive rendering of polygonal models. The construction of the smooth domain surface is a challenging task in the conversion process of a detailed polygonal surface model into this representation. In this paper, we propose a new efficient method for defining the smooth domain surface based on -subdivision scheme. The proposed algorithm not only performs better in terms of the quality of the generated surfaces but is computationally more efficient and occupies less memory as compared to the original algorithm [13] and generates surfaces with more levels of detail due to the specific nature of -subdivision when the prescribed target complexity of the generated mesh must not be exceeded. To corroborate the efficiency and the quality of the new technique, the conversion results for several public domain models have been presented.

This study presents a new current-mirror sense amplifier (CMSA) design for high-speed static random access memory (SRAM) applications. The proposed CMSA can directly sense the current of memory cell and only needs two transistor stages cascaded from VDD to GND for achieving the low-voltage operation. Moreover, the sensing speed of the proposed CMSA is independent of the bit-line capacitances and is only slightly sensitive to the data-line capacitances. Based on the simulation with using the TSMC 0.25-µm 2P4M CMOS process parameter, the proposed CMSA can effectively work at 500 MHz-1 GHz with working voltage as low as 1.5 V. Simulated results show that the proposed CMSA has a much speed improvement compared with the conventional sense amplifiers. Also, the effectiveness of the proposed CMSA is demonstrated with a read-cycle-only memory system to show the good performance for SRAM applications.

The least squares (LS) and the weighted least squares (WLS) algorithms are well known procedures that are used in the design of quadrature mirror filters (QMFs). It is known that these design techniques suffer from pass-band anomaly under certain conditions. A recent method, that overcomes pass-band anomaly for LS QMFs using a frequency sampling design for the initial filter, is extended to WLS design in this letter. A comparison between the modified LS and WLS designs based on experimental results is presented. Although WLS designs have been reported to have superior near-equiripple stop-band performance as compared to LS designs, we find that this is not always true. Specifically, LS designs, with inherent computational and robustness advantages, also have better peak stop-band ripple and transition bandwidth at higher cut-off frequencies than WLS.

Irregular Low-Density Parity-Check (LDPC) codes generally achieve better performance than regular LDPC codes at low Eb/N0 values. They have, however, higher error floors than regular LDPC codes. With respect to the construction of the irregular LDPC code, it can achieve the trade-off between the performance degradation of low Eb/N0 region and lowering error floor. It is known that a decoding algorithm can achieve very good performance if it combines the Ordered Statistic Decoding (OSD) algorithm and the Log Likelihood Ratio-Belief Propagation (LLR-BP) decoding algorithm. Unfortunately, all the codewords obtained by the OSD algorithm satisfy the parity check equation of the LDPC code. While we can not use the parity check equation of the LDPC code to stop the decoding process, the wrong codeword that satisfies the parity check equation raises the error floor. Once a codeword that satisfies the parity check equation is generated by the LLR-BP decoding algorithm, we regard that codeword as the final estimate and halt decoding; the OSD algorithm is not performed. In this paper, we propose a new encoding/decoding scheme to lower the error floor created by irregular LDPC codes. The proposed encoding scheme encodes information bits by Cyclic Redundancy Check (CRC) and LDPC code. The proposed decoding scheme, which consists of the LLR-BP decoding, CRC check, and OSD decoding, detects errors in the codewords obtained by the LLR-BP decoding algorithm and the OSD decoding algorithm using the parity check equations of LDPC codes and CRC. Computer simulations show that the proposed encoding/decoding scheme can lower the error floor of irregular LDPC codes.

This paper proposes a backlight module which drives multiple cold-cathode fluorescent lamps (CCFLs) with a current mirror technique to equalize the driving current for each lamp. We first adopt a half-bridge parallel-resonant inverter as the main circuit and use a single-input, multiple-output transformer to drive the multi-CCFLs. Next, we introduce current-mirror circuits to create a new current-sharing circuit, in which its current reference node and the parallel-connected multi-load nodes are used to accurately equalize all CCFLs' driving current. This will balance each lamp's brightness and, consequently, improve the picture display quality of the related liquid crystal display (LCD). This paper details the design concept for each component value with the assistance of an actual design example. The results of the example are examined with its actual measurements, which consequently verify the correctness of the proposed control strategy.

A method for constructing low-density convolutional (LDC) codes with the degree distribution optimized for block low-density parity-check (LDPC) codes is presented. If the degree distribution is irregular, the constructed LDC codes are also irregular. In this letter we give the encoding and decoding method for LDC codes, and study how to avoid the short cycles of LDC codes. Some simulation results are also presented.

The optimal design of complex infinite impulse response (IIR) two-channel quadrature mirror filter (QMF) banks with equiripple frequency response is considered. The design problem is appropriately formulated to result in a simple optimization problem. Therefore, based on a variant of Karmarkar's algorithm, we can efficiently solve the optimization problem through a frequency sampling and iterative approximation method to find the complex coefficients for the IIR QMFs. The effectiveness of the proposed technique is to form an appropriate Chebyshev approximation of a desired response and then find its solution from a linear subspace in several iterations. Finally, simulation results are presented for illustration and comparison.

We propose and demonstrate a new stacked packaging structure using silica-based planar lightwave circuits (PLCs) with integrated micro-mirrors. This structure enables us to integrate active devices on PLCs with certain flexibility as regards optical coupling design and device selection. To achieve this, we developed an integrated micro-mirror with an accurate reflection angle and shielding structures to prevent crosstalk, and successfully demonstrated an 8-channel photodiode array module with excellent characteristics consisting of a high responsivity of > 0.85 A/W and a low crosstalk of < -65 dB.

In this paper, we propose a technique for detection and real-time tracking of moving targets. This uses a color segmentation algorithm robust to irregular illumination variation and a line-based tracker. The former is based on statistical representation of a color. And, we can obtain a real-time property for detection and tracking of moving targets from the latter.

This paper proposes a new angular measurement system to a moving target in the presence of clutter. We apply MUSIC (MUltiple SIgnal Classification) to the outputs of a Doppler filter bank consisting of quadrature mirror filter (QMF). The comparison between QMF and the short time Fourier transform (STFT) as a preprocessor of MUSIC is also discussed. DOA estimation performance by QMF-MUSIC is nearly equal to that of STFT-MUSIC. On the other hand, QMF-MUSIC overcomes STFT-MUSIC in the aspect of computational cost. In a specific example in this paper, the proposal QMF bank by Daubechies (4th order) wavelet requires 80% fewer the number of multiplications and 25% fewer the number of additions than the FFT-based STFT filter bank.

Recently, the research on all-optical analog-to-digital conversion (ADC) has been extensively attempted to break through inherently limited operating speed of electronic devices. In this paper, we describe a novel quantization scheme by slicing supercontinuum (SC) spectrum for all-optical ADC and then propose a 2-bit all-optical ADC scheme consisting of the quantization by slicing SC spectrum and the coding by switching pulses with a nonlinear optical loop mirror (NOLM). The feasibility of the proposed quantization scheme was confirmed by numerical simulation. We conducted proof-of-principle experiments of optical quantization by slicing SC spectrum with an arrayed waveguide grating and optical coding by switching pulses with NOLM. We successfully demonstrated optical quantization and coding, which allows us to confirm the feasibility of the proposed 2-bit ADC scheme.

A low-power high-frequency sinusoidal quadrature oscillator is presented through a new RC technique using only CMOS current mirrors. The technique is relatively simple based on (1) internal capacitances of CMOS current mirrors and (2) a resistor of a CMOS current mirror for a negative resistance. Neither external capacitances nor inductances are required. As a particular example, a 2.4 GHz-0.4 mW, 0.325-fT, CMOS sinusoidal quadrature oscillator has been demonstrated. The power consumption is very low at approximately 0.4 mW. Total harmonic distortions (THD) are less than 0.3%. The oscillation frequency is current-tunable over a range of 540 MHz or 22%. The amplitude matching and the quadrature phase matching are better than 0.035 dB and 0.15, respectively. A figure of merit called a normalized carrier-to-noise ratio (CNRnorm) is 158.79 dBc/Hz at the 2 MHz offset from 2.46 GHz. Comparisons to other approaches are also presented.

The relation between resonant frequency of micromirror with vertical combdrives and applied voltage between the upper and lower comb teeth was analyzed. Resonant frequency of the micromirror was controlled by stiffness of the torsion hinge. Resonant frequency of the mirror was proportional to the applied voltage between the upper and lower comb teeth at the same tilt angle.

In this paper, we provide explicit representations of average weight and stopping set distributions and asymptotic expressions of their exponent for detailedly represented irregular LDPC code ensembles. Further we present numerical examples which compare a detailedly represented irregular LDPC code ensemble with a conventional one with respect to both of weight and stopping set distributions.

In this paper, we propose a method for constructing quasi-cyclic low-density parity-check codes randomly using cyclic shift submatrices on the basis of the girth of the Tanner graphs of these codes. We consider (3, K)-regular codes and first derive the necessary and sufficient conditions for weight-4 and weight-6 codewords to exist. On the basis of these conditions, it is possible to estimate the probability that a random method will generate a (3, K)-regular code with a minimum distance less than or equal to 6, and the proposed method is shown to offer a lower probability than does conventional random construction. Simulation results also show that it is capable of generating good codes both regular and irregular.