A system for measuring the low frequency amplitude and phase noises was set-up, with employing a phase sensitive detector and phase-shifter. It is noted that both noises were partly correlated. The phase noise was explained by the transit time fluctuation due to the fluctuating diffusion coefficient. The amplitude noise reduction was demonstrated by applying the inverted output of the phase noise to the amplitude noise.
Behzad D. MOTTAHED Souran MANOOCHEHRI
Effects of various joint configurations and gap sizes on the electromagnetic shielding effectiveness (SE) are evaluated to provide guidelines for best design of joints in order to increase the value of SE. Four different joint geometries are presented. A sharp decrease on SE with larger gap size for simple joints is observed. Addition of bends in the joint geometry has strong positive effect on the value of the SE. Increasing the angle of cut, which increases the effective length of the joint were also demonstrated to have increasing effect on the shielding performance.
The analysis of the shielding properties of chiral materials slabs is here presented, first deriving the spectral representation of the shielded fields, then getting the asymptotic expression of the transmission matrix in the higher frequencies. The time response of the shielded field for the NEMP incidence is finally deduced in a closed form.
The analysis of the shielding properties of a planar wire-mesh shield embedded in a general isotropic--chirality is included--or anisotropic stratified media is here presented. A suitable model of the grating has been introduced in order to consider the occuring phenomena, in fact through a spectral technique the electromagnetic problem is translated into the equivalent circuit network model that allows to express the time response of the shielded field for the NEMP incidence in a closed form.
In this paper, a new off-line handwritten word recognition method based on the explicit modeling of character junctures is presented. A handwritten word is regarded as a sequence of characters and junctures of four types. Hence both characters and junctures are explicitly modeled. A handwriting system employing hidden Markov models as the main statistical framework has been developed based on this scheme. An interconnection network of character and ligature models is constructed to model words of indefinite length. This model can ideally describe any form of hamdwritten words including discretely spaced words, pure cursive words, and unconstrained words of mixed styles. Also presented are efficient encoding and decoding schemes suitable for this model. The system has shown encouraging performance with a standard USPS database.
Kazuhisa OKADA Hidetoshi ONODERA Keikichi TAMURA
We propose a new compaction problem that allows layout elements to have many shape possibilities. The objective of the problem is to find not only positions but also shapes of layout elements. We present an efficient method to solve the problem--compaction with shape optimization. This method simplifies the problem by considering the optimization of shapes only for the layout elements on a critical path. The layout is compacted step by step while optimizing the shapes of layout elements. Another importance of this compaction technique is that it makes layout to be "recyclable" for other set of device parameters. The experimental examples, which attempt shape optimization and recycle of analog layout, confirms the importance and efficiency of our method.
Shinobu ISHIGAMI Ryoichi GOKITA Yoshifumi NISHIYAMA Ichiro YOKOSHIMA Takashi IWASAKI
The wave forms of electric and magnetic fields radiated by short gap discharges are measured to analyze electrostatic discharge (ESD) events in the near-field zone with the monopole antennas, the loop antenna and the 5.5GHz bandwidth waveform digitizer. The antenna outputs are corrected by the measured characteristics of the antennas. The relations between the measured electric field and the discharge currents are discussed.
A composite noise generator (CNG) is proposed for simulating the actual non-Gaussian noise and its applications are mentioned. Basing upon the actual measured result (APD) of induced noise from electric contact discharge arc, the APD is approximated by partial linearlization and shown that it can be simulated by a combination of plural Gaussian noise sources. Applying the CNG, quasi-peak (Q-P) detector is investigated and shown that the Q-P detector response is different for non-Gaussian noise when its time domain parameter is different even if its original APD is the same. For digital transmission error due to non-Gaussian noise, and for TV picture stained by the non-Gaussian noise, the CNG is applied to evaluate their performances and quality. The results obtained show that the CNG can be used as a standard non-Gaussian generator for several immunity tests for information equipments.
Kazuyuki WADA Nobuo FUJII Shigetaka TAKAGI
A method of driving the effects caused by finite input impedance and nonzero output impedance of functional building blocks into a frequency shift of transfer characteristics is proposed. The method is quite simple and systematic. The input and output impedances can have arbitrary values under a simple condition which meets the monolithic integration of circuits. The effects of non ideal input and output impedances are converted to a change of integrator gain leading to a simple frequency shift of circuits. The frequency shift can easily be adjusted by conventional methods. A typical example shows a remarkable effect of the method.
Sang Heon LEE Song Bai PARK Kyu Ho PARK
A simple method is presented to calculate the parasitic capacitance effect in the propagation delay of series-connected MOS (SCM) structures. This method divides SCM circuits into two parts and accurately calculates the contribution of each part to the difference from the delay without parasitic capacitances.
Tetsuro NISHINO Jaikumar RADHAKRISHNAN
We exactly determine the number of negations needed to compute the parity functions and the complement of the parity functions. We show that with k NOT gates, parity can be computed on at most 2k+11 variables, and parity complement on at most 2k+12 variables. The two bounds are shown to be tight.
Makoto TSUJIGADO Teruo HIKITA Jun GINBAYASHI
In formal specification languages for parallel processes, such as CSP and LOTOS, algebraic laws for basic operators are provided that can be used to transform process expressions, and in particular, composition of processes can be calculated using these laws. Process composition can be used to simplify and improve the specification, and also to prove properties of the specification such as deadlock absence. We here test the practicality of process composition using CSP and suggest useful techniques, working in an example with nontrivial size and complexity. We emphasize that the size explosion of composed processes, caused by interleaving of the events of component processes, is a serious problem. Then we propose a technique, which we name two-way pipe, that can be used to reduce the size of the composed process, regarded as a program optimization at specification level.
Shinichi SHIMOZONO Satoru MIYANO
For two finite disjoint sets P and Q of strings over an alphabet Σ, an alphabet indexing for P, Q by an indexing alphabet Γ with |Γ||Σ| is a mapping :ΣΓ satisfying
We developed a parallel bordered-block-diagonal (BBD) matrix solution for parallel circuit simulation. In parallel circuit sumulation on a MIMD parallel computer, a circuit is partitioned into as many subcircuits as the processors of a parallel computer. Circuit partition produce a BBD matrix. In parallel BBD matrix solution, diagonal blocks are easily solved separately in each processor. It is difficult, however, to solve the interconnection (IC) submatrix of a BBD matrix effectively in parallel. To make matters worse, the more a circuit is partitioned into subcircuits for highly parallel circuit simulation, the larger the size of an IC submatrix becomes. From an examination, we found that an IC submatrix is more dense (about 30% of all entries are non-zeros) than a normal circuit matrix, and the non-zeros per row in an IC submatrix are almost constant with the number of subcircuits. To attain high-speed circuit simulation, we devised a data structure for BBD matrix processing and an approach to parallel BBD matrix solution. Our approach solves the IC submatrix in a BBD matrix as well as the diagonal blocks in parallel using all processors. In this approach, we allocate an IC submatrix in block-wise order rather than in dot-wise order onto all processors. Thus, we balance the processor perfomance with the communication capacity of a parallel computer system. When we changed the block size of IC submatrix allocation from dot-wise order to 88 block-wise order, the 88 block-wise order allocation almost halved the matrix solution time. The parallel simulation of a sample circuit with 3277 transistors was 16.6 times faster than a single processor when we used 49 processors.
Two new algorithms for performing modular exponentiation are suggested. Nonstandard number systems are used. The first algorithm is based on the representing the exponent as a sum of generalized Fibonacci numbers. This representation is known as Zeckendorf representation. When precomputing is allowed the resulting algorithm is more efficient than the classical binary algorithm, but requires more memory. The second algorithm is based on a new number system, which is called hybrid binary-ternary number system (HBTNS). The properties of the HBTNS are investigated. With or without precomputing the resulting algorithm for modular exponentiation is superior to the classical binary algorithm. A conjecture is made that if more bases are used asymptotically optimal algorithm can be obtained. Comparisons are made and directions for future research are given.
This paper deals with the information leakage measurement in a distributed computation protocol called SASC. The SASC protocol is a kind of two-party protocol between a client and a server. The computation for RSA cryptosystem is the target of this paper. This paper shows that a secure RSA-SASC protocol proposed recently could be changed to be insecure if the client which has secret information were to complain about the computation result. This paper first clarifies how to measure the information amount which leaks through the protocol. It, then, shows an attack procedure to make use of the client's complaint. Effectiveness of the attack procedure is measured by the information theoretic measure. By using the same measure, it is shown that some attacks do not work to derive the client's secret. It is also shown that a practical countermeasure to limit the number of incorrect computation allowed is effctive to limit the leakage of the secret information to some reasonable extent.
Let L{0,1}* be a language and let λL : {0,1}*
George ISHIKAWA Motoyoshi SEKIYA Hiroshi ONAKA Terumi CHIKAMA Hiroshi NISHIMOTO
This paper proposes that a combination of pre-chirping and dispersion compensation is effective in suppressing the waveform distortion due to the self-phase modulation and the group-velocity dispersion in 10 Gb/s repeaterless transmission using 1.3-µm zero-dispersion single-mode fibers (SMF) operating at a wavelength of 1.55µm. The following results were obtained through simulation. 1) Setting the α-parameter of a LiNbO3 optical modulator negative (α1.0) gives a large tolerance of the launched power Pin. 2) For 90-km SMF transmission, the maximum Pin is obtained when the dispersion compensation ratio β is from 50% to 70%. 3) For the allowable β as a function of the transmission distance when a dispersion compensator is located in the receiver (post-compensation scheme), the lower limit of β is determined by the constant residual dispersion value, which agrees well with the dispersion tolerance without dispersion compensation. Our 90-km SMF transmission experiments using a LiNbO3 optical modulator and a dispersion compensating fiber (DCF) confirmed the simulation results regarding the optimum value of β and the large tolerance of the fiber launched power. Based on the above investigations, we achieved a 10-Gb/s repeaterless 140-km SMF transmission with α1.0 and post-compensation.
Tetsuro NISHINO Keisuke TANAKA
A negation-limited circuit is a combinational circuit which includes at most [log(n1)] NOT gates. We show a relationship between the size of negation-limited circuits computing clique functions and the number of NOT gates in the circuits.
Alfredo M. MAEDA Hideto TOMABECHI Jun-ichi AOE
Graph unification is doubtlessly the most expensive process in unification-based grammar parsing since it takes the vast majority of the total parsing time of natural language sentences. A parsing time overload in unification consists in that, in general, no less than 60% of the graph unifications performed actually fail. Thus one way to achieve unification time speed-up is focusing on an efficient, fast way to deal with such unification failures. In this paper, a process, prior to unification itself, capable of filtering or stopping a considerably high percentage of graphs that would fail unification is proposed. This unification-filtering process consists of comparison of signatures that correspond to each one of the graphs to be unified. Unification-filter (hereafter UF) is capable of stopping around 87% of the non-unifiable graphs before unification itself takes place. UF takes significantly less time to detect graphs that do not unify and discard them than it would take to unification to fail the attempt to unify the same graphs. As a result of using UF, unification is performed in an around 71% of the time for the fastest known unification algorithm.