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[Keyword] PAR(2741hit)

1321-1340hit(2741hit)

  • Multiuser Detection for Asynchronous Multicarrier CDMA Using Particle Swarm Optimization

    Muhammad ZUBAIR  Muhammad A.S. CHOUDHRY  Aqdas NAVEED  Ijaz Mansoor QURESHI  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E91-B No:5
      Page(s):
    1636-1639

    Due to the computational complexity of the optimum maximum likelihood detector (OMD) growing exponentially with the number of users, suboptimum techniques have received significant attention. We have proposed the particle swarm optimization (PSO) for the multiuser detection (MUD) in asynchronous multicarrier code division multiple access (MC-CDMA) system. The performance of PSO based MUD is near optimum, while its computational complexity is far less than OMD. Performance of PSO-MUD has also been shown to be better than that of genetic algorithm based MUD (GA-MUD) at practical SNR.

  • Particle Swarm with Soft Decision for Multiuser Detection of Synchronous Multicarrier CDMA

    Muhammad ZUBAIR  Muhammad A.S. CHOUDHRY  Aqdas NAVEED  Ijaz Mansoor QURESHI  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E91-B No:5
      Page(s):
    1640-1643

    The computation involved in multiuser detection (MUD) for multicarrier CDMA (MC-CDMA) based on maximum likelihood (ML) principle grows exponentially with the number of users. Particle swarm optimization (PSO) with soft decisions has been proposed to mitigate this problem. The computational complexity of PSO, is comparable with genetic algorithm (GA), but is much less than the optimal ML detector and yet its performance is much better than GA.

  • A Novel Expression of Spatial Correlation by a Random Curved Surface Model and Its Application to LSI Design

    Shin-ichi OHKAWA  Hiroo MASUDA  Yasuaki INOUE  

     
    PAPER

      Vol:
    E91-A No:4
      Page(s):
    1062-1070

    We have proposed a random curved surface model as a new mathematical concept which enables the expression of spatial correlation. The model gives us an appropriate methodology to deal with the systematic components of device variation in an LSI chip. The key idea of the model is the fitting of a polynomial to an array of Gaussian random numbers. The curved surface is expressed by a new extension from the Legendre polynomials to form two-dimensional formulas. The formulas were proven to be suitable to express the spatial correlation with reasonable computational complexity. In this paper, we show that this approach is useful in analyzing characteristics of device variation of actual chips by using experimental data.

  • Concise Modeling of Transistor Variations in an LSI Chip and Its Application to SRAM Cell Sensitivity Analysis

    Masakazu AOKI  Shin-ichi OHKAWA  Hiroo MASUDA  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E91-C No:4
      Page(s):
    647-654

    Random variations in Id-Vg characteristics of MOS transistors in an LSI chip are shown to be concisely characterized by using only 3 transistor parameters (Vth, β0, vSAT) in the MOS level 3 SPICE model. Statistical analyses of the transistor parameters show that not only the threshold voltage variation, ΔVth, but also the current factor variation, Δβ0, independently induces Id-variation, and that Δβ0 is negatively correlated with the saturation velocity variation, ΔvSAT. Using these results, we have proposed a simple method that effectively takes the correlation between parameters into consideration when creating statistical model parameters for designing a circuit. Furthermore, we have proposed a sensitivity analysis methodology for estimating the process window of SRAM cell operation taking transistor variability into account. By applying the concise statistical model parameters to the sensitivity analysis, we are able to obtain valid process windows without the large volume of data-processing and long turnaround time associated with the Monte Carlo simulation. The process window was limited not only by ΔVth, but also by Δβ0 which enhanced the failure region in the process window by 20%.

  • Issue Mechanism for Embedded Simultaneous Multithreading Processor

    Chengjie ZANG  Shigeki IMAI  Steven FRANK  Shinji KIMURA  

     
    PAPER

      Vol:
    E91-A No:4
      Page(s):
    1092-1100

    Simultaneous Multithreading (SMT) technology enhances instruction throughput by issuing multiple instructions from multiple threads within one clock cycle. For in-order pipeline to each thread, SMT processors can provide large number of issued instructions close to or surpass than using out-of-order pipeline. In this work, we show an efficient issue logic for predicated instruction sequence with the parallel flag in each instruction, where the predicate register based issue control is adopted and the continuous instructions with the parallel flag of '0' are executed in parallel. The flag is pre-defined by a compiler. Instructions from different threads are issued based on the round-robin order. We also introduce an Instruction Queue skip mechanism for thread if the queue is empty. Using this kind of issue logic, we designed a 6 threads, 7-stage, in-order pipeline processor. Based on this processor, we compare round-robin issue policy (RR(T1-Tn)) with other policies: thread one always has the highest priority (PR(T1)) and thread one or thread n has the highest priority in turn (PR(T1-Tn)). The results show that RR(T1-Tn) policy outperforms others and PR(T1-Tn) is almost the same to RR(T1-Tn) from the point of view of the issued instructions per cycle.

  • Enhancing PC Cluster-Based Parallel Branch-and-Bound Algorithms for the Graph Coloring Problem

    Satoshi TAOKA  Daisuke TAKAFUJI  Toshimasa WATANABE  

     
    PAPER

      Vol:
    E91-A No:4
      Page(s):
    1140-1149

    A branch-and-bound algorithm (BB for short) is the most general technique to deal with various combinatorial optimization problems. Even if it is used, computation time is likely to increase exponentially. So we consider its parallelization to reduce it. It has been reported that the computation time of a parallel BB heavily depends upon node-variable selection strategies. And, in case of a parallel BB, it is also necessary to prevent increase in communication time. So, it is important to pay attention to how many and what kind of nodes are to be transferred (called sending-node selection strategy). In this paper, for the graph coloring problem, we propose some sending-node selection strategies for a parallel BB algorithm by adopting MPI for parallelization and experimentally evaluate how these strategies affect computation time of a parallel BB on a PC cluster network.

  • Power-Aware Compiler Controllable Chip Multiprocessor

    Hiroaki SHIKANO  Jun SHIRAKO  Yasutaka WADA  Keiji KIMURA  Hironori KASAHARA  

     
    PAPER

      Vol:
    E91-C No:4
      Page(s):
    432-439

    A power-aware compiler controllable chip multiprocessor (CMP) is presented and its performance and power consumption are evaluated with the optimally scheduled advanced multiprocessor (OSCAR) parallelizing compiler. The CMP is equipped with power control registers that change clock frequency and power supply voltage to functional units including processor cores, memories, and an interconnection network. The OSCAR compiler carries out coarse-grain task parallelization of programs and reduces power consumption using architectural power control support and the compiler's power saving scheme. The performance evaluation shows that MPEG-2 encoding on the proposed CMP with four CPUs results in 82.6% power reduction in real-time execution mode with a deadline constraint on its sequential execution time. Furthermore, MP3 encoding on a heterogeneous CMP with four CPUs and four accelerators results in 53.9% power reduction at 21.1-fold speed-up in performance against its sequential execution in the fastest execution mode.

  • Migration Effects of Parallel Genetic Algorithms on Line Topologies of Heterogeneous Computing Resources

    Yiyuan GONG  Senlin GUAN  Morikazu NAKAMURA  

     
    PAPER

      Vol:
    E91-A No:4
      Page(s):
    1121-1128

    This paper investigates migration effects of parallel genetic algorithms (GAs) on the line topology of heterogeneous computing resources. Evolution process of parallel GAs is evaluated experimentally on two types of arrangements of heterogeneous computing resources: the ascending and descending order arrangements. Migration effects are evaluated from the viewpoints of scalability, chromosome diversity, migration frequency and solution quality. The results reveal that the performance of parallel GAs strongly depends on the design of the chromosome migration in which we need to consider the arrangement of heterogeneous computing resources, the migration frequency and so on. The results contribute to provide referential scheme of implementation of parallel GAs on heterogeneous computing resources.

  • Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique

    Kazunori SHIMIZU  Nozomu TOGAWA  Takeshi IKENAGA  Satoshi GOTO  

     
    PAPER

      Vol:
    E91-A No:4
      Page(s):
    1054-1061

    Reducing the power dissipation for LDPC code decoder is a major challenging task to apply it to the practical digital communication systems. In this paper, we propose a low power LDPC code decoder architecture based on an intermediate message-compression technique which features as follows: (i) An intermediate message compression technique enables the decoder to reduce the required memory capacity and write power dissipation. (ii) A clock gated shift register based intermediate message memory architecture enables the decoder to decompress the compressed messages in a single clock cycle while reducing the read power dissipation. The combination of the above two techniques enables the decoder to reduce the power dissipation while keeping the decoding throughput. The simulation results show that the proposed architecture improves the power efficiency up to 52% and 18% compared to that of the decoder based on the overlapped schedule and the rapid convergence schedule without the proposed techniques respectively.

  • MIMO-OFDM MAP Receiver with Spatial-Temporal Filters Employing Decision-Directed Recursive Eigenvalue Decomposition Parameter Estimation

    Fan LISHENG  Kazuhiko FUKAWA  Hiroshi SUZUKI  Satoshi SUYAMA  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E91-B No:4
      Page(s):
    1112-1121

    This paper proposes a new parameter estimation method for the MIMO-OFDM MAP receiver with spatial-temporal filters. The proposed method employs eigenvalue decomposition (EVD) so as to attain precise estimates especially under interference-limited conditions in MIMO-OFDM mobile communications. Recursive EVD is introduced to reduce the computational complexity compared to the nonrecursive EVD. The spatial-temporal prewhitening is placed prior to FFT because this arrangement is superior to that of conventional prewhitening posterior to FFT in accuracy of the parameter estimation. In order to improve tracking capability to fast fading, the proposed scheme applies a decision-directed algorithm to the parameter estimation by using log-likelihood ratios of coded bits. Computer simulations demonstrate that the proposed scheme can track fast fading and reduce the complexity to 18 percents of the conventional one, and that the spatial-temporal filtering prior to FFT outperforms the conventional one posterior to FFT.

  • A Partitioned-SLM with Low Complexity for OFDM PAPR Reduction

    Suckchel YANG  Yoan SHIN  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E91-B No:4
      Page(s):
    1198-1202

    We propose the P-SLM (Partitioned-SeLected Mapping) scheme with low complexity for PAPR reduction of OFDM signals. In the proposed scheme, a symbol sequence in the frequency domain is partitioned into several sub-blocks which are multiplied by different orthogonal phase sequences whose length and number are shorter and smaller than those used in the conventional SLM. Then, among various sequences in the time domain generated after the IFFT for the SLM sub-blocks, the sub-block combination with the lowest PAPR is selected and transmitted. Simulation results show that the proposed P-SLM scheme significantly reduces the number of IFFT calculation and multiplication than the conventional SLM without loss of PAPR reduction performance.

  • Comparison of Classification Methods for Detecting Emotion from Mandarin Speech

    Tsang-Long PAO  Yu-Te CHEN  Jun-Heng YEH  

     
    PAPER-Human-computer Interaction

      Vol:
    E91-D No:4
      Page(s):
    1074-1081

    It is said that technology comes out from humanity. What is humanity? The very definition of humanity is emotion. Emotion is the basis for all human expression and the underlying theme behind everything that is done, said, thought or imagined. Making computers being able to perceive and respond to human emotion, the human-computer interaction will be more natural. Several classifiers are adopted for automatically assigning an emotion category, such as anger, happiness or sadness, to a speech utterance. These classifiers were designed independently and tested on various emotional speech corpora, making it difficult to compare and evaluate their performance. In this paper, we first compared several popular classification methods and evaluated their performance by applying them to a Mandarin speech corpus consisting of five basic emotions, including anger, happiness, boredom, sadness and neutral. The extracted feature streams contain MFCC, LPCC, and LPC. The experimental results show that the proposed WD-MKNN classifier achieves an accuracy of 81.4% for the 5-class emotion recognition and outperforms other classification techniques, including KNN, MKNN, DW-KNN, LDA, QDA, GMM, HMM, SVM, and BPNN. Then, to verify the advantage of the proposed method, we compared these classifiers by applying them to another Mandarin expressive speech corpus consisting of two emotions. The experimental results still show that the proposed WD-MKNN outperforms others.

  • Modeling Network Intrusion Detection System Using Feature Selection and Parameters Optimization

    Dong Seong KIM  Jong Sou PARK  

     
    PAPER-Application Information Security

      Vol:
    E91-D No:4
      Page(s):
    1050-1057

    Previous approaches for modeling Intrusion Detection System (IDS) have been on twofold: improving detection model(s) in terms of (i) feature selection of audit data through wrapper and filter methods and (ii) parameters optimization of detection model design, based on classification, clustering algorithms, etc. In this paper, we present three approaches to model IDS in the context of feature selection and parameters optimization: First, we present Fusion of Genetic Algorithm (GA) and Support Vector Machines (SVM) (FuGAS), which employs combinations of GA and SVM through genetic operation and it is capable of building an optimal detection model with only selected important features and optimal parameters value. Second, we present Correlation-based Hybrid Feature Selection (CoHyFS), which utilizes a filter method in conjunction of GA for feature selection in order to reduce long training time. Third, we present Simultaneous Intrinsic Model Identification (SIMI), which adopts Random Forest (RF) and shows better intrusion detection rates and feature selection results, along with no additional computational overheads. We show the experimental results and analysis of three approaches on KDD 1999 intrusion detection datasets.

  • Race-Free Mixed Serial-Parallel Comparison for Low Power Content Addressable Memory

    Seong-Ook JUNG  Sei-Seung YOON  

     
    LETTER-VLSI Design Technology and CAD

      Vol:
    E91-A No:3
      Page(s):
    895-898

    This letter presents a race-free mixed serial-parallel comparison (RFMSPC) scheme which uses both serial and parallel CAMs in a match line. A self-reset search line scheme for the serial CAM is proposed to avoid the timing race problem and additional timing penalties. Various 32 entry CAMs are designed using 90 nm 1.2 V CMOS process to verify the proposed RFMSPC scheme. It shows that the RFMSPC saves power consumption by 40%, 53% and 63% at the cost of a 4%, 6% and 16% increase in search time according to 1, 2, and 4 serial CAM bits in a match line.

  • Theoretical Results about MIMO Minimal Distance Precoder and Performances Comparison

    Baptiste VRIGNEAU  Jonathan LETESSIER  Philippe ROSTAING  Ludovic COLLIN  Gilles BUREL  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E91-B No:3
      Page(s):
    821-828

    This study deals with two linear precoders: the maximization of the minimum Euclidean distance between received symbol-vectors, called here max-dmin, and the maximization of the post-processing signal-to-noise ratio termed max-SNR or beamforming. Both have been designed for reliable MIMO transmissions operating over uncorrelated Rayleigh fading channels. Here, we will explain why performances in terms of bit error rates show a significant enhancement of the max-dmin over the max-SNR whenever the number of antennas is increased. Then, from theoretical developments, we will demonstrate that, like the max-SNR precoder, the max-dmin precoder achieves the maximum diversity order, which is warrant of reliable transmissions. The current theoretical knowledge will be applied to the case-study of a system with two transmit- or two receive-antennas to calculate the probability density functions of two channel parameters directly linked to precoder performances for uncorrelated Rayleigh fading channels. At last, this calculation will allow us to quickly get the BER of the max-dmin precoder further to the derivation of a tight semi-theoretical approximation.

  • 6-bit 1.6-GS/s 85-mW Flash Analog to Digital Converter Using Symmetric Three-Input Comparator

    Yun-Jeong KIM  Jong-Ho LEE  Ja-Hyun KOO  Kwang-Hyun BAEK  Suki KIM  

     
    LETTER-Electronic Circuits

      Vol:
    E91-C No:3
      Page(s):
    392-395

    In this paper, we describe a 6-bit 1.6-GS/s flash analog to digital converter (ADC). To reduce the power consumption and active area, we propose a new interpolation architecture using a symmetric three-input comparator. This ADC achieves 5.56 effective bits for input frequencies up to 220 MHz at 1.6 GS/s, and almost five effective bits for 660 MHz input at 1.6 GS/s. Peak INL and DNL are less than 0.5 LSB and 0.45 LSB, respectively. This ADC consumes 85 mW from 1.8 V at 1.6 GS/s and occupies an active area of 0.27 mm2. It is fabricated in 0.18-µm CMOS.

  • A Robust and Non-invasive Fetal Electrocardiogram Extraction Algorithm in a Semi-Blind Way

    Yalan YE  Zhi-Lin ZHANG  Jia CHEN  

     
    LETTER-Neural Networks and Bioengineering

      Vol:
    E91-A No:3
      Page(s):
    916-920

    Fetal electrocardiogram (FECG) extraction is of vital importance in biomedical signal processing. A promising approach is blind source extraction (BSE) emerging from the neural network fields, which is generally implemented in a semi-blind way. In this paper, we propose a robust extraction algorithm that can extract the clear FECG as the first extracted signal. The algorithm exploits the fact that the FECG signal's kurtosis value lies in a specific range, while the kurtosis values of other unwanted signals do not belong to this range. Moreover, the algorithm is very robust to outliers and its robustness is theoretically analyzed and is confirmed by simulation. In addition, the algorithm can work well in some adverse situations when the kurtosis values of some source signals are very close to each other. The above reasons mean that the algorithm is an appealing method which obtains an accurate and reliable FECG.

  • Remark about Transition Probabilities Calculation for Single Server Queues with Lognormal Inter-Arrival or Service Time Distributions

    Moon Ho LEE  Alexander DUDIN  Alexy SHABAN  Subash Shree POKHREL  Wen Ping MA  

     
    LETTER-Fundamental Theories for Communications

      Vol:
    E91-B No:3
      Page(s):
    904-906

    Formulae required for accurate approximate calculation of transition probabilities of embedded Markov chain for single-server queues of the GI/ M/1,GI/M/1/K,M/G/1,M/G/1/K type with heavy-tail lognormal distribution of inter-arrival or service time are given.

  • A Sparse Decomposition Method for Periodic Signal Mixtures

    Makoto NAKASHIZUKA  

     
    PAPER-Digital Signal Processing

      Vol:
    E91-A No:3
      Page(s):
    791-800

    This study proposes a method to decompose a signal into a set of periodic signals. The proposed decomposition method imposes a penalty on the resultant periodic subsignals in order to improve the sparsity of decomposition and avoid the overestimation of periods. This penalty is defined as the weighted sum of the l2 norms of the resultant periodic subsignals. This decomposition is approximated by an unconstrained minimization problem. In order to solve this problem, a relaxation algorithm is applied. In the experiments, decomposition results are presented to demonstrate the simultaneous detection of periods and waveforms hidden in signal mixtures.

  • Embedded System Implementation of Sound Localization in Proximal Region

    Nobuyuki IWANAGA  Tomoya MATSUMURA  Akihiro YOSHIDA  Wataru KOBAYASHI  Takao ONOYE  

     
    PAPER-Engineering Acoustics

      Vol:
    E91-A No:3
      Page(s):
    763-771

    A sound localization method in the proximal region is proposed, which is based on a low-cost 3D sound localization algorithm with the use of head-related transfer functions (HRTFs). The auditory parallax model is applied to the current algorithm so that more accurate HRTFs can be used for sound localization in the proximal region. In addition, head-shadowing effects based on rigid-sphere model are reproduced in the proximal region by means of a second-order IIR filter. A subjective listening test demonstrates the effectiveness of the proposed method. Embedded system implementation of the proposed method is also described claiming that the proposed method improves sound effects in the proximal region only with 5.1% increase of memory capacity and 8.3% of computational costs.

1321-1340hit(2741hit)