Orthogonal frequency division multiplexing (OFDM) has been adopted in the physical layer of IEEE802.11a WLAN standard. In this Letter, a high-resolution frequency-offset estimation scheme is presented for the OFDM-based WLAN. The scheme efficiently exploits the features of the 802.11a preamble for high-resolution estimation of frequency-offset. Simulation results indicate that the algorithm is much superior to the conventional scheme for frequency-offset estimation in the 802.11a WLAN.

Sinusoidal representation has been widely applied to speech modification, low bit rate speech and audio coding. Usually, speech signal is analyzed and synthesized using the overlap-add algorithm or the peak-picking algorithm. But the overlap-add algorithm is well known for high computational complexity and the peak-picking algorithm cannot track the transient and syllabic variation well. In this letter, both algorithms are applied to speech analysis/synthesis. Peaks are picked in the curve of power spectral density for speech signal; the frequencies corresponding to these peaks are arranged according to the descending orders of their corresponding power spectral densities. These frequencies are regarded as the candidate frequencies to determine the corresponding amplitudes and initial phases according to the least mean square error criterion. The summation of the extracted sinusoidal components is used to successively approach the original speech signal. The results show that the proposed algorithm can track the transient and syllabic variation and can attain the good synthesized speech signal with low computational complexity.

Low-density parity-check (LDPC) codes are one of the most promising next-generation error-correcting codes. For practical use, efficient methods for encoding of LDPC codes are needed and have to be studied. However, it seems that no general encoding methods suitable for hardware implementation have been proposed so far and for randomly constructed LDPC codes there have been no other methods than the simple one using generator matrices. In this paper we show that some classes of quasi-cyclic LDPC codes based on circulant permutation matrices, specifically LDPC codes based on array codes and a special class of Sridhara-Fuja-Tanner codes and Fossorier codes can be encoded by division circuits as cyclic codes, which are very easy to implement. We also show some properties of these codes.

A high quality-factor of active inductor has been implemented by using the 0.18 µm 1P6M CMOS technologies in this work. By adding a feedback resistance and a regulated gain stage transistor into the conventional cascade-grounded approach, the quality-factor and performance of CMOS active inductor can be improved. This novel active inductor demonstrated a maximum quality-factor of 540 and a 3.2 nH inductance at 4.3 GHz, where the self-resonant frequency was 5.4 GHz. An active CMOS bandpass filter was also fabricated including this tunable high quality factor active inductor, performing an insertion loss of 0.2 dB and a return loss more than 32 dB with a tuning range from 3.45 GHz to 3.6 GHz. The input IP3 was -2.4 dBm, and the noise figure was 14.1 dB with a 28 mW dc power consumption.

This paper tackles the problem of detecting a random signal embedded in additive white noise. Although the likelihood ratio test (LRT) is the well-known optimum detector for this problem, it may not be easily realized in applications such as radar, sonar, seismic, digital communications, speech analysis and automatic fault detection in machinery, for which suboptimal quadratic detectors have been extensively employed. In this paper, the relationships between four suboptimal quadratic detection schemes, namely, the energy, matched subspace, maximum deflection ratio as well as spectrum matching detectors, and the LRT are studied. In particular, we show that each of those suboptimal detectors can approach the optimal LRT under certain operating conditions. These results are verified via Monte Carlo simulations.

This work presents a frequency-scaling low-power (FSLP) design methodology for managing power consumption of cores in the tile-based network-on-chip (NOC) architecture. A moving picture experts group (MPEG) core is tested using the field-programmable gate array (FPGA) implementation to verify the feasibility of the proposed method. Measurement results show that about 30% power consumption can be saved in the MPEG core and reveal that the proposed FSLP design method can be suitable for cores in the tile-based NOC applications.

Designing a software architecture that satisfies multiple quality requirements is a difficult undertaking. This is mainly due to the fact that architects must be able to explore a broad range of architectural choices and analyze tradeoffs among them in light of multiple quality requirements. As the size and complexity of the system increase, architectural design space to be explored and analyzed becomes more complex. In order to systematically manage the complexity, this paper proposes a method that guides architects to explore and analyze architectural decisions in a top-down manner. In the method, architectural decisions that have global impacts on given quality requirements are first explored and analyzed and those that have local impacts are then taken into account in the context of the decisions made in the previous step. This approach can cope with the complexity of large-scale architectural design systematically, as architectural decisions are analyzed and made following the abstraction hierarchy of quality requirements. To illustrate the concepts and applicability of the proposed method, we have applied this method to the architectural design of the computer used for the continuous casting process by an iron and steel manufacturer.

In this paper, an efficient equivalence checking method for two C descriptions is described. The equivalence of two C descriptions is proved by symbolic simulation. Symbolic simulation used in this paper can prove the equivalence of all of the variables in the descriptions. However, it takes long time to verify the equivalence of all of the variables if large descriptions are given. Therefore, in order to improve the verification, our method identifies textual differences between descriptions. The identified textual differences are used to reduce the number of equivalence checkings among variables. The proposed method has been implemented in C language and evaluated with several C descriptions.

In this paper, a new algorithm for the optimal training sequence with respect to sequence length in 1-dimensional cluster-based sequence equalizers (1-D CBSE) is presented. The proposed method not only removes the step of random training sequence selection but also shortens the length of the selected training sequences. The superiority of the new method is demonstrated by presenting several simulation results of quadrature phase shift keying (QPSK) signaling schemes and related analyses.

In this Letter, linear least squares (LLS) techniques for phase estimation of real sinusoidal signals with known or unknown amplitudes are studied. It is proved that the asymptotic performance of the LLS approach attains Cramér-Rao lower bound. For the case of a single tone, a novel LLS algorithm with unit-norm constraint is derived. Simulation results are also included for algorithm evaluation.

We propose utilizing subband-based blind source separation (BSS) for convolutive mixtures of speech. This is motivated by the drawback of frequency-domain BSS, i.e., when a long frame with a fixed long frame-shift is used to cover reverberation, the number of samples in each frequency decreases and the separation performance is degraded. In subband BSS, (1) by using a moderate number of subbands, a sufficient number of samples can be held in each subband, and (2) by using FIR filters in each subband, we can manage long reverberation. We confirm that subband BSS achieves better performance than frequency-domain BSS. Moreover, subband BSS allows us to select a separation method suited to each subband. Using this advantage, we propose efficient separation procedures that consider the frequency characteristics of room reverberation and speech signals (3) by using longer unmixing filters in low frequency bands and (4) by adopting an overlap-blockshift in BSS's batch adaptation in low frequency bands. Consequently, frequency-dependent subband processing is successfully realized with the proposed subband BSS.

This paper presents a standard cell-based frequency synthesizer with dynamic frequency counting (DFC) for multiplying input reference frequency by N times. The dynamic frequency counting loop uses variable time period to estimate and tune the frequency of digitally-controlled oscillator (DCO) which enhances frequency detection's resolution and loop stability. Two ripple counters serve as frequency estimator. Conventional phase-frequency detector (PFD) thus is replaced with a digital arithmetic comparator to yield a divider-free circuit structure. Additionally, a 15 bits DCO with the least significant bit (LSB) resolution 1.55 ps is designed by using the gate capacitance difference of 2-input NOR gate in fine-tuning stage. A modified incremental data weighted averaging (IDWA) circuit is also designed to achieve improved linearity of DCO by dynamic element matching (DEM) skill. Based on the proposed standard cell-based frequency synthesizer, a test chip is designed and verified on 0.35-µm complementary metal oxide silicon (CMOS) process, and has a frequency range of (18-214) MHz at 3.3 V with peak-to-peak (Pk-Pk) jitter of less than 70 ps at 192 MHz/3.3 V.

In order to eliminate the co-channel and multi-path interference of quasi-synchronous code division multiple access (QS-CDMA) systems, spreading sequences with low or zero correlation zone (LCZ or ZCZ) can be used. The significance of LCZ/ZCZ to QS-CDMA systems is that, even there are relative delays between the transmitted spreading sequences due to the inaccurate access synchronization and the multipath propagation, the orthogonality (or quasi-orthogonality) between the transmitted signals can still be maintained, as long as the relative delay does not exceed certain limit. In this paper, several lower bounds on the aperiodic autocorrelation and crosscorrelation of binary LCZ/ZCZ sequence set with respect to the family size, sequence length and the aperiodic low or zero correlation zone, are derived. The results show that the new bounds are tighter than previous bounds for the LCZ/ZCZ sequences.

In the letter, properties of m-sequence are derived, based on these properties, a family of binary nonlinear constant weight codes is presented, these binary nonlinear constant weight codes can apply to automatic repeat request (ARQ) communication system, as detecting-error codes.

This letter presents a method of finding the optimal quantization stepsize that minimizes quantization loss and maximizes coded BER performance. We define 'Information Error Rate'(IER) and obtain the equation of the modified constraint length (Km) to obtain an upper bound of coded BER performance of a l bit quantized soft decision Viterbi decoder. Using IER and Km, we determine the optimal quantization stepsize of a 2 bit and 3 bit quantized soft decision decoding system in an AWGN channl with respect to SNR, and verify our strategies by simulation results.

Design of portable battery operated multimedia devices requires energy-efficient multiplication circuits. This paper proposes a novel architectural technique to reduce power consumption of digital multipliers. Unlike related approaches which focus on multiplier transition activity reduction, we concentrate on dynamic reduction of supply voltage. Two implementation schemes capable of dynamically adjusting a double voltage supply to input data variation are presented. Simulations show that using these schemes we can reduce energy consumption of 1616-bit multiplier by 34% and 29% on peak and by 10% and 7% on average with area overhead of 15% and 4%, respectively, while maintaining the performance of traditional multiplier.

This letter proposes a modified orthogonal frequency division multiplexing (OFDM) system with low peak-to-average power ratio (PAPR) and reduced complexity. To do this, OFDM system exploits a frequency diversity equipped with a simple symbol repetition. From the presented results, we can see that the investigated OFDM system with one transmit antenna gives the same diversity gain to two-branch transmit diversity and can be implemented with reduced transmitter complexity and low peak power at the cost of decoding delay.

A CMOS low noise amplifier (LNA) for low-power ultra-wideband (UWB) wireless applications is presented. To achieve low power consumption and wide operating bandwidth, the proposed LNA employing stagger tuning technique consists of two stacked common-source stages with different resonant frequencies. This work is implemented in 0.18-µm CMOS process and shows a 2.4-9.4-GHz bandwidth. The amplifier provides a maximum forward gain (S21) of 10.9 dB while drawing 7.1 mW from a 1.8-V supply. A noise figure as low as 4.1 dB and an IIP3 of -3.5 dBm have been demonstrated.

A range top-k query returns the topmost k records in the order set by a measure attribute within a specified region of multi-dimensional data. The range top-k query is a powerful tool for analysis in spatial databases and data warehouse environments. In this paper, we propose an algorithm to answer the query by selectively traversing an aggregate R-tree having MAX as the aggregate values. The algorithm can execute the query by accessing only a small part of the leaf nodes within a query region. Therefore, it shows good query performance regardless of the size of the query region. We suggest an efficient pruning technique for the priority queue, which reduces the cost of handling the priority queue, and also propose an efficient technique for leaf node organization to reduce the number of node accesses to execute the range top-k queries.

Congestion control in the Internet consists of two main components: the TCP Additive-Increase Multiplicative-Decrease (AIMD) mechanism on sending windows implemented by end-users, and the Active Queue Management (AQM) scheme implemented in the routers which improves the effectiveness of congestion control. TCP connection is regarded as a feedback control system. Comparably, AQM is classified as a flow controller. There are several kinds of time delays in the network, such as propagation delay, queuing delay in the buffer of the router, etc. The time delays cause degradation of performance and instability of the network. A Smith Predictor is commonly used in feedback control of plants with significant time delays to implement effective compensation. In this paper, a Smith Predictor-based PI-controller for AQM (SPPA) is proposed, which uses a TCP reference model and an average Round-Trip Time (RTT) to reduce unfavorable effects of time delays in TCP networks. The drop probability is calculated by a Proportional-Integral (PI) controller based on the prediction error. When a mismatch exists in between the actual model of the TCP process and the reference model employed by the SPPA, we demonstrate conditions under which the network is stable. The performance, robustness and effectiveness of the proposed SPPA are all evaluated using simulations. The performance of the SPPA is compared with some typical AQMs, such as the Adaptive RED, the PI-controller, and the Proportional-Differential (PD) controller.