Nobuyuki ITOH Tatsuya OHGURO Kazuhiro KATOH Hideki KIMIJIMA Shin-ichiro ISHIZUKA Kenji KOJIMA Hiroyuki MIYAKAWA
A scalable MOSFET parasitic model has been studied using 0.13 µm standard CMOS process. The model consisted of a core BSIM3v3 transistor model and parasitic resistor, capacitor, inductor, and diode. All parasitic components' values were automatically calculated by transistor geometrical parameters, only gate length (Lg), gate width (Wg), and gate multiple numbers (Mg), and some fixed process parameters such as sheet resistance of each part of diffusion layer. This model was confirmed for 0.25 µm to 0.5 µm gate length, 10 to 40 gate multiples with 5 µm gate finger width (Wf), 0.8 V to 1.5 V gate-source voltage (|Vgs|) with 0.6 V threshold voltage (|Vth|), and 1.0 V to 2.5 V drain-source voltage (|Vds|) from the viewpoint of small signal. The measured s-parameter and simulated one are in fairly good agreement in 200 MHz to 20 GHz frequencies range. This model is very simple, scalable, and convenient for RF circuit designers without difficult parameter setting.
Woojin JIN Seongtae YOON Yungseon EO Jungsun KIM
IC interconnect transmission line effects due to the characteristics of a silicon substrate and current return path impedances are physically investigated and experimentally characterized. With the investigation, a novel transmission line model is developed, taking these effects into account. Then an accurate signal delay on the IC interconnect lines is analyzed by using the transmission line model. The transmission line effects of the metal-insulator-semiconductor IC interconnect structure are experimentally verified with s-parameter-based wafer level signal-transient characterizations for various test patterns. They are designed and fabricated with a 0.35 µm CMOS process technology. Throughout this work, it is demonstrated that the conventional ideal RC- or RLC-model of the IC interconnects without considering these detailed physical phenomena is not accurate enough to verify the pico-second level timing of high-performance VLSI circuits.
Takayuki KATOH Takuo KASHIWA Hiroyuki HOSHI Akira INOUE Takahide ISHIKAWA
A novel millimeter-wave on-wafer CAT(Computer-Aided-Testing ) system has been developed for measurement of S-parameters and NF ( Noise figure ). For the S-parameter test system, we have developed a holder setup and installed it in a semi-automatic wafer prober so that the waveguide-based T/R module can be directly connected to a probe-head through fixed waveguides, which feature low insertion loss of less than 2 dB, from 75 GHz to 98 GHz. The accuracy of the developed test system was confirmed by measuring, with this system, a co-planar offset short pattern then comparing measured and simulated results. A good agreement between the measured and calculated, in both return loss and return phase successfully demonstrated the superiority of the system. A W-band NF test system with a system noise of less than 8 dB has been also developed to provide an on-wafer NF measurement capability with an accuracy of 0.3 dB. These S-parameter and NF test systems possess great advantages to achieve high-speed automatic MMIC testing up to W-band.
The stability conditions and stability factors of terminated active two port networks are investigated. They are expressed with the S parameters of active devices and the radii and centers of the circles defined by source and load terminations. The stability conditions are applied to specific cases. Some of the results correspond to the stability conditions expressed in Z, Y, H or G parameters and one of the other stability conditions of terminated two port network is similar to that for passive terminations which is expressed in S parameters. The various results derived in this paper are very useful for checking the stability of amplifiers, because both stability conditions and stability factors are simply calculated by using the S parameters without using the graphical method or transforming S parameters to Z, Y, H or G parameters. These stability conditions can be also used even if negative input or output resistance appears and even if the real part of source or load immittance is negative.
Jun-ichi SHIMIZU Nobuyuki HAYAMA Kazuhiko HONJO
A precise method for determining AlGaAs/GaAs HBT large-signal circuit parameters is presented. In this method, the parameters are extracted from noise parameters and small-signal S-parameters measured under various bias conditions. The measured noise parameters are fitted to the calculated noise parameters derived from an approximation of Hawkins' equations applied to the macroscopic equivalent circuit. The small-signal S-parameters help to determine the large-signal circuit parameters. The derived large-signal parameters were used to design an HBT oscillator. The simulated results using these parameters were in good agreement with the fabricated device performance.