Fully integrated VCO using the "turbo-charger" technique to improve phase noise characteristics is presented. The phase noise degradation of relatively lower oscillation frequency in tuning range was caused by oscillation amplitude lowering due to large total capacitance. On the other hand, the phase noise degradation of relatively higher frequency in tuning range was caused by excess current noise. A new "turbo-charger" circuit increased operation current to obtain sufficient transconductance of amplifier when oscillation frequency was lower to improve phase noise characteristics. The phase noise of VCO employing this technique was extremely low and stable, below -140-dBc/Hz at 3-MHz offset from oscillation frequency, in wide oscillation frequency range, approximately 200-MHz for 1200-MHz oscillation. This VCO was operated with 5.8-7.4-mA current consumption at 3-V supply voltage. The manufacturing process was 0.6-µm SiGe BiCMOS.

A 6 GHz integrated VCO using SiGe BiCMOS process has been studied. The integrated inductors were realized by third metal with 3 µm thickness aluminum and its Q=20 at 6 GHz. The amplifier consisted of bipolar transistor. Tuning range was 38% with 0 V to 3 V tuning voltage. Phase noise of -100 dBc/Hz was obtained at 1 MHz offset from carrier frequency. The current consumption of VCO was 4.9 mA at 3 V power supply.

A scalable MOSFET parasitic model has been studied using 0.13 µm standard CMOS process. The model consisted of a core BSIM3v3 transistor model and parasitic resistor, capacitor, inductor, and diode. All parasitic components' values were automatically calculated by transistor geometrical parameters, only gate length (Lg), gate width (Wg), and gate multiple numbers (Mg), and some fixed process parameters such as sheet resistance of each part of diffusion layer. This model was confirmed for 0.25 µm to 0.5 µm gate length, 10 to 40 gate multiples with 5 µm gate finger width (Wf), 0.8 V to 1.5 V gate-source voltage (|Vgs|) with 0.6 V threshold voltage (|Vth|), and 1.0 V to 2.5 V drain-source voltage (|Vds|) from the viewpoint of small signal. The measured s-parameter and simulated one are in fairly good agreement in 200 MHz to 20 GHz frequencies range. This model is very simple, scalable, and convenient for RF circuit designers without difficult parameter setting.

Integrated 900-MHz ISM band transceiver LSI for analog cordless telephone has been realized by cost-effective process technology with sufficient performance. This LSI consisted of fully integrated transceiver, from RF-LNA to audio amplifier for RX chain, from microphone's amplifier to RF-PA for TX chain, and integrated RX- and TX-LO consisting of PLLs and VCOs. In view of narrow signal bandwidth with analog modulation, extremely low phase noise at low offset frequency from carrier was required for integrated VCO. Also, in view of fully duplex operations, signal isolation between TX and RX was required. Despite such a high integration and high performance, chip cost had to be minimized for low-cost applications. The 12-dB SINAD RX sensitivity was -111.2 dBm, the output power of TX was +3 dBm, and the phase noise of integrated VCO was -77 dBc/Hz at 3 kHz offset away from carrier. The current consumption at fully duplex operation was 76 mA at 3.6 V power supply. The chip was realized by 0.8 µm standard silicon BiCMOS process.