The increase of surface microroughness on Si substrate degrades the electrical characteristics such as the dielectric breakdown field intensity (EBD) and charge to break-down (QBD) of thin oxide film. It has been found that the surface microroughness increases in the wet chemical process, particularly in NH4OH-H2O2-H2O cleaning (APM cleaning). It has been revealed that the surface microroughness does not increase at all if the NH4OH mixing ratio in NH4OH-H2O2-H2O solution is reduced from the conventional level of 1:1:5 to 0.05:1:5, and the room temperature ultrapure water rinsing is introduced right after the APM cleaning. At the same time, the APM cleaning with NH4OH-H2O2-H2O mixing ratio of 0.05:1:5 has been very effective to remove particles and metallic impurities from the Si surface. The surface microroughness dominating the electrical properties of very thin oxide films is strictly influenced by the wafer quality. The increase of surface microroughness due to the APM cleaning has varied among the wafer types such as Cz, FZ and epitaxial (EPI) wafers. The increase of surface microroughness in EPI wafer was very much limited, while the surface microroughness of FZ and Cz wafers gradually increase. As a result of investigating the amount of diffused phosphorus atoms into these wafers, the increase of the surface microroughness in APM cleaning has been confirmed to strongly depend on the silicon vacancy cluster concentration in wafer. The EPI wafer having low silicon vacancy concentration is essentially revealed superior for future sub-half-micron ULSI devices.

Chemical structures of native oxides formed during wet chemical treatments of silicon surfaces were investigated using X-ray Photoelectron Spectroscopy (XPS) and Fourier Transformed Infrared. Attenuated Total Reflection (FT-IR-ATR). It was found that the amounts of Si-H bonds in native oxide and at native oxide/ silicon interface are negligibly small in the case of native oxides formed in H2SO4-H2O2 solution. Based on this discovery, it was found that native oxides can be characterized by the amount of Si-H bonds in the native oxide and the combination of various wet chemical treatments with the treatment in NH4OH-H2O2-H2O solution results in the drastic decrease in the amount of Si-H bonds in the native oxides.

Thermal desorption spectroscopy (TDS) is applied to analyze the oxidation reactions of hydrogen-terminated Si(100) surfaces in both the heating and cooling processes after hydrogen desorption. The oxidation reaction of oxygen and water with a silicon surface after hydrogen desorption shows hysteresis in the heating and cooling processes. In the cooling process, oxidation finishes when the silicon surface is adequately oxidized to about a 10 thickness. Oxidation continues to occur at lower temperatures when the total volume of oxygen and water is too small to saturate the bare silicon surface. The reaction of water with silicon releases hydrogen at more than 500. Hydrogen does not adsorb on the silicon oxide surface. A trace amount of oxygen, less than 110-6 Torr, roughens the surface.

A new cleaning solution (FPM; HF-H2O2-H2O) was investigated in order to remove effectively metallic impurities on the silicon wafer surface. The removability of metallic impurities on the wafer surface and the concentrations of metallic impurities adsorbed on the wafer surface from each contaminated cleaning solution were compared between FPM and conventional cleaning solutions, such as HPM (HCl-H2O2-H2O), SPM (H2SO4-H2O2), DHF (HF-H2O) and APM (NH4OH-H2O2-H2O). This new cleaning solution had higher removability of metallic impurities than conventional ones. Adsorption of some kinds of metallic impurities onto the wafer surface was a serious problem for conventional cleaning solutions. This problem was solved by the use of FPM. FPM was important not only as a cleaning solution for metallic impurities, but also as an etchant. Furthemore, this new cleaning solution made possible to construct a simple cleaning system, because the concentrations of HF and H2O2 are good to be less than 1% for each, and it can be used at room temperature.

The initial stages of SiO2/Si interface formation on a Si(111) surface were investigated at 300 in dry oxygen with a pressure of 133 Pa. It was found that the SiO2/Si interfacial transition layer is formed in three steps characterized by three different oxidation rates.

An extremely accurate and very wide-band quadrature modulator IC fabricated on a single chip using bipolar technology is presented. The characteristics of this quadrature modulator IC are much superior to conventional ones (modulation phase error and deviation from quadrature is about 1/10), and this IC is applicable to high modulation schemes such as 256 QAM. In this circuit, the phase difference between local signals input to each of two balanced modulators is detected by a phase detector, and a variable phase shifter in the local port is controlled automatically by the detected signals. This, along with the use of a wide-band variable phase shifter, enables the phase difference between the local signals input to the balanced modulators to be adaptively controlled to 90 degrees in wide frequency bands. In addition, a design method for the balanced modulators to obtain small modulation phase error is described. Based on this design method, a highly accurate quadrature modulator IC was fabricated, in which two balanced modulators, the phase detector, and the variable phase shifter were integrated on a single chip. Phase deviation from quadrature in the local signals was reduced to less than 0.3 degrees in the wide frequency bands of more tham 60 MHz. The modulation phase error of the balanced modulators wes less than 0.2 degrees at 140 MHz, and less than 2.5 degrees at up to 1.3 GHz.

This paper is concerned with the stress simulation of a LOCOS structure during not only oxidation but also the subsequent cooling down based on viscoelastic stress modeling. A viscoelastic model is successfully applied to the oxide, nitride and silicon substrate for a LOCOS structure. Thermal stress is also taken into account during the cooling down process. The viscoelastic deformation problem of all the three materials for the LOCOS structure are solved by a two-dimensional finite element method. It is the first time to show that the stress values after cooling down to room temperature are much higher than those right after oxidation. It is also shown that varying the cooling down rates results in the different stress values after cooling down.

We have developed a new model to analyze the thermal failure mechanism due to electrical-over-stress (EOS) for two-dimensional planar pn-junction structures where the failure power is proportional to about 1/5 power of the failure time. We adopted a pseudo two-dimensional numerical simulation method where a pn-junction diode is divided into small elements and represented by a circuit network composed of many minute resistors and diodes. The failure mechanism studied by Wunsch and Bell, that is one of many studies for one-dimensional pn-diodes, is not valid for the case of two-dimensional pn-junction, such as a planar type junction. On the contrary, the failure mechanism was found to be much correlative with the junction structure, especially the impurity concentration in the substrate in the two-dimensional case. When the impurity concentration in the substrate is high enough (e.g. Nsub1017[cm-3]), the breakdown occurs at the whole junction. The heat transfer is one-dimensional and the failure power is proportional to about 1/2 power of the failure time, which is well known results reported by many researchers: e.g. Wunsch &Bell. On the other hand, when the impurity concentration in the substrate is low enough (e.g. Nsub1016[cm-3]), the breakdown occurs locally at the junction edge. The heat transfer is two-dimensional and the failure power is in proportion to about 1/5 power of the failure time.