In order to improve the sensitivity of micromachined sensors applied with electrostatic fields and increase their actuated force of electrostatic micromachined actuators, "electrets," which are dielectrics carrying non equilibrium permanent space charges of polarization distribution, are very important. In this paper, positively corona charged silicon dioxide electrets, which are deposited by Plasma Chemical Vapor Deposition (PCVD) and thermally oxidized, are investigated. Physical studies will be described, in which the charge stability is correlated to Thermally Stimulated Current (TSC) measurements and to Electron Spin Resonance (ESR) analysis. Some intrinsic differences have been observed between materials. The electrets with superior long-term charge stability contain 10,000 times as much E' center (Si3 as the ones with inferior long-term charge stability. Finally, some investigations on the long-term charge storage mechanism of the positively charged silicon dioxide electret will be described.

Amorphous silicon thin film transistors(a-Si TFTs) with a channel-etched structure were fabricated. The key technologies to realize these simple-process TFTs were 1) fabricating data lines and pixel electrodes of indium tin oxide(ITO); 2) carrying out tapered dry etching of plural layers of the a-Si and gate insulator silicon nitide; and 3) forming silicide layer to reduce the contact resistance between the phosphorousdoped a-Si and ITO. Excellent image quality, with a high contrast ratio of more than 100: 1, was obtained for video graphic array(VGA) mode TFT-LCDs using a dot inversion driving method. Furthermore, the transmission distribution was uniform with less than a 4.5% deviation on the whole display area although the ITO data line resistances were as large as 120 kΩ per line.

The characteristics of a-Si bottom-gate TFT test devices with several kinds of inorganic "quasi-black matrix," such as metal, semiconductor, and insulator, on the top were investigated for various black matrix(BM) resistivities. In the Ia-Vg characteristics, for a BM sheet resistance of about1 1012 Ω/, a high off current and large Vth shift were observed due to the back-gating effects when the BM is charged up. Accrding to the ac dynamic characteristics, there was almost no leakage due to the capacitive coupling between source and drain after 16.6 msec(one frame) when the BM sheet resistance was above 7 1013 Ω/ . It was found that hydrogenated amorphous silicon germanium(a-SiGe:H) film, which has enough optical density, with the sheet resistance above the order of 1014 Ω/ is a promising candidate for an inorganic BM on TFT array.

The effect of silicone vapour concentration on the contact failure was examined by using micro relays and motor brush-slip ring(commutator) contacts, [(CH3) 2SiO]4: D4 was used as a vapour source of silicone contamination. Because the influence of the vapour of the silicone on the contact surface can not be avoided at all times due to its gradual evaporation in the atmosphere. The contact failure caused by the silicone vapour was confirmed as formation of SiO2 on the contact surfaceby analysis of EPMA and XPS. A minimum limiting concentration level which does not affect contact reliability was found. This limiting level was 10 ppm(O.13mg/l). Validity of the limiting level was confirmed by the relationships among concentration, temperature, SiO2 film thickness and contact resistance. Furthermore, the effect of the degree of silicone polymerization on the limiting concentration was derived by an empirical formula. This silicone is found to have polymerization degree larger than D7: n=7. These results were confirmed by the contact failure data due to the silicone contamination.

We proposed a new marker design for passive alignment of a laser to a fiber on a silicon waferboard. Our fiducial marker is simple form and easy to fabricate. With a unique marker design, high accurate positioning of the laser chip is easily achieved using a conventional flip-chip bonder. We have successfully fabricated laser modules with uniform coupling, within 1 dB for a flat end single-mode fiber and within 2 dB for a hemispherical end fiber. This assembly method offers the potential for low-cost optical module packaging.

The quality of Si substrates affecting the oxide reliability was investigated using various kinds of test structures like flat capacitor, field edge array and gate edge array. The field edge array test structure which resembles the conditions found for real device is shown to be quite effective to determine the quality of oxides. Oxide grown on a P type epitaxial layer on P+ silicon substrate shows the highest reliability in all test structures. Gettering of heavy metals and/or crystal defects by the P+ silicon substrate is the dominant mechanism for the improvement of the oxide reliability. H2 annealed silicon shows a good reliability if monitored using the flat capacitor. However, using the field edge array test structure, which is strongly influenced by real device process, the reliability of the oxide grown on H2 annealed silicon degrades.

This paper proposes a photonic integrated beam forming and steering network (BFN) that uses switched true-time-delay (TTD) silica-based waveguide circuits for phased array antennas. The TTD-BFN has thermooptic switches and variable time delay lines. This TTD-BFN controls four array elements, and can form and steer a beam. An RF test was carried out in the 2.5 GHz microwave frequency range. The experimental results show a peak-to-peak phase error of 6.0 degrees and peak-to-peak amplitude error of 2.0 dB. Array factors obtained from the measured results agree well with the designed ones. This silica-based beam former will be a key element in phased array antennas.

This work deals with thermal-noise modeling for silicon vertical bipolar junction transistors (BJTs) and relevant integrated circuits (ICs) operating at low currents. The two-junction BJT compact model is consistently derived from the thermal-noise generalization of the Shockley semiconductor equations developed in work which treats thermal noise as the noise associated with carrier velocity fluctuations. This model describes BJT with the Itô non-linear stochastic-differential-equation (SDE) system and is suitable for large-signal large-fluctuation analysis. It is shown that thermal noise in silicon p-n-junction diode contributes to "microplasma" noise. The above model opens way for a consistent-modeling-based design/optimization of bipolar device noise performance with the help of theory of Itô's SDEs.

Silver is a fundamental material for electrical contact application. In spite of high electrical conductivity and economical advantage, silver surface is corroded easily by environment contained sulfide. A corrosion product as Ag2S deteriorates the property of contact reliability. In order to examine contact reliability, the acceleration tests have been accepted widely in industries. In the present study, the acceleration factor of the contact reliability for the sulfide film on the surface of silver contact which was subject to the tarnish acceleration test was clarified in comparison with the film grown in a normal office environment. The accelerated environment based on the Japan Electric Industry Development Association (JEIDA) standard No.25 was adopted. This environment is consisted of air contained 3 ppm H2S gas under 40, 85-95% RH. The growth rate of the sulfide film (Ag2S) was evaluated by applying the ellipsometry analysis. In the results, it was found that growth of Ag2S film of 500 in thickness in the normal office environment required corrosion time of 3103 h. This thickness of 500 caused increase in contact resistance of 0.1-1.0 (Ω). However, in the accelerated environment, corrosion time decreased to 1.7 h for same thickness. Therefore, the acceleration factor was obtained by comparison of these time as 1.8103 for the standard test of JEIDA.

Recent high-speed bipolar technologies based on SICOS (Sidewall Base Contact Structure) transistors are reviewed. Bipolar device structures that include polysilicon are key technologies for improving circuit characteristics. As the characteristics of the upward operated SICOS transistors are close to those of downward transistors, they can easily be applied in memory cells which have near-perfect soft-error-immunity. Newly developed process technologies for making shallow base and emitter junctions to improve circuit performance are also reviewed. Finally, complementary bipolar technology for low-power and high-speed circuits using pnp transistors, and a quasi-drift base transistor structure suitable for below 0.1 µm emitters are discussed.

This paper describes an 8:1 multiplexer and a 1:8 demultiplexer for fiber optic transmission systems. These chips incorporate new architectures having a smaller hardware and enabling the use of a lower supply voltage. The multiplexer and the demultiplexer are fabricated using 0.8 µm silicon-bipolar process with a double polysilicon self-aligned structure. The multiplexer operates at a bit rate of up to 3.0 Gb/s, while the demultiplexer operates at a bit rate of up to 4.1 Gb/s. The multiplexer consumes 272 mW and the demultiplexer consumes 388 mW under the power supplies of VEE=-4.0 V and VTT=-2.0 V. These values are the smallest so far above 2.5 Gb/s which is the standard of the Level-16 of the synchronous transfer mode (STM-16).

In this paper, an electrostatic actuator with electret is proposed. Electrets are the electrical equivalent of magnets. They are dielectric's carrying a non equilibrium permanent space charge or polarization distribution. This distribution can create either an external electric field or internal properties such as piezo or pyroelectricity. In the first case it is possible to make new types of electrostatic actuators by the external electric field. An electrostatic relay with electret is fabricated to demonstrate the possibility of an electrostatic actuator with electret. The size of relay is 5.2 mm11.5 mm. Its amature beam is 50 µm thick, 2.9 mm wide, 6.3 mm long, and acts as a moving electrode. Facing it, the stationary electrode is 20 µm away from the moving electrode. On the stationary electrode, new type of electret made from SiO2 is deposited. We have succeeded in making the armature operate at low applied voltage 20 V. On the same structure without electret, we need more than 120 V to make the same armature operation. We have also succeeded in making the armature latching.

A conventional anode coupled plasma etching process has been developed to etch 300 µm-deep cavities and 600 µm-through holes with nearly vertical sidewalls into single crystal silicon. An optimized SF6/O2 gas mixture results in a nearly vertical etching profile. A silicon wafer was fabricated with a large number of cavities and through holes with less than 1 percent uniformity. It was also experimentally confirmed that this process can be used to etch vertical cavities and through holes in single-crystal silicon with any orientation. This process has the advantage of unlimited etching depth and etching patterns. Advantages in mechanical strength are obtained because a micro-curve is formed at the bottom edge of the cavities. This etching process developed on a conventional plasma etching system was utilized to fabricate a torsional vibrator that consists of single-crystal silicon and Pyrex glass.

A black membrane is a biological-membrane analogue, i.e. a phospholipid bilayer membrane, artificially formed on an orifice immersed in water. It is used to investigate the properties of the membrane itself and channels embedded therein. In this paper, microfabrication techniques are applied to fabricate the orifice, and a glass substrate is isotropically etched to define the orifice geometry. The periphery of the orifice was patterned with aminosilane to anchor the membrane. The remainder part was coated with fluorosilane to make the surface hydrophobic and to prevent adsorption of channel-forming molecules. We demonstrated experimentally that a stable and reproducible membrane is easily obtainable using the orifice.

The authors have studied mechanism of transition from metallic phase to gaseous phase in contact break arc. For further elucidation of the mechanism, we have carried out spectroscopic measurement. The spectrum measurement system which had high time resolution was composed using two monochromators and a bifurcated image fiber, which had one input port and two output ports. The input port received the arc light, and the two monochromators received the arc light from the two output ports, respectively. The spectral sensitivity of the two monochromators was corrected with a standard lamp. We have measured simultaneously two spectra of break arc for Ag in laboratory air, under the condition where source voltage E=48 V, load inductance L=2.3 mH, and closed contact current I0=6 A. As a result, the time-varying tendency of spectrum intensity is similar for the same element, even if the wavelength is different. And from the comparison of time average spectrum intensity, it is clarified that average intensity for gas spectrum does not attain to 10% of that for metallic atomic spectrum (Ag I, 520.91 nm). In addition, the decrease point of Ag II (ion) spectrum has been found to correspond with the peak of Ag I (atom) spectrum.

Fabrication methods of novel silicon quantum wires and dots using anisotropic wet chemical etching and thermal oxidation are newly proposed. The method realizes fine Si quantum wires, which are fully surrounded by the thermal SiO2 without any defects. The wires are straight and the Si/SiO2 interfaces are fairly flat. The 10 nm width wires are confirmed by Transmitting Scanning Microscopy observation in minimum size. The fine quantum dots are also fabricated using this method. The characteristics of the wires are investigated and the current oscillations in variation with the gate voltage are observed in low temperature. We believe the origin of these oscillations arise from one-dimensional subband conduction.

We propose, for the first time, highly reliable flash-type EEPROM cell fabrication using in-situ multiple rapid thermal processing (RTP) technology. In this study, rapid thermal oxynitridation tunnel oxide (RTONO) film formations followed by in-situ arsenic (As)-doped floating-gate polysilicon growth by rapid thermal chemical vapor deposition (RTCVD) technologies are fully utilized. The results show that after 5104 program/erase (P/E) endurance cycles, the conventional cell shows 65% narrowing of the threshold voltage (Vt) window, whereas the RTONO cell indicates narrowing of less than 20%. A large number of nitrogen atoms (1020 atoms/cm3) are confirmed by secondary ion mass spectrometry (SIMS), pile up at the SiO2/Si interface and distribute into bulk SiO2. It is considered that in the RTONO film stable Si-N bonds are formed which minimize electron trap generation as well as the neutral defect density, resulting in lower Vt shifts in P/E stress. In addition, the RTONO film reduces the number of hydrogen atoms because of final N2O oxynitridation. The SIMS data shows that by the in-situ RTCVD process As atoms (91020 atoms/cm3) are incorporated uniformly into 1000--thick film. Moreover, the RTCVD polysilicon film indicates an extremely flat surface. The time-dependent dielectric breakdown (TDDB) characteristics of interpoly oxide-nitride-oxide (ONO) film exhibited no defect-related breakdown and 5 times longer breakdown time as compared to phosphorus-doped polysilicon film. Therefore, the flash-EEPROM cell fabricated has good charge storing capability.

A new BiCMOS process based on a high-speed bipolar process with 0.5 µm emitter width has been developed using a bonded SOI substrate. Double polysilicon bipolar transistors with the trench isolation, shallow junctions and the pedestal collector implantation provide a high cut-off frequency of 27 GHz. Stress induced device degradation is carefully examined and a low stress trench isolation process is proposed.

This paper describes a new method for joining BiSrCaCuO superconductors (BSCCO) which realizes low microwave loss and high mechanical strength. This method consists of two processes. In the first the BSCCO surface is metallized with Ag and in the second a joint is formed by using thermally curable Ag paste. With this method, we obtained a joint with a loss of 0.3 dB around 1.1 GHz with the co-axial cavity techniques. Furthermore, the mechanical strength of the joint was greater than that of the BSCCO sample. From the results of DC resistance measurements and SEM observations, we attribute this good performance to the adhesion and continuity of the metallized Ag with the BSCCO surface.

When intermetal oxide film which contains much water deposited on MOSFET, degradation of hot carrier characteristics is enhanced. This mechanism is considered to be as follows. During the annealing process water is desorbed from the intermetal oxide. The desorbed water reaches the MOSFET and eventually hydrogens terminate silicon dangling bonds in the gate oxide. This paper describes a new approach which uses ESR to analyze this mechanism. The ESR measurement of number of the silicon dangling bonds in undoped polysilicon lying under the intermetal oxide shows that water diffuses from intermetal oxide to MOSFET during the annealing process. The water diffusion is blocked by introduction between the polysilicon and the intermetal oxides of P-SiN layer or CVD SiO2 damaged by implantation.