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18941-18960hit(22683hit)

  • Large-Scale VTOA Switching Node Architecture

    Hiroshi SUNAGA  Takenori OKUTANI  Kou MIYAKE  

     
    PAPER-Switching and Communication Processing

      Vol:
    E82-B No:1
      Page(s):
    70-80

    This paper describes key technologies for establishing a large-scale public switching node system architecture for handling voice and telephony over ATM (VTOA). VTOA is one of the most promising ATM applications, which allows network operating companies to provide a less-expensive but relatively high quality telephone service, by employing voice-data compression and the efficient transmission capabilities of AAL2. We discuss several technical aspects of VTOA handling system architecture, such as the optimum basis for the node, i. e. , STM versus ATM, the appropriate network structure, and suitable signalling. These key points are evaluated from the standpoints of economy, ease of implementation, and extensibility. Our proposed methods should provide the basis for constructing an efficient and cost-effective VTOA handling network.

  • Design Framework of a Database for Structured Documents with Object Links

    Masatoshi YOSHIKAWA  Hiroyuki KATO  Hiroko KINUTANI  

     
    PAPER-Web and Document Databases

      Vol:
    E82-D No:1
      Page(s):
    147-155

    Structured documents often contain character strings of which semantics can be naturally stored as database values or has direct correspondence with database values. By building bilateral logical links between character strings in documents and corresponding database values, semantically rich queries are made expressible. We have introduced a new ADT, named "paratext," to model text which has links with database values. Paratexts are logically viewed as consisting of two parallel layers; on the "appearance" layer, ordinary text (i. e. a linear sequence of character strings) is placed, while the "reference" layer holds an array of OIDs and literals. Each OID or literal on the reference layer is associated with a contiguous substring of the appearance layer text, and represents the semantics of the associated substring. We have also designed domain-specific functions for this document model. Using the functions, we can express queries which go back and forth between the two layers. In structured documents, such character strings can appear in the whole content of logical elements, or as phrases inside logical elements. We also present frameworks for the implementation of the paratext ADT, and discuss how traditional full-text indexing techniques can be extended to support paratext.

  • Integration of Maximum Information Using Outerjoins, Predicates and Foreign Functions

    Koichi MUNAKATA  

     
    PAPER-Query Processing

      Vol:
    E82-D No:1
      Page(s):
    64-75

    The goal of this paper is to present algorithms for creating an optimized query plan for retrieving maximum information from multiple relations, using outerjoins. Especially we focus on conjunctive queries in the presence of predicates and foreign functions. We show first with examples that retrieving maximum information by integrating multiple relations requires outerjoin operators. The outerjoin is essential to prevent information loss that would be caused by the inner join. We also show that predicates and foreign functions are useful to mediate the discrepancy among the relations and to create arbitrary views. Outerjoins and foreign functions, together with predicates, make it difficult to create query processing plans since they impose restrictions on the order of query processing. The rest of this paper describes algorithms for creating such query processing plans for conjunctive queries expressed in extended Datalog. First, we show simple algorithms for creating query plans with outerjoins, but without predicates and foreign functions. We use the hypergraph representation of the relations to explain an optimized algorithm. Then, we show a more complex algorithm that works for query plans with predicates and foreign functions. In our algorithm, we create an initial expression graph whose nodes represent query processing units, including outerjoin, predicate and foreign function operators. Then, we convert the initial expression graph into an executable, optimized expression tree. This algorithm is implemented and deployed in a mediation system that integrates heterogeneous information sources.

  • A Priority Scheme for IEEE 802. 11 DCF Access Method

    Dr-Jiunn DENG  Ruay-Shiung CHANG  

     
    PAPER-Signaling System and Communication Protocol

      Vol:
    E82-B No:1
      Page(s):
    96-102

    IEEE 802. 11 is a standard for wireless LANs. The basic access method in its MAC layer protocol is the distributed coordination function (DCF) for the ad hoc networks. It is based on the mechanism of carrier sense multiple access with collision avoidance (CSMA/CA). DCF is used to support asynchronous data transmission. However, frames in DCF do not have priorities, making it unsuitable for real-time applications. With a little bad luck, a station might have to wait arbitrarily long to send a frame. In this paper, we propose a method to modify the CSMA/CA protocol such that station priorities can be supported. The method is simple, efficient and easy to implement in comparison to point coordination function (PCF), another access method in IEEE 802. 11 based on access points (base stations). Simulations are conducted to analyze the proposed scheme. The results show that DCF is able to carry the prioritized traffic with the proposed scheme.

  • Megabit-Class Size-Configurable 250-MHz SRAM Macrocells with a Squashed-Memory-Cell Architecture

    Nobutaro SHIBATA  Hiroshi INOKAWA  Keiichiro TOKUNAGA  Soichi OHTA  

     
    PAPER-Integrated Electronics

      Vol:
    E82-C No:1
      Page(s):
    94-104

    High-speed and low-power techniques are described for megabit-class size-configurable CMOS SRAM macrocells. To shorten the design turn-around-time, the methodology of abutting nine kinds of leaf cells is employed; two-level via-hole programming and the array-address decoder embedded in each control leaf cell present a divided-memory-array structure. A new squashed-memory-cell architecture using trench isolation and stacked-via-holes is proposed to reduce access times and power dissipation. To shorten the time for writing data, per-bitline architecture is proposed, in which every bitline has a personal writing driver. Also, read-out circuitry using a current-sense-type two-stage sense amplifier is designed. The effect of the non-multiplexed bitline scheme for fast read-out is shown in a simulation result. To reduce the noise from the second- to first-stage amplifier due to a feedback loop, current paths are separated so as not to cause common impedance. To confirm the techniques described in this paper, a 1-Mb SRAM test chip was fabricated with an advanced 0.35-µm CMOS/bulk process. The SRAM has demonstrated 250-MHz operation with a 2.5-V typical power supply. Also, 100-mW power dissipation was obtained at a practical operating frequency of 150-MHz.

  • Specific Features of the QUIK Mediator System

    Bojiang LIU  Kazumasa YOKOTA  Nobutaka OGATA  

     
    PAPER-Distributed and Heterogeneous Databases

      Vol:
    E82-D No:1
      Page(s):
    180-188

    For advanced data-oriented applications in distributed environments, effective information is frequently obtained by integrating or merging various autonomous information sources. There are many problems: how to search information sources, how to resolve their heterogeneity, how to merge or integrate target sources, how to represent information sources with a common protocol, and how to process queries. We have proposed a new language, QUIK, as an extension of a deductive object-oriented database (DOOD) language, QUIXOTE, and extend typical mediator systems. In this paper, we discuss various features of QUIK: programming capabilities as integrating an exchange model and mediator specifications, merging subsumption relations for maintaining consistency, searching alternative information sources by hypothesis generation, and identifying objects.

  • Power Estimation and Reduction of CMOS Circuits Considering Gate Delay

    Hiroaki UEDA  Kozo KINOSHITA  

     
    PAPER-Computer Systems

      Vol:
    E82-D No:1
      Page(s):
    301-308

    In this paper, we propose a method, called PORT-D, for optimizing CMOS logic circuits to reduce the average power dissipation. PORT-D is an extensional method of PORT. While PORT reduces the average power dissipation under the zero delay model, PORT-D reduces the average power dissipation by taking into account of the gate delay. In PORT-D, the average power dissipation is estimated by the revised BDD traversal method. The revised BDD traversal method calculates switching activity of gate output by constructing OBDD's without representing switching condition of a gate output. PORT-D modifies the circuit in order to reduce the average power dissipation, where transformations which reduce the average power dissipation are found by using permissible functions. Experimental results for benchmark circuits show PORT-D reduces the average power dissipation more than the number of transistors. Furthermore, we modify PORT-D to have high power reduction capability. In the revised method, named PORT-MIX, a mixture strategy of PORT and PORT-D is implemented. Experimental results show PORT-MIX has higher power reduction capability and higher area optimization capability than PORT-D.

  • Fast Admission Control for Rate Monotonic Schedulers

    Tsern-Huei LEE  An-Bang CHANG  

     
    PAPER-Switching and Communication Processing

      Vol:
    E82-B No:1
      Page(s):
    39-47

    Rate monotonic traffic scheduling algorithm had been shown to be the optimal static priority assignment scheme. The system model studied in can be considered (although not realistic) as a preemptive multiplexer which accepts constant bit rate connections that generate packets periodically. The multiplexer adopts a service discipline such that a lower priority packet can be preempted at any stage by a higher priority one without any loss. The constraint is that every packet has to complete its service before the arrival of its succeeding packet generated by the same connection. In this paper, we study the schedulability problem of rate monotonic schedulers for a fixed-length packet switched network such as the ATM network. A necessary and sufficient condition for a set of m constant bit rate connections to be rate monotonic schedulable is first derived and then utilized to design fast admission control algorithms. One of our algorithms computes in advance the minimum period of a connection which can be accepted given a set of existing connections.

  • Querying Molecular Biology Databases by Integration Using Multiagents

    Hideo MATSUDA  Takashi IMAI  Michio NAKANISHI  Akihiro HASHIMOTO  

     
    PAPER-Distributed and Heterogeneous Databases

      Vol:
    E82-D No:1
      Page(s):
    199-207

    In this paper, we propose a method for querying heterogeneous molecular biology databases. Since molecular biology data are distributed into multiple databases that represent different biological domains, it is highly desirable to integrate data together with the correlations between the domains. However, since the total amount of such databases is very large and the data contained are frequently updated, it is difficult to maintain the integration of the entire contents of the databases. Thus, we propose a method for dynamic integration based on user demand, which is expressed with an OQL-based query language. By restricting search space according to user demand, the cost of integration can be reduced considerably. Multiple databases also exhibit much heterogeneity, such as semantic mismatching between the database schemas. For example, many databases employ their own independent terminology. For this reason, it is usually required that the task for integrating data based on a user demand should be carried out transitively; first search each database for data that satisfy the demand, then repeatedly retrieve other data that match the previously found data across every database. To cope with this issue, we introduce two types of agents; a database agent and a user agent, which reside at each database and at a user, respectively. The integration task is performed by the agents; user agents generate demands for retrieving data based on the previous search results by database agents, and database agents search their databases for data that satisfy the demands received from the user agents. We have developed a prototype system on a network of workstations. The system integrates four databases; GenBank (a DNA nucleotide database), SWISS-PROT, PIR (protein amino-acid sequence databases), and PDB (a protein three-dimensional structure database). Although the sizes of GenBank and PDB are each over one billion bytes, the system achieved good performance in searching such very large heterogeneous databases.

  • WebDB Hypermedia Database System

    Wen-Syan LI  Yi-Leh WU  Junho SHIM  Kyoji HIRATA  Sougata MUKHERJEA  Divyakant AGRAWAL  Yoshinori HARA  Reiko ITO  Yutaka KIMURA  Kazuyuki SHIMAZU  Yukiyoshi SAITO  

     
    INDUSTRIAL PAPER

      Vol:
    E82-D No:1
      Page(s):
    266-277

    The Web is a collection of multimedia documents in the form of HTML pages connected through hyperlinks. Unlike most search engines, which focus on information retrieval based on keywords, WebDB aims at supporting database-like comprehensive query functionalities as well navigation, and document generation functionalities with customizability. To support hypermedia database functionalities, we augment the traditional concepts of tables in relational databases and classes in object-oriented databases with notions of document formats and navigation. We design WQL (Web Query Language) as an HTML document manipulation language. WQL language statements contain two parts: SELECT. . . FROM. . . WHERE clauses for specifying retrieval of data contents from hypermedia databases and CREATE. . . AS. . . clauses for specifying the output HTML format and navigation of the query results. This paper presents the architecture of WebDB and its functionalities. The extension to SQL for hypermedia document manipulation, query, and navigation and implementation on NEC PERCIO OODBMS are described in detail.

  • A Geographic Differential Script File Method for Distributed Geographic Information Systems

    Kyungwol KIM  Yutaka OHSAWA  

     
    PAPER-Spatial and Temporal Databases

      Vol:
    E82-D No:1
      Page(s):
    113-119

    This study presents a method that can be used to manage individual pieces of information in large scale distributed geographic information systems (GIS). In a distributed GIS, ordinary users usually cannot alter any of the contents on the server. The method in this study can be used to alter the content or add individual datums onto these types of non-write-permitted data sets. The authors have called it a 'Geographic Differential Script File' (GDSF). A client creates a GDSF, which contains private information that is to be added onto the served data. The client keeps this file on a local disk. When the user employs the data, he applies the differential script sequence onto the downloaded data in order to retrieve the information. GDSF is a collection of graphic operation commands which insert and delete objects as well as modify operations. GDSF also contains modifications of the attribute information of geographic entities. This method can also be used to revise information that is published on ROM media, e. g. CD-ROM or DVD-ROM, as well as in a distributed environment. In this paper, the method and results of applying it are presented.

  • Digital Logic Implementation of Wide-Range Frequency Linear Detector

    Chan Geun YOON  Jae Sul LEE  Choong Woong LEE  

     
    LETTER-Communication Device and Circuit

      Vol:
    E82-B No:1
      Page(s):
    192-195

    Digital logic frequency detector whose operation is based on the analog quadricorrelator is presented. Proposed circuit consists of conventional digital logic devices without an alog elements. Therefore, it has superior reliabilities over component drifts or aging effects. Frequency linear discrimination range is 100% of the reference clock rate.

  • Adaptive Reduced State-Transition Viterbi Differential Detection of M-Ary DPSK Signals Transmitted over Gaussian and Frequency Nonselective Rayleigh Faded Channels

    Fumiyuki ADACHI  

     
    PAPER-Mobile Communication

      Vol:
    E82-B No:1
      Page(s):
    156-164

    Adaptive maximum likelihood differential detection implemented by a reduced state-transition Viterbi algorithm (called adaptive 3-state RSTVDD) is presented for adaptive reception of M-ary differential phase shift keying (DPSK) signals transmitted over additive white Gaussian noise (AWGN) and frequency-nonselective Rayleigh fading channels. The adaptive 3-state RSTVDD comprises 1DD, a differential encoder, and reverse modulator, followed by reduced-state (3-state) Viterbi DD (RSVDD) with adaptive phase reference estimation. The adaptive 3-state RSVDD detector estimates the sequence of phase errors of the 1DD output. The phase reference estimator is an adaptive least mean square (LMS) filter with a step-size that adapts to changing channel conditions. The final detected symbol sequence is the modulo-2π sum of the 1DD output phase sequence and the detected phase error sequence. The bit error rate (BER) performance of M-ary DPSK, M=4, 8, and 16, in the AWGN and Rayleigh fading channels is evaluated by computer simulation to show that adaptive 3-state RSTVDD can achieve almost the same BER performance as the previously developed adaptive M-state RSVDD. Since the number of trellis states is reduced to three irrespective of M, the adaptive 3-state RSTVDD has lower computation complexity and it is particularly useful for M-ary DPSK with M8.

  • A Refined Model for Performance Analysis of Buffered Banyan Networks with and without Priority Control

    King-Sun CHAN  Kwan L. YEUNG  Sammy C. H. CHAN  

     
    PAPER-Switching and Communication Processing

      Vol:
    E82-B No:1
      Page(s):
    48-59

    The optimistic analytical results for performance analysis of buffered banyan networks are mainly due to certain independence assumptions used for simplifying analysis. To capture more effects of cell correlation, a refined analytical model for both single-buffered and multiple buffered banyan networks is proposed in this paper. When cell output contention occurs at a 2 2 switch element, two contention resolution schemes are used. One is based on randomly choosing the winning cell and another is to give priority to the cell which has been delayed in the current buffer for at least one stage cycle. The switch throughput, cell transfer delay and cell delay deviation for single-buffered banyan networks with and without using priority scheme are derived. Then the model is generalized to multiple buffered banyan networks where analytical expressions for throughput and delay are obtained. We show that using the priority scheme the cell delay deviation is reduced and the influence on throughput performance is insignificant. The results obtained from our analytical model are compared with the simulations and good agreement is observed. Comparisons with some proposed analytical models in the literature reveal that our model is more accurate and powerful in predicting the performance of buffered banyan networks.

  • PPCN: A High-Performance Copy Network for Large Scale ATM Switching Systems

    Wen-Tsuen CHEN  Yao-Wen DENG  

     
    PAPER-Communication Networks and Services

      Vol:
    E82-B No:1
      Page(s):
    1-13

    In this paper a high-performance copy network named PPCN is proposed for large scale ATM switching systems. The proposed copy network consists of multiple planes of the P2I Copy Networks(PCN) arranged in parallel. The PCN planes are designed based on the P2I multistage interconnection networks (MINs). A single PCN plane is itself a preliminary self-routing copy network which, however, is not a non-blocking one. A novel dispatcher is designed to dispatch input cells to the PCN planes such that no internal blocking nor output contention arises during the cell replication procedure and the offered load can be shared in an efficient way. The architecture of the PPCN provides flexibility for the maximum fanout for an input cells. In a PPCN system, the maximum fanout for an input cells is determined only by the number of interconnection stages within the PCN planes, independent of the input size of the system. The performance of the PPCN is studied under uniform traffic. It is shown that a small constant number of PCN planes are sufficient for a PPCN system to achieve an acceptable low overflow probability regardless of the system size. The hardware complexity of an N N PPCN is O(N log2 K) and the length of the routing tag is O(log2 K) bits, where K is the maximum fanout for an input cell. The storage complexity of the translation tables adopted in an N-inlet PPCN is O(N), which is much lower than that of the previously proposed ones.

  • Progressive Transmission of Continuous Tone Images Using Multi-Level Error Diffusion Method

    Tohru MORITA  Hiroshi OCHI  

     
    PAPER-Source Encoding

      Vol:
    E82-B No:1
      Page(s):
    103-111

    We propose a new method of progressive transmission of continuous tone images using multi-level error diffusion method. Assuming that the pixels are ordered and the error is diffused to later pixels, multi-level error-diffused images are resolved into a multiple number of bit planes. In an image with 8 bits per pixel, the number of the bit planes that we construct is 9, and the 2-level, 3-level, 5-level,, error-diffused images are produced by a successive use of the bit planes. The original image is finally achieved precisely.

  • On Priority Scheduling Algorithm at ATM Switches with Multi-Class Output Buffers

    Kwang-Hyun SHIM  Ji-Myong NHO  Jong-Tae LIM  

     
    PAPER-Switching and Communication Processing

      Vol:
    E82-B No:1
      Page(s):
    34-38

    In this paper, we present a priority scheduling algorithm at ATM switches with multi-class output buffers in which the service rate of each class buffer is dynamically adjusted. The service rate is computed periodically by a control scheme. We derive the design formulas of the control scheme to ensure that each class buffer occupancy converges to its desired operating point related to QoS requirement. Moreover, through dynamic service rate control in the proposed scheduling algorithm, the available channel capacity can be estimated exactly. It may be used for rate control of ABR traffic and call admission control of the other real-time traffic (CBR, VBR, etc. ).

  • Joint Low-Complexity Blind Equalization, Carrier Recovery, and Timing Recovery with Application to Cable Modem Transmission

    Cheng-I HWANG  David W. LIN  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E82-B No:1
      Page(s):
    120-128

    We present a receiver structure with joint blind equalization, carrier recovery, and timing recovery. The blind equalizer employs a decomposition transversal filtering technique which can reduce the complexity of convolution to about a half. We analyze the performance surface of the equalizer cost function and show that the global minima correspond to perfect equalization. We also derive proper initial tap settings of the equalizer for convergence to the global minima. We describe the timing recovery and the carrier recovery methods employed. And we describe a startup sequence to bring the receiver into full operation. The adaptation algorithms for equalization, carrier recovery, and timing recovery are relatively independent, resulting in good operational stability of the overall receiver. Some simulation results for cable-modem type of transmission are presented.

  • Threshold-Free Erasure Decoded Multicarrier Local Transmission over Multipath Channels

    Radhakrishna CANCHI  Yoshihiko AKAIWA  

     
    PAPER-Radio Communication

      Vol:
    E82-B No:1
      Page(s):
    129-135

    In order to exploit fully the frequency diversity benefits of multicarrier modulation (MCM), and the very nature of the frequency selective radio channel, we investigate an erasure decoded π/4 QDPSK MCM (ED-MCM) by employing simple Hamming (block) code. We propose the threshold-free criteria, i. e. relative minimum receive power test (RMRPT) and relative maximum decision error test (RMDET) for erasure generation and evaluate ED-MCM's performance by applying these tests to average received power, average decision error, instantaneous symbol/bit decision errors. At a normalized delay spread of 1/64, computer simulation results indicate a coding gains of 6.0 - 7.0 dB with ED-MCM at a BER of 10-3. RMDET/RMRPT based erasure decoding yields a 1.5 - 2.5 dB improvement over the conventional forward error correction (FEC) decoding at a BER of 10-5. The simulation results at other normalized delay spreads, i. e. , 1/32, 1/16 are also obtained. The erasure criteria (RMRPT and RMDET) applied to average values of received power/decision error yield consistently better performance over error only decoding. The results indicate that the erasure decoding based on relative (threshold-free) measures clearly promises an improved performance of the MCM system.

  • A Multiple Open-Loop Frequency Estimation Based on Differential Detection for MPSK

    Hiroshi KUBO  Keishi MURAKAMI  Makoto MIYAKE  Tadashi FUJINO  

     
    PAPER-Radio Communication

      Vol:
    E82-B No:1
      Page(s):
    136-144

    This paper proposes a multiple open-loop frequency estimation scheme based on differential detection for M-ary phase shift keying (MPSK), which accomplishes fast initial acquisition, precise frequency estimation and wide frequency coverage at the same time. The proposed scheme, which has a good trade-off between complexity and performance, operates as follows: 1) it consists of several frequency error detectors (FEDs) based on differential detection with different delays; 2) it precisely estimates frequency in a wide range (the same range of one symbol differential detection) by open-loop according to frequency errors detected by the FEDs. For real-time symbol-by-symbol operation in order to track fast time-varying frequency, it has a smaller complexity than the other frequency estimation schemes. It is confirmed by analysis, numerical calculation and computer simulation that the frequency estimation error of the proposed scheme is close to the Cramer-Rao lower bound (CRLB) (asymptotic degradation of the proposed scheme from the CRLB is about 0. 5 dB) while keeping a wide frequency coverage and this scheme can track fast time-varying frequency.

18941-18960hit(22683hit)