In case of the system identification problem, such as an echo canceller, estimated impulse response obtained by the frequency-domain adaptive filter based on the circular convolution has estimation error because the unknown system is based on the linear convolution in the time domain. In this correspondence, we consider a sufficient condition to reduce the estimation error.

This paper proposes a new design method of variable FIR digital filters. The method uses a multi-dimensional linearphase FIR filter as a prototype. The principle of the proposed method is based on the fact that the crosssectional characteristics of a 2-D filter along with a line vary if the intersection of this line is changed. The filter characteristics can be varied by recalculating all the filter coefficients from proposed equations, which leads to an advantage that the variable range is very wide. Another advantage is that the passband and stopband deviations are completely predetermined in the design procedures and that the passband edge can be accurately settled to a desired frequency while keeping the transition band width unchanged. First the proposed design method is explained and the effect of the transition band of 2-D filters is discussed. Then the calculation cost required in updating the filter coefficients are considered. Finally two design examples are presented and the proposed method is compared with the existing one, which shows the usefulness of our method.

Fast wavelet transform is presented for realtime processing of wavelet transforms. A processor for the fast wavelet transform is of the frequency sampling structure in architectural level. The fast wavelet transform owes its parallelism both to the frequency sampling structure and parallel tapping of a series of delay elements. Computational burden of the fast transform is hence independent of specific scale values in wavelets and the parallel processing of the fast transform is readily implemented for real-time applications. This point is quite different from the computation of wavelet transforms by convolution. We applied the fast wavelet transform to detecting detonation in a vehicle engine for precise real-time control of ignition advancement. The prototype wavelet for this experiment was the Gaussian wavelet (i.e. Gabor function) which is known to have the least spread both in time and in frequency. The number of complex multiplications needed to compute the fast wavelet transform over 51 scales is 714 in this experiment, which is less than one tenth of that required for the convolution method. Experimental results have shown that detonation is successfully detected from the acoustic vibration signal picked up by a single knock sensor embedded in the outer wall of a V/8 engine and is discriminated from other environmental mechanical vibrations.

It often occurs in an environmental phenomenon in our daily life that a specific signal is partially or completely contaminated by the additional external noise. In this study, a digital filter for estimating a specific signal fluctuating impulsively under the existence of an actual external noise with various kinds of probability distribution forms is proposed in an improved form of already reported digital filter. The effectivenss of the proposed theory is experimentally confirmed by applying it to the estimation of an actual impulsve signal in a room acoustic.

This paper proposes a hierarchical Digital Signal Processor (DSP) Code Generator VIRGO for large scale general signal processing algorithms. Hierarchical structured Vectorized Signal Flow Graph (V-SFG) description is used as input specifications. Ths DSP independent optimization procedure for both the program size and the execution time is performed each module by each hierarchically with regard to operation order, memory assignment and register allocation. The efficient code generation is demonstrated by comparing both instruction steps and dynamic steps of a practical ADPCM encoder/decoder with a conventional method.

This paper treats the problem of realizing high speed 2-D denominator separable digital filters. Partitioning a 2-D data plane into square blocks, filtering proceeds block by block sequentially. A fast intra-block parallel processing method was developed using block state space realization, which allows simultaneous computation of all the next block states and the outputs of one block. As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. The filter is implemented by a multiprocessor system, where for each matrix's row one processor is assigned to perform the row-column vector multiplication. All processors wirk in synchronized fashion. Number of processors of this implementation are equal to the number of rows of the reduced state matrix and throughput is raised with block lengths.

This paper designs and evaluates highly parallel VLSI processors for real time 2-D state-space digital filters using hierarchical behavioral description language and synthesizer. The architecture of the 2-D state-space digital filtering system is a linear systolic array of homogeneous VLSI processors, each of which consists of eight processing elements (PEs) executing 1-D state-space digital filtering with multi-input and multi-output. Hierarchical behavioral description language and synthesizer are adopted to design and evaluate PE's and the VLSI processors. One 16 bit fixed-point PE executing a (4, 4)-th order 2-D state-space digital filtering is described on the basis of distributed arithmetic in about 1,200 steps by the description language and is composed of 15 K gates in terms of 2 input NAND gate. One VLSI processor which is a cascade connection of eight PEs is composed of 129 K gates and can be integrated into one 1515 [mm2] VLSI chip using 1 µm CMOS standard cell. The 2-D state-space digital filtering system composed of 128 VLSI processors at 25 MHz clock can execute a 1,0241,024 image in 1.47 [msec] and thus can be applied to real-time conventional video signal processing.

This paper proposes an efficient design method of three-dimensional (3-D) recursive digital filters for video signal processing via decomposition of magnitude specifications. A given magnitude specification of a 3-D digital filter is decomposed into specifications of 1-D digital filters with three different (horizontal, vertical, and temporal) directions. This decomposition can reduce design problems of 3-D digital filters to design problems of 1-D digital filters, which can be designed with ease by conventional methods. Consequently, design of 3-D digital filters can be efficiently performed without complicated tests for stability and large amount of computations. In order to process video signal in real time, the 1-D digital filters with temporal direction must be causal, which is not the case in horizontal and vertical directions. Since the proposed method can approximate negative magnitude specifications obtained by the decomposition with causal 1-D R filters, the 1-D digital filters with temporal direction can be causal. Therefore the 3-D digital filters designed by the proposed method is suitable for real time video signal processing. The designed 3-D digital filters have a parallel separable structure having high parallelism, regularity and modularity, and thus is suitable for high-speed VLSI implementation.

This paper describes a super high definition (SHD) image processing system we have developed. The computing engine of this system is a parallel processing system with 128 processing elements called NOVI- HiPIPE. A new pipelined vector processor is introduced as a backend processor of each processing element in order to meet the great computing power required by SHD image processing. This pipelined vector processor can achieve 120 MFLOPS. The 128 pipelined vector processors installed in NOVI- HiPIPE yield a total system peak performance of 15 GFLOPS. The SHD image processing system consists of an SHD image scanner, and SHD image storage node, a full color printer, a film recorder, NOVI- HiPIPE, and a Super Frame Memory. The Super Frame Memory can display a ful color moving image sequence at a rate of 60 fps on a CRT monitor at a resolution of 2048 by 2048 pixels. Workstations, interconnected through an Ethernet, are used to control these units, and SHD image data can be easily transfered among the units. NOVI- HiPIPE has a frame memory which can display SHD still images on a color monitor, therefore, one processed frame can be directly displayed. We are developing SHD image processing algorithms and parallel processing methodologies using this system.

General estimation technique using covariance information is proposed for white Gaussian and white Gaussian plus coloured observation noises in linear stationary stochastic systems. Namely, autocovariance data of signal and coloured noise appear in a semi-degenerate kernel, which represents functional expression of the autocovariance data, in the current technique. Then the signal is estimated by directly using autocovariance data of signal and coloured noise. On the other hand, in the previous technique, the covariance information is expressed in the form of a semi-degenerate kernel, but its elements do not include any autocovariance data.

To describe the state of visual communications in the U.S., two words come to mind: digital and anticipation. Although compressed, digital video has been used in teleconferencing systems for at least ten years, it is only recently that a broad consensus has developed among diverse industries anticipating business opportunities, value, or both in digital video. The drivers for this turning point are: advances in digital signal processing, continued improvement in the cost, complexity, and speed of VLSI, maturing international standards and their adoption by vendors and end users, and a seemingly insatiable consumer demand for greater diversity, accessibility, and control of communication systems.

It has been recognized that there exist some disparities between properties of continuous control systems and those of discrete ones which are obtained from their continuous counterparts by use of a sampler and zero order hold. This still remains true even if the sampling rate becomes fast enough and sometimes causes unfavorable effects in control systems design. To reconcile with this conflict, use of delta operator has been proposed in place of z-operator recently. This note formulates a delta domain Lyapunov matrix equation and shows that the equation actually mediates the discrete Lyapunov equation and its continuous counterpart.

This paper proposes a technique for designing two-dimensional (2-D) digital filters approximating an arbitrary magnitude function. The technique is based on 2-D spectral factorization and rational approximation of the complex exponential function. A 2-D spectral factorization technique is used to obtain a recursively computable and stable system with nonsymmetric half-plane support from the desired 2-D magnitude function. Since the obtained system has an exponential function type transfer function and cannot be realized directly in a rational form, a class of realizable 2-D digital filters is introduced to approximate the exponential type transfer function. This class of filters referred to as two-dimensional log magnitude approximation (2-D LMA) filters can be viewed as an extension of the class of 1-D LMA filters to the 2-D case. Filter coefficients are given by the 2-D complex cepstrum coefficients, i.e., the inverse Fourier transform of the logarithm of the given magnitude function, which can be efficiently computed using 2-D FFT algorithm. Consequently, computation of the filter coefficients is straightforward and efficient. A simple stability condition for the 2-D LMA filters is given. Under this condition, the stability of the designed filter is guaranteed. Parallel implementation of the 2-D LMA filters is also discussed. Several examples are presented to demonstrate the design capability.

This paper presents a new method for estimating lattice parameters of a system with additive white noise. A new lattice structure filter is used to reduce the effect of additive white noise, and then, an overfitting lattice filter is proposed to obtain the ARMA parameters by using the estimated lattice parameters with additive white noise.

This paper proposes a new construction of the minimum knowledge undeniable signature scheme which solves a problem inherent in Chaum's scheme. We formulate a new proof system, the minimum knowledge interactive bi-proof system, and a pair of languages, the common witness problem, based on the random self-reducible problem. We show that any common witness problem has the minimum knowledge interactive bi-proof system. A practical construction for undeniable signature schemes is proposed based on such a proof system. These schemes provide signature confirmation and disavowal with the same protocol (or at the same time).