Myunghee SON Byungchul KIM Jaeyong LEE
Automatic discovery of physical topology plays a crucial role in enhancing the manageability of modern large Ethernet mesh networks. Despite the importance of the problem, earlier research and commercial network management tools have typically concentrated on either discovering active topology, or proprietary solutions targeting specific product families. Recent works [1]-[3] have demonstrated that physical topology can be determined using standard SNMP MIB, but these algorithms depend on Filtering Database and rely on the so-called spanning tree protocol (IEEE 802.1d) in order to break cycles, thereby avoiding the possibility of infinitely circulating packets and deadlocks. A previous work [1] requires that Filtering Database entries are completed; however it is a very critical assumption in a realistic Ethernet mesh network. In this paper, we have proposed a new topology discovery algorithm which works without the complete knowledge of Filtering Database. Our algorithm can discover complete physical topology including inactive interfaces eliminated by the spanning tree protocol in LEMNs. The effectiveness of the algorithm is demonstrated by an implementation.
Kazuhiko TERADA Kenji KAWAI Osamu ISHIDA Keiji KISHINE Noboru IWASAKI Haruhiko ICHINO
This paper describes ILS (Inter-frame Link Signaling) that provides SDH/SONET (Synchronous Digital Hierarchy/Synchronous Optical NETwork) compatible OAM&P (Operations, Administration, Maintenance, and Provisioning) functions for 10 GbE (10-Gbit/s Ethernet) physical layer links. ILS transports OAM&P overhead bytes by replacing Idles in interframe gaps and organizes virtual frames to emulate SDH/SONET overhead transport. The ILS coding scheme has three features: 10 GbE PHY transparency, error detection ability, and disparity neutral characteristics. A 10 GbE LAN-PHY media converter, one-chip PHY LSI, and a XENPAK transceiver embedded with ILS have been developed in order to facilitate ILS implementation in optical network systems or Ethernet equipment. We confirmed ILS's feasibility through an experiment using the media converters and XENPAKs. The ILS can achieve highly reliable and cost-effective 10 GbE transport over optical networks.
Michitaka OKUNO Shin-ichi ISHIDA Hiroaki NISHI
A novel cache-based packet-processing-engine (PPE) architecture that achieves low-power consumption and high packet-processing throughput by exploiting the nature of network traffic is proposed. This architecture consists of a processing-unit array and a bit-stream manipulation path called a burst stream path (BSP) that has a special cache mechanism called a process-learning cache (PLC). Network packets, which have the same information in their header, appear repeatedly over a short time. By exploiting that nature, the PLC memorizes the packet-processing method with all results (i. e. , table lookups), and applies it to other packets. The PLC enables most packets to skip the execution at the processing-unit array, which consumes high power. As a practical implementation of the cache-based PPE architecture, P-Gear was designed. In particular, P-Gear was compared with a conventional PPE in terms of silicon die size and power consumption. According to this comparison, in the case of current 0.13-µm CMOS process technology, P-Gear can achieve 100-Gbps (gigabit per second) packet-processing throughput with only 36.5% of the die size and 32.8% of the power consumption required by the conventional PPE. Configurations of both architectures for the 1- to 100-Gbps throughput range were also analyzed. In the throughput range of 10-Gbps or more, P-Gear can achieve the target throughput in a smaller die size than the conventional PPE. And for the whole throughput range, P-Gear can achieve a target throughput at lower power than the conventional PPE.
Atsushi IWATA Youichi HIDAKA Masaki UMAYABASHI Nobuyuki ENOMOTO Akira ARUTAKI Kazuo TAKAGI Dirceu CAVENDISH Rauf IZMAILOV
The authors propose a Global Open Ethernet (GOE) architecture as a cost-effective scalable solution for next generation of VPNs over optical network infrastructure. Three main approaches have been proposed for a cost-effective VPN solution on metro area network (MAN): Resilient Packet Ring (RPR), Ethernet over MPLS (EoMPLS), Extended Ethernet via Stacked VLAN tagging (EESVLAN). None of these schemes can satisfy the following requirements at the same time: network topology flexibility, affordable network functionalities, low equipment cost, and low operational cost. We propose the GOE architecture as an affordable VPN solution that addresses all these requirements. GOE combines the functionality of MPLS VPN with low cost and easy operation of Ethernet-based solutions in a cost-effective scalable manner. In this paper, we evaluate the performance of EoMPLS, EESVLAN and GOE VPN solutions in terms of the cost and network utilization. We show that the cost of GOE solution is two-three times smaller than the cost of the other approaches. We also demonstrate that the network utilization provided by GOE is 22% higher than that of both EoMPLS and EESVLAN. Therefore, GOE can be shown to be a cost-effective simple VPN solution with clear advantages in functionality, management and performance.
Hidehiro TOYODA Hiroaki NISHI Shinji NISHIMURA Hisaaki KANAI Katsuyoshi HARASAWA
The first practical approach to 100-Gigabit Ethernet, i.e., Ethernet with a throughput of 100-Gb/s, is proposed for use in the next generation of LANs for GRID computing and large-capacity data centers. New structures, including a coding architecture, de-skewing method and high-speed packaging techniques, are introduced to the PHY layer to obtain the required data rate. Our form of 100-Gigabit Ethernet uses 10-Gb/s 10-channel CWDM or parallel-optical links. The coding architecture is formed of 64B/66B codes, modified for the CWDM and parallel links. In the de-skewing of the parallel signals, specially designed IDLE characters are used to compensate for skewing of data in the respective signal lanes. Advanced packaging techniques, which suppress the propagation loss and reflection of the 10-Gb/s lanes to obtain high-speed, good integrity and low-noise signaling, are proposed and evaluated. The proposed architectural features make this 100-Gigabit Ethernet concept practical for next-generation LANs.
Lin ZHANG Eung-Suk AN Chan-Hyun YOUN Hwan-Geun YEO Sunhee YANG
A broadband access network is required for supporting the increased Internet data traffic. One of the most cost-effective solutions is the Ethernet Passive Optical Networks (E-PONs) with the efficient bandwidth assignment function by which the upstream bandwidth can be shared among access users. To satisfy the services with heterogeneous QoS characteristics, it is very important to provide QoS guaranteed network access while utilize the bandwidth efficiently. In this paper, a dual DEB-GPS scheduler in E-PON is presented to provide delay-constraint and lossless QoS guarantee to QoS service and maximize the bandwidth to best-effort service. Simulation results show our scheme outperforms the conventional bandwidth allocation scheme in E-PON system.
Tsutomu YOSHIMURA Kimio UEDA Jun TAKASOH Harufusa KONDOH
In this paper, we present a 10 Gbase Ethernet Transceiver that is suitable for 10 Gb/s Ethernet applications. The 10 Gbase Ethernet Transceiver LSI, which contains the high-speed interface and the fully integrated IEEE 802.3ae compliant logics, is fabricated in a 0.18 µm SOI/CMOS process and dissipates 2.9 W at 1.8 V supply. By incorporating the monolithic approach and the use of the advance CMOS process, this 10 GbE transceiver realizes a low power, low cost and compact solution for the exponentially increasing need of broadband network applications.
Jihoon PARK Jongkyu PARK Ilseok HAN Hagbae KIM
The network duplicating can achieve significant improvements of the Local Area Network (LAN)'s performance, availability, and security. For LAN duplicating, a Dual-Path Ethernet Module (DPEM) is developed. Since a DPEM is simply located at the front end of any network device as a transparent add-on type independent hardware machine, it does not require sophisticated server reconfiguration. We examine the desirable properties and the characteristics on the Dual-LAN structure. Our evaluation results show that the developed scheme is more efficient than the conventional Single-LAN structures in various aspects.
Akihiko HIRATA Mitsuru HARADA Tadao NAGATSUMA
Wireless data transmission at 3.0 Gbit/s was achieved by using millimeter-wave photonic techniques, such as optical 120-GHz subcarrier generation, optical modulation, and high-power photonic millimeter-wave emission. We have successfully demonstrated the transmission of optical Gigabit Ethernet signals over this link.
Minsuk HONG Jinsung OH Chan Young PARK Wooseok KANG Sehyeon RHEE Sang-Hui PARK
In this paper, we present the design and implementation of a cost effective Ethernet over HDLC forwarding VLSI for network access system. It supports 10/100 Mbps Ethernet PHYs and up to 50 Mbps HDLC interface directly applied to Modem or transceiver. The maximum forwarding/filtering rate is 90,000 pps with a throughput latency of 1 frame, which supports high speed applications. It can also support both master mode for Ethernet PHY and slave mode for switching chip by the pin configuration. It has been implemented as a single chip based on 0.5 µm CMOS technology. Field test shows that the wire-speed packet forwarding and processing using by the implemented chip can be achieved.
Rainer MICHALZIK Karl Joachim EBELING Max KICHERER Felix MEDERER Roger KING Heiko UNOLD Roland JAGER
The present paper discusses several promising application areas for optical data links based on high-performance vertical-cavity surface-emitting laser diodes (VCSELs). Both 850 and 980 nm emission wavelength devices realized in the GaAs-AlGaAs or InGaAs-AlGaAs material systems are considered. We show data transmission results of 10 Gb/s signals at 830 nm wavelength over a new high-bandwidth multimode silica fiber of up to 1.6 km length. The same fiber type is employed to demonstrate the first 40 Gb/s transport over 300 m distance by means of a 4-channel coarse wavelength-division multiplexing approach. A first 1 10 linear VCSEL array capable of 10 Gb/s per channel operation is presented for use in next generation parallel optical modules. To improve the singlemode emission characteristics for output power in the 5 mW range we introduce a new device concept incorporating a long monolithic cavity. For low-cost short-distance data links we investigate graded-index polymer optical fibers and report on up to 9 Gb/s transmission over a length of 100 m. Polymer waveguides are also used in an optical layer of a hybrid electrical-optical printed circuit board. Transmitted 10 Gb/s optical data over a prototype board show the potential of this new technology. Finally we present two-dimensional VCSEL arrays for highly parallel data transport on a CMOS chip level. Both 980 and 850 nm bottom emitting devices with modulation capabilities up to 12.5 Gb/s are discussed.
Rainer MICHALZIK Karl Joachim EBELING Max KICHERER Felix MEDERER Roger KING Heiko UNOLD Roland JAGER
The present paper discusses several promising application areas for optical data links based on high-performance vertical-cavity surface-emitting laser diodes (VCSELs). Both 850 and 980 nm emission wavelength devices realized in the GaAs-AlGaAs or InGaAs-AlGaAs material systems are considered. We show data transmission results of 10 Gb/s signals at 830 nm wavelength over a new high-bandwidth multimode silica fiber of up to 1.6 km length. The same fiber type is employed to demonstrate the first 40 Gb/s transport over 300 m distance by means of a 4-channel coarse wavelength-division multiplexing approach. A first 1 10 linear VCSEL array capable of 10 Gb/s per channel operation is presented for use in next generation parallel optical modules. To improve the singlemode emission characteristics for output power in the 5 mW range we introduce a new device concept incorporating a long monolithic cavity. For low-cost short-distance data links we investigate graded-index polymer optical fibers and report on up to 9 Gb/s transmission over a length of 100 m. Polymer waveguides are also used in an optical layer of a hybrid electrical-optical printed circuit board. Transmitted 10 Gb/s optical data over a prototype board show the potential of this new technology. Finally we present two-dimensional VCSEL arrays for highly parallel data transport on a CMOS chip level. Both 980 and 850 nm bottom emitting devices with modulation capabilities up to 12.5 Gb/s are discussed.
Masugi INOUE Gang WU Yoshihiro HASE Atsuhiko SUGITANI Eiichiro KAWAKAMI Satoru SHIMIZU Kiyohito TOKUDA
We have developed an IP-over-Ethernet-based ultra high-speed multimedia wireless LAN prototype operating in the 60-GHz band. It employs a media-access-control (MAC) protocol based on reservation-based slotted idle signal multiple access (RS-ISMA), which was implemented in the former prototype, for supporting various IP traffic such as real-time AV traffic and best-effort web traffic. The protocol also has a new function called NACK sensing for the efficient retransmission of wireless multicast packets. It was demonstrated that the prototype can provide the world's fastest radio transmission speed of 128 Mbps for two-way communications. We have measured the throughput and latency of the prototype LAN for Ethernet-frame transmission in a point-to-point baseband-connected environment. The measurement showed that the prototype LAN provides a maximum throughput of 30 Mbps, and that the measured throughput agrees with the theoretically predicted throughput. It also showed that the maximum latency, which includes switching and routing latency in the wired part, is below 1 msec.
Yoshito TOBE Yosuke TAMURA Hideyuki TOKUDA
Traffic management schemes such as Connection Admission Control (CAC), policing, and traffic shaping are important to provide multimedia communications with better Quality of Service (QoS). In the conventional model, admission control and policing are done at intermediate nodes, and traffic shaping is done at the edge of a network. However, QoS of communications should be defined between tasks or threads rather than between hosts. Therefore traffic management inside a host is as important as that in networks. We propose software-based traffic management architecture over a real-time microkernel. The architecture focuses on the interface between a network driver and user threads calling the driver. We categorized services of communication threads into three classes: Real-Time at Guaranteed Rate (RT-GR), Real-Time at Available Rate (RT-AR), and Best-Effort (BE). Our architecture is designed for an environment containing a mixture of these services. In the architecture, a sender periodic thread of RT-GR or RT-AR is executed such that the sending rate matches a user-specified rate. The network driver monitors the per-flow rate of injected data and discards the data if the injected rate exceeds the user-specified rate. To avoid the continuous discarding of data, the sending thread can adjust its sending rate by periodically looking at logged data concerning the rate. RT-AR service can achieve more than the specified rate when bandwidth is available. The scheme of software traffic management is effective in attaining higher throughput not only for full-duplex Ethernet but also for ATM because the difference of rate between hardware and software is reduced. In this paper, we describe the design and implementation of the software-based traffic management architecture on Real-Time Mach. The results of performance evaluations demonstrate that our traffic management scheme performs well for full-duplex Ethernet.