Logic synthesizers usually have good area minimization capabilities, producing circuits of minimal area. But good delay minimization techniques are still missing in current logic synthesis technology. In [7], the RENO algorithm (which stands for REsynthesis for Network Optimization) was proposed for minimizing the area of multi-level combinational networks, and its effectiveness in designing minimal-area networks has been demonstrated. In this paper, we present improvements and extensions of the RENO algorithm for network delay minimization by using Boolean resynthesis techniques. We will discuss new algorithms for gate resynthesis which have not only reduced the processing time significantly, but also have improved the quality of minimization. Due to the generality of the gate resynthesis algorithms, we can minimize both delay and area of a network concurrently in a unified way, and network delay is reduced significantly with no or very small area penalty. Extensive experimental results and comparison with the speed_up algorithm in SIS-1.0 are presented.

A technique for reducing fiber four-wave mixing (FWM) in multichannel transmissions is proposed. Birefringent elements are inserted on the way of transmission lines. Due to the effect of birefringent elements on the polarization states, the effective crosstalk due to FWM is expected to be 3/16 of that in the worst case in conventional systems.

This paper analyses the amplification characteristics of a two-loop controlled switching power amplifier for a digital portable telephone and presents the amplifier which has a flat gain and small phase delay from dc to 100kHz. This amplifier is a modification of a switching regulator and it uses two-loop control to achieve a wideband amplification characteristic. Optimum amplification characteristics, however, can't be designed by using the conventional method for designing a switching regulator because a flat gain and small phase delay in an amplification characteristic has not been considered for most switching regulators. This paper analyses in detail the small-signal transfer functions of the switching power amplifier and shows the behaviour of zero and poles. It also shows the boundary condition of large-signal operation. A new design procedure of a switching power amplifier is presented, and the analytical results are verified by experiments.

We have calssified parenchymal echo patterns of cirrhotic liver into four types, according to the size of hypoechoic nodular lesions. Neural network technique has been applied to the characterization of hepatic parenchymal diseases in ultrasonic B-scan texture. We employed a multi-layer feedforward neural network utilizing the back-propagation algorithm. We carried out four kinds of pre-processings for liver parenchymal pattern in the images. We describe the examination of each performance by these pre-processing techniques. We show four results using (1) only magnitudes of FFT pre-processing, (2) both magnitudes and phase angles, (3) data normalized by the maximum value in the dataset, and (4) data normalized by variance of the dataset. Among the 4 pre-processing data treatments studied, the process combining FFT phase angles and magnitudes of FFT is found to be the most efficient.

This paper describes a neural network scheduler for scheduling independent and nonpreemptable tasks with deadlines and resource requirements in critical real-time applications, in which a schedule is to be obtained within a short time span. The proposed neural network scheduler is an integrate model of two Hopfield-Tank neural network medels. To cope with deadlines, a heuristic policy which is modified from the earliest deadling policy is embodied into the proposed model. Computer simulations show that the proposed neural network scheduler has a promising performance, with regard to the probability of generating a feasible schedule, compared with a scheduler that executes a conventional algorithm performing the earliest deadline policy.

In this paper we present a new tracking scheme using two tracking modes which are based on the concept of Delay Lock Loop (DLL). Under the multipath fading channels, a conventional DLL has problems of jitter performance degradation, lock-off and delay offset. It is necessary to solve these problems, because mobile communications have increased drastically. We propose the combination of a coarse tracking mode and a fine tracking mode. The former mode is employed for reducing the possibility of losing lock, the latter mode is used for suppressing the jitter of delay error and the delay offset in the presence of multipath fading. The both modes utilize the power of delay paths shown in the auto-correlation function of the received signal at the DLL. Computer simulation results show that our proposed scheme is extremely useful comparing with a conventional scheme over the multipath fading channels.

Concatenated coding techniques are applied to slow frequency-hop packet radio communications for channels with partial-band interference. Binary orthogonal signaling (e.g., binary FSK) is employed with noncoherent demodulation. The outer codes are Reed-Solomon codes and the inner codes are convolutional codes. Two concatenated coding schemes are compared. The first employs an interleaver between the outer Reed-Solomon code and the inner convolutional code. The second scheme employs an additional interleaver following the convolutional code. Comparisons are made between the performance of these concatenated coding schemes and the performance of Reed-Solomon codes alone.

The effectiveness of error-control coding in a frequency-hop radio system can be increased greatly by the use of side information that is developed in the radio receiver. The transmission of test symbols provides a simple method for the derivation of side information in a slow-frequency-hop receiver. Requirements on the reliability of the side information are presented, and their implications in determining the necessary number of test symbols are described. Other methods for developing side information are reviewed briefly, and applications of side information to routing protocols for frequency-hop packet radio networks are discussed.

We propose a new architecture of Functional Memory type Parallel Processor (FMPP) architectures called bit-parallel block-parallel (BPBP) FMPP. Design details of a prototype BPBP FMPP chip are also shown. FMPP is a massively parallel processor architecture that has a memory-based simple two-dimensional regular array structure suitable for memory VLSI technology. Computation space increases as integration density of memory increases. Computation time does not depend on the number of processors. So far, a bit-serial word-parallel (BSWP) implementation based on a content addressable memory (CAM) is mainly investigated as one of promising architectures of FMPP. In a BSWP FMPP, each word of a CAM works as a processor, and the amount of hardware is minimized by abopting a bit-serial operation, thus maximizing integration scale. The BSWP FMPP, however, does not allow operations between two words, which restriction limits the applicability of the BSWP FMPP. On the other hand, the proposed BPBP FMPP is designed to execute logical and arithmetic operations on two words. These operations are performed simultaneously on every group of words called a block. BPBP FMPP hereby achieves a high performance while maintaining high integration density of the BSWP, and is suitable for various applications.

To realize next-generation high performance ULSI processors, it is a very important issue to reduce the critical delay path which is determined by a cascade chain of basic gates. To design highly parallel digital operation circuits such as an adder and a multiplier, it is difficult to find the optimal code assignment in the non-linear digital system. On the other hand, the use of the linear concept in the digital system seems to be very attractive because analytical methods can be utilized. To meet the requirement, we propose a new design method of highly parallel linear digital circuits for unary operations using the concept of a cycle and a tree. In the linear digital circuit design, the analytical method can be developed using a representation matrix, so that the search procedure for optimal locally computable circuits becomes very simple. The evaluations demonstrate the usefulness of the circuit design algorithm.

In order to describe the flow passing through the glottis, we constructed a dynamic three-dimensional finite element model of the human larynx. The transient flow fields in the laryngeal model were calculated to examine the dynamic effects generated by the vocal fold vibration. A phase difference between the upper and lower edges of the vocal folds was included in the model to investigate the effect of the glottal shapes on pressure-flow relationships in the larynx during the vocal fold vibration. Using STAR-CD thermofluids analysis system, which is capable of treating the transient flow in moving-boundary situations with finite volume method, we solved the viscous incompressible Navier-Stokes equations to investigate the glottal flows and transglottal pressures as a function of the vocal fold vibration. The results were compared to the uniform glottis model and the theoretical model proposed by Ishizaka and Matsudaira, respectively. The effects of dynamic factors on the pressure distributions and flow patterns in the larynx resulting from the vocal-fold vibration were also discussed.

Design of high-speed digital circuits such as adders and multipliers is one of the most important issues to implement high performance VLSI systems. This paper proposes a new multiple-valued code assignment algorithm to implement locally computable combinational circuits for k-ary operations. By the decomposition of a given k-ary operation into unary operations, a code assignment algorithm for k-ary operations is developed. Partition theory usually used in the design of sequential circuits is effectively employed for optimal code assignment. Some examples are shown to demonstrate the usefulness of the proposed algorithm.

A laser system which has a mirror outside of it to feedback a delayed output has been described by the Maxwell-Bloch equations with time delay. It is shown that a chaotic behavior in the equations can be controlled by using a OPF control algorithm. Our numerical simulation indicates that the chaotic behavior is stabilized on 1, 2 periodic unstable orbits.

By a measure we mean a function µ from {0, 1}* (the set of all binary sequences) to real numbers such that µ(x)0 and µ({0, 1}*). A malign measure is a measure such that if an input x in {0, 1}n (the set of all binary sequences of length n) is selected with the probability µ(x)/µ ({0, 1}n) then the worst-case computation time tWOA (n) and the average-case computation time tav,µA(n) of an algorithm A for inputs of length n are functions of n of the same order for any algorithm A. Li and Vitányi found that measures that are known as a priori measures are malign. We prove that a priori" -ness and malignness are different in one strong sense.

Algorithms for computing channel capacity have been proposed by many researchers. Recently, one of the authors proposed an efficient algorithm using Newton's method. Since this algorithm has local quadratic convergence, it is advantageous when we want to obtain a numerical solution with high accuracy. In this letter, it is shown that this algorithm can be extended to the algorithm for computing the constrained capacity, i.e., the capacity of discrete memoryless channels with linear constraints. The global convergence of the extended algorithm is proved, and its effectiveness is verified by numerical examples.

This paper presents a new Hypermedia communication platform supported by the new digital image medium of super high definition (SHD) images. This new image communication platform will encourage the integration of all existing media to realize rich and realistic visual communication over B-ISDN. SHD images have a resolution of more than 20482048 pixels and the frame rate is more than 60 frames/sec. To achieve an real-time compression of SHD moving images, parallel signal processing systems with peak performance of 0.5 Tera Flops will be necessary. The specification requirements, signal processing and communication technologies needed to achieve SHD image communication are discussed. The relationship of hypermedia to SHD images is also examined.

Manipulation of Boolean functions is one of the most important techniques for implementing of VLSI logic design systems. This paper presents a fast method for generating prime-irredundant covers from Binary Decision Diagrams (BDDs), which are efficient representation of Boolean functions. Prime-irredundant covers are forms in which each cube is a prime implicant and no cube can be eliminated. This new method generates compact cube sets from BDDs directly, in contrast to the conventional cube set reduction algorithms, which commonly manipulate redundant cube sets or truth tables. Our method is based on the idea of a recursive operator, proposed by Morreale. Morreale's algorithm is also based on cube set manipulation. We found that the algorithm can be improved and rearranged to fit BDD operations efficiently. The experimental results demonstrate that our method is efficient in terms of time and space. In practical time, we can generate cube sets consisting of more than 1,000,000 literals from multi-level logic circuits which have never previously been flattened into two-level logics. Our method is more than 10 times faster than ESPRESSO in large-scale examples. It gives quasi-minimum numbers of cubes and literals. This method should find many useful applications in logic design systems.

Recently, studies aiming at the next generation of visual communication services which support better human communication have been carried out intensively in Japan. The principal motive of these studies is to develop new services which are not restricted to a conventional communication framework based on the transmission of waveform signals. This paper focuses on three important key words in these studies; "intelligent," "real," and "distributed and collaborative," and describes recent research activities. The first key word "intelligent" relates to intelligent image coding. As a particular example, model-based coding of moving facial images is discussed in detail. In this method, shape change and motion of the human face is described by a small number of parameters. This feature leads to the development of new applications such as very low bit-rate transmission of moving facial images, analysis and synthesis of facial expression, human interfaces, and so on. The second key word "real" relates to communication with realistic sensations and virtual space teleconferencing. Among various component technologies, real-time reproduction of 3-D human images and a cooperative work environment with virtual space are discussed in detail. The last key word "distributed and collaborative" relates to collaborative work in a distributed work environment. The importance of visual media in collaborative work, a concept of CSCW, and requirements for realizing a distributed collaborative environment are discussed. Then, four examples of CSCW systems are briefly outlined.

In a cellular system for mobile communications, every service area is divided into a number of cells for utilizing the frequency spectrum efficiently. Service areas for such systems are two dimensional, however, the analysis of the characteristics of the communication traffic for the areas are quite complicated, since the motion of the vehicles in the area can not be predicted precisely. For making the analysis easily, the areas are assumed to be band-shaped like a highway. Furthermore, in the analysis, the traffic offered to a cell is assumed to be stationary. In actual systems, the density of vehicles and the offered communication traffic is not stationary, so that many differences exist between the analysis and the actual systems. This paper presents an analysis method using state equations. The equations represent the transient characteristics of mobile communication traffic when a band-shaped service area is assumed. The transition is made by accidents or congestion, and causes the rapid offered traffic change in a communication system. In the method, numerical analysis is made under the consideration of "handoff" operation. The operation consists of surrendering the channel used in the previous cell and reassigning a new channel when the vehicle crosses the cell boundary. The analytical results are compared with the simulations, and the two results show good agreement. The method presented in this paper can be used for designing the switching system when the offered traffic changes rapidly due to accidents or congestion.

This paper addresses onboard processing architecture employing direct regeneration. The advantage of direct regeneration is its hardware simplicity, even though the bit error rate performance is slightly inferior to that of demodulation-remodulation scheme with coherent detection. The channel filtering schemes as well as achievable capacities are examined by computer simulation. It is found that the system with direct regeneration has advantage in channel capacity and transmit earth station e.i.r.p. for small earth stations. A possible configuration of direct regeneration onboard in future satellite systems is proposed.