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[Keyword] noise analysis(7hit)

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  • Accurate Signal-to-Noise Analysis of Derivative and Quadrature Differential FM Discriminators Based on Multi-Sinusoidal AWGN Representation

    Apisak WORAPISHET  Tanee DEMEECHAI  

     
    PAPER-Analog Signal Processing

      Vol:
    E93-A No:10
      Page(s):
    1755-1764

    The noise performances under AWGN channel of the IF-derivative and the quadrature differential FM discriminators, which are widely utilized in modern low power wireless radios, are analyzed and compared. The analysis relies upon the time-domain multi-sinusoidal representation of the noise that facilitates accurate and closed-form analytical SNR characteristics. Derivation of the SNR equations is detailed and discussion based on the analysis results is given to provide insights into the discriminators' performance limitation where it is demonstrated that the differential scheme is considerably more advantageous. Simulated SNR characteristics of practical continuous-phase frequency shift keying (CPFSK) systems using both the FM discriminators are presented as analysis verification.

  • Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits

    Daisuke KOSAKA  Makoto NAGATA  Yoshitaka MURASAKA  Atsushi IWATA  

     
    PAPER

      Vol:
    E90-A No:2
      Page(s):
    380-387

    Substrate-coupling equivalent circuits can be derived for arbitrary isolation structures by F-matrix computation. The derived netlist represents a unified impedance network among multiple sites on a chip surface as well as internal nodes of isolation structures and can be applied with SPICE simulation to evaluate isolation strengths. Geometry dependency of isolation attributes to layout parameters such as area, width, and location distance. On the other hand, structural dependency arises from vertical impurity concentration specific to p+/n+ diffusion and deep n-well. Simulation-based prototyping of isolation structures can include all these dependences and strongly helps establish an isolation strategy against high-frequency substrate coupling in a given technology. The analysis of isolation strength provided by p+/n+ guard ring, deep n-well guard ring as well as deep n-well pocket well explains S21 measurements performed on high-frequency test structures targeting 5 GHz bandwidth, that was formed in a 0.25-µm CMOS high frequency.

  • Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers

    Hiroshi TANIMOTO  Ryuta ITO  Takafumi YAMAJI  

     
    PAPER-RF

      Vol:
    E88-C No:6
      Page(s):
    1203-1211

    An even-harmonic mixer using a bipolar differential pair (bipolar harmonic mixer;BHMIX) is theoretically analyzed from the direct conversion point of view; i.e, conversion gain, third-order input intercept point (IIP3), self-mixing induced dc offset level, and second-order input intercept point (IIP2). Also, noise are analyzed based on nonlinear large-signal model, and numerical results are given. Noises are treated as cyclostationary noises, thus all the folding effects are taken into account. Factors determining IIP3, IIP2, dc offset, and noise are identified and estimation procedures for these characteristics are obtained. For example, design guidelines for the optimal noise performance are given. Measured results support all the analysis results, and they are very useful in the practical BHMIX design.

  • Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators

    Jaesang LIM  Jaejoon KIM  Beomsup KIM  

     
    PAPER-General Fundamentals and Boundaries

      Vol:
    E88-A No:4
      Page(s):
    1084-1089

    A novel CMOS LC oscillator architecture combining an LC tuned oscillator and a ring structure is presented as a new design topology to deliver improved phase noise for multiphase applications. The relative enhancement in the phase noise is estimated using a linear noise modeling approach. A three-stage LC-ring oscillator fabricated in a 0.6 mm CMOS technology achieves measured phase noise of -132 dBc/Hz at 600 kHz offset from a 900 MHz carrier and dissipates 20 mW with a 2.5 V power supply.

  • Noise-Analysis Based Threshold-Choosing Algorithm in Motion Estimation

    Xiaoying GAN  Shiying SUN  Wentao SONG  Bo LIU  

     
    LETTER-Multimedia Systems for Communications" Multimedia Systems for Communications

      Vol:
    E88-B No:4
      Page(s):
    1753-1755

    A novel threshold choosing method for the threshold-based skip mechanism is presented, in which the threshold is obtained from the analysis of the video device induced noise variance. Simulation results show that the proposed method can remarkably reduce the computation time consumption with only marginal performance penalty.

  • A Study of the Signal-to-Noise Ratio of a High-Speed Current-Mode CMOS Sample-and-Hold Circuit

    Yasuhiro SUGIMOTO  Masahiro SEKIYA  Tetsuya IIDA  

     
    PAPER

      Vol:
    E80-A No:10
      Page(s):
    1986-1993

    Our study investigated the realization of a high-precision MOS current-mode circuit. Simple studies have implied that it is difficult to achieve a high signal-to-noise ratio (S/N) in a current-mode circuit. Since the signal voltage at the internal node is suppressed, the circuit is sensitive to various noise sources. To investigate this, we designed and fabricated a current-mode sample-and-hold circuit with a 3V power supply and a 20MHz clock speed, using a standard CMOS 0.6µm device process. The measured S/N reached 57dB and 59dB in sample mode, and 51dB and 54dB in sample-and-hold mode, with 115µA from a 3V power supply and 220µA from a 5V power supply of input currents and a 10MHz noise bandwidth. The S/N analysis based on an actual circuit was done taking device noise sources and the fold-over phenomena of noise in a sampled system into account. The calculation showed 66.9dB of S/N in sample mode and 59.5dB in sample-and-hold-mode with 115µA of input current. Both the analysis and measurement indicated that 60dB of S/N in sample mode with a 10MHz noise bandwidth is an achievable value for this sample-and-hold circuit. It was clear that the current-mode approach limits the S/N performance because of the voltage suppression method. This point should be further studied and discussed.

  • Scalar Quantization Noise Analysis and Optimal Bit Allocation for Wavelet Pyramid Image Coding

    Jie CHEN  Shuichi ITOH  Takeshi HASHIMOTO  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E76-A No:9
      Page(s):
    1502-1514

    A complete analysis for the quantization noises and the reconstruction noises of the wavelet pyramid coding system is given. It is shown that in the (orthonormal) wavelet image coding system, there exists a simple and exact formula to compute the reconstruction mean-square-error (MSE) for any kind of quantization errors. Based on the noise analysis, an optimal bit allocation scheme which minimizes the system reconstruction distortion at a given rate is developed. The reconstruction distortion of a wavelet pyramid system is proved to be directly proportional to 2-2, where is a given bit rate. It is shown that, when the optimal bit allocation scheme is adopted, the reconstruction noises can be approximated to white noises. Particularly, it is shown that with only one known quantization MSE of a wavelet decomposition at any layer of the wavelet pyramid, all of the reconstruction MSE's and the quantization MSE's of the coding system can be easily calculated. When uniform quantizers are used, it is shown that at two successive layers of the wavelet pyramid, the optimal quantization step size is a half of its predecessor, which coincides with the resolution version of the wavelet pyramid decomposition. A comparison between wavelet-based image coding and some well-known traditional image coding methods is made by simulations, and the reasons why the wavelet-based image coding is superior to the traditional image coding are explained.