This paper presents an efficient multi-precision modular-multiplication algorithm which minimizes the calculation RAM space required when implementing public-key schemes with software on general-purpose computers including smart cards and personal computers. Many modular-multiplication algorithms cannot be efficiently realized on small systems due to their high RAM consumption. The Montgomery algorithm, which can rapidly perform modular multiplication, has received a lot of attention. Unfortunately, the Montgomery algorithm is difficult to implement, especially in smart cards which have extremely limited RAM space. Furthermore, when the modulus of modular multiplication is frequently changed, or when the number of permissible repeated modular multiplications is small, pre- and post-processing operations such as conversion from/to the Montgomery space become wasteful. The proposed algorithm avoids these problems because it requires only half the RAM space and no pre- and post-processing operations. The algorithm is a radical extension to the approximation methods that use the most significant bits and our newly proposed lookahead determination method. This paper gives a proof of the completeness of this method, describes implementation results using a smart card, introduces a theory supported by the results, and considers the optimal technique to enhance the speed of this method.

This paper describes a perspective on Personal Communicatoins Services (PCS) and technological trends. It takes into consideration rules pertaining to the use of PCS for mobile radio communication and countermeasures to cope with the huge increase in PCS subscribers. In this paper, PCS network structures, inter-regional roaming, microcell structure, radio access and channel access methods are also covered as PCS technologies. Furthermore, trends in domestic and international standards are also described. Although these technologies present many difficulties, we believe that they will be overcome and PCS services will be introduced in the near future.

The objective of this work is to demonstrate a new hierarchical timing analysis technique for multi-phase clocked designs with feedback loops including level sensitive latches. By using this technique, large synchronous designs can be analyzed accurately without loop breaking.

A location registration/paging procedure which is free from location registration area design is proposed. Each base station (BS) broadcasts a "responsibility area", composed of its own and neighboring cells' identification (ID). A mobile station (MS) makes a new location registration request when the current BS's responsibility area does not include the MS's registered location. Each BS is allowed to decide its own responsibility area autonomously based on route information, which is composed of neighboring cells' ID and reported from MSs. Therefore, the responsibility area can be adaptively changed based on MSs' moving characteristics. Moreover, this procedure solves the problems of registration traffic concentration and excess registration request on boundary BSs.

Extended interpolatory approximations are discussed for some classes of n-dimensional stochastic signals expressed as the orthogonal expansions with respect to a given set of orthonormal functions. We assume that the norm of the weighted mutual correlation function of the signal is smaller than a given positive number. The presented approximation has the minimum measure of approximation error among all the linear and nonlinear statistical approximations using the similar measure of error and the same generalized moments of these signals.

The design of N-dimensional (N-D) FIR filters requires in general an enormous computational effort. One of the most successful methods for design and implementation is the McClellan transformation. In this paper a numerically simple technique for determining the coefficients of the transformation is suggested. This appears to be the simplest available method for the design of N-D hyperspherically symmetric FIR filters with excellent symmetry.

The demand for mobile communications is continuing to grow, but there is a limit on the radio frequency resources. Micro cellular systems are a strong solution to this problem. However, Forced Call Termination (FCT) and Channel Changing (CC) occur frequently in these systems because of their small cell size. This paper proposes a new Dynamic Channel Assignment (DCA) strategy which uses information of moving direction of Mobile Stations (MSs) to reduce FCT and CC. This strategy, the MD (Moving Direction) strategy, is compared with other major DCA strategies by simulating a one-dimensional service area covering a road, such as an expressway. The simulation shows that the MD strategy performs better than the other strategies with regard to FCT, CC, and carried load. FCT is an especially important factor in the quality of service. The MD strategy reduces FCT and has the largest carried load of the strategies, which means that it has the most efficient channel usage. This is an attractive characteristic of the MD strategy for micro cellular systems.

The rising demand for mobile communication is increasing the importance of efficient use of limited radio frequency resources. The assignment of radio channels to the cells of current cellular mobile radio systems, specifically, to each base station, has been much studied to increase efficiency in radio frequency use. Dynamic Channel Assignment (DCA) is one approach to this problem. This paper compares the basic characteristics of DCA with Fixed Channel Assignment (FCA) and describes the main DCA strategies. The most important current research topics on DCA are discussed, focusing on micro-cellular systems, which are considered indispensable in meeting the huge demand for future mobile communications.

In mobile communication systems using Dynamic Channel Assignment, channels are possible to be rearranged so that blocking probability can be made low. The smaller the number of cells where channels are rearranged, the smaller the load on the base stations in the cells. Also, we can reduce the deterioration of communication quality caused by reassingning a new channel to a call instead of the channel already assigned. In this paper, we consider not only how to rearrange channels but also which channel should be rearranged and assigned to a new call in rearrangement, and propose very simple but effective methods for rearrangement. The ways to select a candidate channel to be rearranged and assigned to a new call in the new methods make the number of cells where a channel is rearranged smaller. We also examine the relations between characteristics and the number of cells where a channel is rearranged. Using computer simulation results, the properties of the new rearrangement methods are compared with those of the traditional methods.

This paper describes voice communication connection controls in digital public land mobile networks (D-PLMNs). Voice communications in the D-PLMNs are carried at about 10 kbit/s over narrow-band TDMA channels with highly efficient cellular voice encoding schemes. Extensive research is being carried on half-rate voice encoding schemes that will effectively double radio resources. We first outline the configuration of voice communication connection between a cellular phone in the D-PLMN and a telephone in a fixed network, and we describe the optimum position for the CODECs that transform cellular voice codes to the conventional voice codes used in the fixed network, and vice versa. Then we propose a CODEC-bypassed communication control scheme that improves the quality of voice communication between cellular phones. And we propose a cellular voice code negotiation scheme in the D-PLMN which supports different cellular voice encoding schemes. We also propose an efficient channel reassignment scheme for effectively assigning TDMA channels to voice calls with two different bitrates (full-rate and half-rate), and we analyze this scheme's traffic capability. Finally, we describe a dual-tone multiple-frequency (DTMF) signal transmission scheme and estimate the number of DTMF signal senders required in the D-PLMN.

This paper presents a new method for estimating both the parameters of a nonminimum phase system and its unknown input signal. An approximate inverse system method is used to estimate the unknown input signal, and then, by using a Kalman filter, approximately consistent parameter estimates of the nonminimum phase system can be obtained effectively. This method can be used to estimate the parameters of a nonminimum phase system and a minimum phase one in the case when the input signal is a white noise or an impulse sequence.

Under conditions of order reduction, a nonlinear control of a bidirectional coupled-inductor Cuk converter suitable for large-signal applications is presented. The converter is accurately modelled as a second order bilinear system and the conditions established for local stability. The nonlinear control law which is implemented by means of one analog divider, standard operational amplifiers and a pulse-width modulator. As a result, the output variable follows proportionally the reference signal, thus allowing the obtention of different types of power waveforms in the converter output. Experimental results verify the theoretical predictions.

This paper describes a nonstationary spectral analysis method and its application to prognosis and diagnosis of automobiles. An instantaneous frequency spectrum is considered first at a single point of time based on the instantaneous representation of autocorrelation. The spectral distortion is then considered on two-dimensional spectrum, and the filtering is introduced into the instantaneous autocorrelations. By the above procedure, the Instantaneous Covariance method (ICOV), the Instantaneous Maximum Entropy Method (IMEM), and the Wigner method are shown and they are unified. The IMEM is used for the time-dependent spectral estimation of vibration and acoustic sound signals of automobiles. A multi-dimensional (M-D) space is composed based on the variables which are obtained by the IMEM. The M-D space is transformed into a simple two-dimensional (2-D) plane by a projection matrix chosen by the experiments. The proposed method is confirmed useful to analyze nonstationary signals, and it is expected to implement automatic supervising, prognosis and diagnosis for a traffic system.

The self-checking design using 2-rail logic is one of the most popular design of self-shecking circuits. Even for a self-checking circuit, a test is necessary after VLSI chip or system fabrication, at each time the system is powered, and, under certain circumstances, in the case of maintenance. Therefore, an easy test scheme is desirable for that circuit. A new design method for a 2-rail logic combinational circuit is proposed, where stuck-open and sutck-on faults FETs can be easily detected. In the proposed circuit design, 4 FETs are added to each gate in a conventional 2-rail logic circuit. Two logical gates, DOR and DAND, are also added to the circuit as fault observing gates. Each test consists of a sequence of 3 input vectors, that is, a type of 3-pattern test, ti1ti2ti3. A test can be easily generated and fault observation is easy. Stuck-at fault and stuck-open fault on lines and almost all multiple faults can also be detected by the test. A gate construction method, test generation method, circuit construction method, and several discussions including gate delay increasing are presented.

This paper proposes a new adaptive algorithm for acoustic echo cancellers with four times the convergence speed for a speech input, at almost the same computational load, of the normalized LMS (NLMS). This algorithm reflects both the statistics of the variation of a room impulse response and the whitening of the received input signal. This algorithm, called the ESP (exponentially weighted step-size projection) algorithm, uses a different step size for each coefficient of an adaptive transversal filter. These step sizes are time-invariant and weighted proportional to the expected variation of a room impulse response. As a result, the algorithm adjusts coefficients with large errors in large steps, and coefficients with small errors in small steps. The algorithm is based on the fact that the expected variation of a room impulse response becomes progressively smaller along the series by the same exponential ratio as the impulse response energy decay. This algorithm also reflects the whitening of the received input signal, i.e., it removes the correlation between consecutive received input vectors. This process is effective for speech, which has a highly non-white spectrum. A geometric interpretation of the proposed algorithm is derived and the convergence condition is proved. A fast profection algorithm is introduced to reduce the computational complexity and modified for a practical multiple DSP structure so that it requires almost the same computational load, 2L multiply-add operations, as the conventional NLMS. The algorithm is implemented in an acoustic echo canceller constructed with multiple DSP chips, and its fast convergence is demonstrated.

This paper proposes a new adaptive algorithm of the FIR type digital filter for an acoustic echo canceller and similar application fields. Unlike an echo canceller for line, an acoustic echo canceller requires a large number of taps, and it must work appropriately while it is driven by colored input signal. By controlling the filter tap length and updating filter coefficients multiple times during a single sampling interval, the proposed algorithm improves the convergence characteristics of adaptation even if colored input signal is introduced. This algorithm is maned VT-LMS after variable tap length LMS. The results of simulation show the effectiveness of the proposed algorithm not only for white noise but also for colored input signal such as speech. The VT-LMS algorithm has better convergence characteristice with very little extra computational load compared to the conventional algorithm.

Signature analysis using a Multiple-Input LFSR as the output response compaction circuit is widely adopted in actual BIST schemes. While aliasing probabilities for random errors are usually very small, MI-LFSRs are tend to fail detecting diagonal errors. A spot error, which include the diagonal error as a particular case, is defined as multiple bit crrors adjacent in space and in time domain. Then, shuffling of interconnection between CUT output and MI-LFSR input is studied as a scheme to prevent aliasing for such errors. The condition for preventing aliasing due to a predetermined size of single spot error is shown. Block based shuffling and the shortened one are proposed to realize required distance properties. Effect of shuffling for multiple spot errors is examined by simulation showing that shuffling is effective also for a certain extend of multiple spot errors.

A design system for a special purpose processor executing algorithms described by high level language is discussed. The system can generate an optimized architecture for the processor and also supply a specialized high level language compiler for the processor. A new optimization procedure is introduced to find effective functional blocks that can contribute to the improvement of performance. Functional blocks are found by simulation of the frequently appearing patterns of execution in the algorithm and used to yield a useful combined instruction.

In most of the methods proposed so far to design approximately linear phase IIR digital filters (IIR DFs), the design takes place only in the time or in the frequency domain. However, when both magnitude and phase responses are considered, IIR DFs with better frequency responses can be obtained if their characteristics in both domains are taken into account. This paper proposes a design method for approximately linear phase IIR DFs, which is based on parameter estimation techniques in the time domain followed by a nonlinear optimization algorithm in the frequency domain. Several examples are presented, illustrating the proposed method.

Recently, Burch et al. proposed symbolic model checking method to verify sequential machines formally. The method, which is based on logic function manipulation using binary decision diagram, can handle large sequential machines that cannot be handled by the conventional techniques. The expressive power of Computational Tree Logic (CTL), which was used by Burch et al., is not very powerful, for example, CTL cannot describe repetition of events. This papers shows an extension of the symbolic model checking algorithm to Branching time regular temporal logic (BRTL), which has been proposed by the authors as an improvement of CTL in terms of expressive power. The implemented verifier based on the proposed algorithm could verify behaviors of a microprocessor composed of approximately 1,600 gates and 68 flipflops.