A packed SIMD type operation or a SIMD operation is n-parallel b/n-bit sub-operations executed by the modified n-bit functional unit. Such a functional unit is called a SIMD functional unit and a processor core which can execute SIMD operations is called a SIMD processor core. SIMD operations can be effectively applied to image processing applications. This paper focuses on hardware/software cosynthesis of SIMD processor cores and particularly proposes a new simulator generator which simulates pipelined instructions for a SIMD processor. Generally, a SIMD functional unit has many options and then we can have so many different SIMD functional unit instances. However, since our hardware/software cosynthesis system synthesizes a special-purpose processor core for an input application program, it uses very limited SIMD functional unit instances. In the proposed approach, we consider a SIMD operation to be a set of SIMD sub-operations. By adding up the appropriate SIMD sub-operations, we construct a single SIMD operation. Then a SIMD functional unit behavior can be characterized by a collection of SIMD operations. This approach has the advantage that: if we have a small number of behavior libraries for SIMD sub-operations, we can instantiate a particular SIMD functional unit behavior. Experimental results demonstrate the effectiveness of the proposed approach.

The deployment of server replicas of a service across an asynchronous distributed system (e.g., Internet) is a real practical challenge. This target cannot be indeed achieved by classical software replication techniques (e.g., passive and active replication) as these techniques usually rely on group communication toolkits that require server replicas to run over a partially synchronous distributed system to solve the underlying agreement problem. This paper proposes a three-tier architecture for software replication that encapsulates the need of partial synchrony in a specific software component of a mid-tier to free replicas and clients from the need of underlying partial synchrony assumptions. Then we propose how to specialize the mid-tier in order to manage active replication of server replicas.

This paper presents the results of a continuing research work on the practical characterization of operating systems (OS) behavior in the presence of software faults in OS components, such as faulty device drivers. The methodology used is based on the emulation of software faults in device drivers and observation of the behavior of the overall system regarding a comprehensive set of failure modes, analyzed according to different dimensions related to multiple user perspectives. The emulation of the software faults is done through the injection of specific mutations at machine-code level that reproduce the code generated by compilers when typical programming errors occur in the high level language code. Two important aspects of this methodology are the independence of source code availability and the use of simple and established practices to evaluate operating systems failure modes, thus allowing its use as a dependability benchmarking technique. The generalization of the methodology to any software system built of discrete and identifiable components is also discussed.

This paper proposes a new algorithm to control an adaptive duplexer for multiband software radio. It uses a wideband low isolation device combined with a two-tap/two-loop adjustable canceller to eliminate the need for multiple switched high isolation duplexers. The taps are adjusted to provide isolation peaks in the transmit and receive bands. The algorithm is based on the superposition of squared errors and achieved 66 dB isolation of the transmit signal and a 37 dB cancellation of the transmitter noise in the receiver band.

A new spectrum management architecture for a flexible software defined radio (SDR) is proposed. In this architecture, the SDR hardware and software are certified separately so as not to destroy the SDR flexibility, but to ensure that any combinations of hardware and software are compliant to the radio regulations even at the system (vertical) handover, global (horizontal) handover, and upgrade (forward) or downgrade (backward) handover. This architecture is based on automatic calibration & certification unit (ACU), built-in GPS receiver, and radio security module (RSM). The ACU is a hardware embedded RF manager that dynamically controls the output power spectrum to be compliant to the local radio regulation parameters. This local radio regulation parameters are securely downloaded to the hardware as an electronic label of the SDR software and stored in the RSM which is a security manager of the hardware. The GPS position check is used, especially during roaming, to keep the compliancy of the terminal to each local radio regulations managed by the geographical region. The principle parties involved in this architecture are telecommunication certification body (TCB), SDR hardware maker (HW maker), SDR software maker (SW maker), and SDR user. The roles and relationships of these four parties in the proposed architecture are clarified in this paper.

This letter proposes a new hardware/software partitioning algorithm for processor cores with SIMD instructions. Given a compiled assembly code including SIMD instructions and a timing constraint, the proposed algorithm synthesizes an area-optimized processor core with a new assembly code. Firstly, we assume for each operation type a super SIMD functional unit which can execute all the SIMD instructions. Secondly we reduce a SIMD instruction or "sub-function" of each super functional unit, one by one, while the timing constraint is satisfied. At the same time, we update the assembly code so that it can run on the new processor configuration. By repeating this process, we finally find SIMD functional unit configuration as well as a processor core architecture. The promising experimental results are also shown.

Interest in the regulatory issues for Software Defined Radio (SDR) is spreading worldwide since the Federal Communications Commission (FCC) recently recognized SDR and created a new category for SDR authorization. SDR technology will bring enormous benefits to the field of wireless services. However, in order to ensure such benefits, revisions of the radio law and/or related ordinances are required regardless of standardization of the software downloading and other implementation details. In order to define the issues peculiar to SDR and to investigate how conformity evaluation should be conducted for radio equipments whose RF characteristics can be altered by software changes in the field, "Study Group on Software Technology for Radio Equipment" was organized by the Telecom Engineering Center (TELEC) in 2000. This paper summarizes a report of the Study Group that was published in March 2003 including the proposal for "Technical regulation conformity evaluation system," the principal output of the study, which proposes how to prevent unauthorized changes to radio equipment in the field.

A flexible symbol-timing synchronization met-hod is a one that uses a common sampling clock to find synchronization points for radio communication systems that have different symbol rates. This method estimates synchronization points from state patterns calculated using the symbol rate, sampling clock, and number of observed symbols. Decreasing the number of state patterns is one of best ways to reduce the amount of device resources needed to store the patterns. In this paper, we propose a new pattern generation method in which the number of generated patterns does not increase when the sampling clocks of the communications systems are different. To show the feasibility of this method for symbol-timing synchronization, we analyzed a relationship between the number of samples and the number of state patterns and calculated the BER (bit error rate) in AWGN (additive white Gaussian noise) and one-path flat Rayleigh fading environments by computer simulation.

The Communications Research Laboratory (CRL) started a new project named the New Generation Mobile Network Project in April 2002. The target of this project is the development of new technologies to enable seamless and secure integration of various wireless access networks such as 3rd and 4th generation cellular, wireless LAN, high-speed mobile wireless, wired communications, and broadcasting networks. This paper presents an overview of CRL's new generation mobile communication system that is called The Multimedia Integrated Network by Radio Access Innovation Plus (MIRAI+), as well as details the role of Software Radio Technology (SDR) in MIRAI+.

Software Radio has been proposed in the 1990s as the solution to flexible transceiver design for future wireless systems. Potential advantages and drawbacks of this approach have been described and analysed in verbose format in many articles. However, a mathematical perspective of the software radio design problem is to be found in the literature only once. Despite this attempt to develop a sound formal description the conclusions do not reach beyond algorithm design. Open issues in system design are often mentioned, but remain unresolved hitherto. We develop a novel mathematical perspective of software radio, and we formulate the design problem accordingly, by means of an integer linear programming (ILP) representation. This type of problem is well-known in computer science and operations research, but it has never been linked to software radio design before. In a first approach to solve the ILP problem we reduce it to a scheduling problem with processor constraints. In the remainder of the theoretical section we introduce the notions of granularity G and speedup s to assess the quality of modular implementations. A random runtime argument leads the way to a system-theoretic approach to modular design issues such as maximizing speedup over a great number of different implementations. For the special case G = 1 we deduce the speedup potential of a primitive graph in analytical form. In the experimental section we compare simulation results to our theory, and we extend the experiments to a more complicated graph which stems from a real software radio design project. The paper concludes with a discussion and a brief outlook to future research issues.

In relation to the Software Defined Radio (SDR) concept, an experimental simulation system was developed. Likewise, verification tests were performed in order to validate the envisaged SDR certification processes including its development, certification, distribution, and software installation assuming the future possibility of exchanging the software in the field.

The software-defined radio technique translates the traditional hardware radio platform to a flexible software radio platform that can support multiple air interface standards. This work proposes an efficient IF processing architecture based on software-defined radio for 2G GSM/IS-95 and 3G W-CDMA systems. Hardware complexity is estimated by fixed-point simulation. IF processing architecture should be highly flexible and minimally complex. Firstly, a carrier channel is selected from a wide frequency band using a high-resolution numerically controlled oscillator (NCO). Wide-range interpolation/decimation is performed by the cascaded integrator comb (CIC) filter that involves no multiplier nor stores filter coefficients. Both the desired narrowband and the desired wideband signals can be extracted. The look-up table (LUT), based on the distributed arithmetic (DA) algorithm is used to implement the finite impulse response (FIR) filter. Therefore, a small area and high speed can be achieved. The errors caused by truncation, quantization, rounding-off and overflow are predicted using a fixed-point simulation. These predictions will help to evaluate the word-length for VLSI implementation. Finally, ALTERA APEX20KE is used as a target device. One hundred thousand gates are used for the implementation. Thus, the proposed architecture has high processing flexibility and small area.

This paper outlines the perspectives on Software Defined Radio (SDR) technology in viewpoint of the standardization of the future mobile communication systems. The activities of ITU-R SG8 Working Party 8F (WP8F) and mITF (mobile IT Forum) of Japan for systems beyond IMT-2000 (B3G) or 4-th generation mobile systems are firstly summarized. The latest discussions relating to SDR technology in the both parties are reported. It is followed by consideration on both expectations and technical issues on SDR in order to realize the technology in the future mobile communication systems. They are clarified in the viewpoint of standardization activity on B3G. Also some regulation issues are lastly summarized.

We have proposed two types of software download methods for software radio (SR) based intelligent transport systems (ITS): (1) broadcasting-type software download method and (2) communication-type software download method. In this paper, we study their feasibility of their employment in a newly developed prototype. We give tangible examples of method (1) using the vehicle information and communication system (VICS) and method (2) using the dedicated short range communication (DSRC) system. We describe the download formats and procedures for both methods and use the experimental prototype to evaluate the basic software download time and configuration time. Moreover we also propose architecture of SR-based multimode terminal that can reduce download time and utilize over-the-air software download services by VICS and DSRC links.

This paper presents a framework for building mobile agent-based components. The framework introduces the notion of agent hierarchy and inter-agent migration and thus allows a group of mobile agents to be dynamically assembled into a single mobile agent. It provides a powerful method of constructing complex, large-scale mobile agent-based applications. To demonstrate how to exploit our framework, we construct an extensible and portable mobile agent system for executing and migrating hierarchical mobile agents. The system itself is also implemented as a collection of mobile agents and can thus dynamically change and adapt its functions through migrating agents that offer the functions. Mobile agent-based applications running on the system can naturally inherit the extensibility and adaptability of the system.

Software rejuvenation is a proactive fault management technique that has been extensively studied in the recent literature. In this paper, we focus on an example for a telecommunication billing application considered in Huang et al. (1995) and develop the discrete-time stochastic models to estimate the optimal software rejuvenation schedule. More precisely, two software availability models with rejuvenation are formulated via the discrete semi-Markov processes, and the optimal software rejuvenation schedules which maximize the steady-state availabilities are derived analytically. Further, we develop statistically non-parametric algorithms to estimate the optimal software rejuvenation schedules, provided that the complete sample data of failure times are given. Then, a new statistical device, called the discrete total time on test statistics, is introduced. Finally, we examine asymptotic properties for the statistical estimation algorithms proposed in this paper through a simulation experiment.

We developed a SPARC-V9 processor, the SPARC64 V. It has an operating frequency of 1.35 GHz and contains 191 million transistors fabricated using 0.13-µm CMOS technology with eight-layer copper metallization. SPECjbb2000 (CPU# 32) is 492683, highest on the market and 42% higher than the next highest system. SPEC CPU2000 performance is 858 for SPECint and 1228 for SPECfp. The processor is designed to provide the high system performance and high reliability required of enterprise server systems. It is also designed to address the performance requirements of high-performance computing. During our development of several generations of mainframe processors, we conducted many related experiments, and obtained enterprise server system (EPS) development skills, an understanding of EPS workload characteristics, and technology that provides high reliability, availability, and serviceability. We used those as bases of the new processor development. The approach quite effectively moves beyond differences between mainframe and SPARC systems. At the beginning of development and before the start of hardware design, we developed a software performance simulator so we could understand the performance impacts of created specifications, thereby enabling us to make appropriate decisions about hardware design. We took this approach to solve performance problems before tape-out and avoid spending additional time on design update and physical machine reconstruction. We were successful, completing the high-performance processor development on schedule and in a short time. This paper describes the SPARC64 V microprocessor and performance analyses for development of its design.

At the initial stage of developing parallel machines, a software monitor, which manages communication between host computers, program loading and debugging, is necessary. However, it is often a cumbersome job to develop such a monitoring system especially when the target takes a parallel architecture. To solve this problem, we developed an integrated monitor system called "Pot". "Pot" consists of a system runs on the host computer and simple code on a target machine. In order to reduce the development costs, the program on a target machine is as simple as possible while "Pot" on the host computer itself provides various functions for system development.

The software rejuvenation is a proactive fault management technique for operational software systems which age due to the error conditions that accrue with time and/or load, and is important for high assurance systems design. In this paper, fine-grained shock models are developed to determine the optimal rejuvenation policies which maximize the system availability. We introduce three kinds of rejuvenation schemes and calculate the optimal software rejuvenation schedules maximizing the system availability for respective schemes. The stochastic models with three rejuvenation policies are extentions of Bobbio et al. (1998, 2001) and represent the failure phenomenon due to the exhaustion of the software resources caused by the memory leak, the fragmentation, etc. Numerical examples are devoted to compare three control schemes quantitatively.

Software and its systems are more complicated than a decade ago, and the systems are used for mission critical business, flight control and so on which often require high assurance systems. In this circumstance, we often use black-box testing. The question now arises that black-box testing does not generate numerical value of testing result but empirical. Thus, in this research, we develop and enhance FSM (Finite State Machine) testing method which can produce code coverage rate as numerical value. Our developed FSM testing by code coverage focuses on not only software system behavior but also data. We found higher code coverage rate, which indicates quality of system, by this method than existing black box testing method.