A Time-Division Multiplexed (TDM) Hierarchical Switching System (HSS), proposed by Eng and Acampora [5], provides any size of bandwidth for a number of subscribers by allocating proper number of time-slots in a frame. In this paper, we present a binary time-slot assignment (TSA) algorithm by which a proper size of time-slots in the frame are allocated to each subscriber so as to meet its bandwidth requests. The time complexity of the proposed algorithm is O(NLlog2 L) in which N is the number of input/output links of the central switch and L is the number of time-slots allotted to each link in the frame. As the authors know, the most efficient algorithm proposed in the literature has time complexity of O(min(L, M2)min(N, M)M2), in which M is the number of subscribers that is larger than N in TDM/HSS system. To give a clear idea of relative efficiency between two algorithms, let us give a typical situation of M = L = O(N2). In this configuration our algorithm makes a significant improvement in time complexity by the order of O(M2/log2M).

A current ATM exchanger consists of ATM switch and ATM interface card is implemented with many LSIs. An investigation of an architecture of the ATM interface card is, therefore, important to decides ATM exchanger's functions and its flexibility. In this paper, we propose an architecture of the ATM interface card to contribute to improving the flexibility and reducing the cost for an ATM exchanger. The key feature of the proposed architecture is both physical layer and ATM layer functions at an interface point are executed by a general-purpose microprocessor and FIFOs. A realization of such architecture is discussed, especially, a software configuration of it is proposed because the physical layer functions have to be executed periodically and should not be interrupted. We developed an evaluation breadboard for such periodic software execution and evaluated the proposed ATM interface card architecture. The evaluation results indicate that a 50 MHz R3000 microprocessor and 5 MHz access speed FIFOs can realize the 6.3-Mbps cell relay interface card.

The quality of a modular software system depends on the reliabilities of the software modules and the software operational profile. When the software is designed for multiple customers having different operational profiles, different customers may experience different software quality. It is important to ensure that no customer will suffer from a poor software quality. In this paper, we formulate and solve three reliability allocation problems for modular software system designed for multiple customers. In these reliability allocation problems, we consider the software operational profile of every customer while fulfilling such practical constraints as cost budget and software quality requirement. The numerical results show that when the operational profiles of the customers are more skewed, it is more beneficial to take their operational profiles into account.

This paper proposes a method for deriving protocol specifications in a communicating processes model, in which protocol specifications are modeled by finite automata communicating through the LOTOS multirendezvous mechanism. Message sequence charts (MSCs) are used for the derivation inputs. MSCs are graphical representations of traces of protocols and are suitable for defining requirements. Since an MSC usually covers only partial behavior, several mechanisms for composing a large number of MSCs from element MSCs have been proposed. These mechanisms, however, are not adequate: Either their input language for MSCs is not powerful enough, or they need some information on protocol specifications (i.e., implementation specifications). This paper proposes the use of regular expressions over MSCs to fully define protocols. The proposed language is powerful enough to describe protocols in the communicating processes model. A derivation algorithm based on a finite automata construction algorithm that accept sets expressed by regular expressions is presented. Because the derived protocols sometimes include unrequired behavior, an algorithm for detecting unrequired behavior is also presented.

In forthcoming multimedia environments, continuous-media data, such as video and audio data, will be used by a variety of multimedia applications. Multimedia applications require efficient and flexible support from real-time operating systems. This is because the changes in system and network loads require dynamic management of real-time thread behavior. If threads are implemented at the user level, operations on threads can be processed at the user level, and the efficient management of threads becomes possible by avoiding kernel interventions. Thus, we can provide an effective platform for multimedia applications. The goal of our work is to realize high-performance user-level real-time threads which satisfy the above requirements of multimedia systems. In this paper we describe the design and implementation of a user-level real-time threads package, called RTC-Threads, which is being developed on the RT-Mach microkernel. The results of performance evaluations show that our user-level real-time threads outperform real-time kernel-provided threads, which are implemented in the microkernel, in terms of efficiency and accuracy.

Because the match phase in OPS5-type production systems requires most of the system's execution time and memory accesses, we proposed hash-based parallel production systems, CPPS (Clustered Parallel Production Systems), based on the RETE algorithm for distributed memory parallel computers, or multicomputers to reduce such a bottleneck. CPPS was effective in speeding up the match phase, but still left room for optimizations. In this paper, we introduce software cache techniques to memory nodes in the CPPS as one of the optimizations, and implement it on a multicomputer, nCUBE2. The benchmark results show that the CPPS with the software cache is about 2-fold faster than the original, and more than 7-fold faster than the simple hash method proposed by Acharya et al. for a large scale problem. The speed-up can be attributed to decreased communication costs.

In this paper, we propose a timing constrained database system which accesses a database at a host computer via a mobile support server with a wireless portable computer running in mobile computing environments, so that we can provide seamless database access between a communication cell and the host computer even if the user of the portable computer moves from one communication cell to another. Then, we also provide some new kind of database cache algorihm, such as all-cell-cache, neighbour-cell-cache, 1-cell-skip-cache, 2-cell-skip-cache and 3-cell-skip-cache methods, each of which manages the data downloading and uploading among the host database and some cell databases at the mobile support servers so as to minimize the database access fault probability when the user moves from one communication cell to another. And, we show the averaged database access time and the averaged database cache hit ratio which are computed by simulating each of the above database cache algorithms with random variables generation method. Finally, we conclude that each above cache alogorithm is advantageous to the database in mobile computineg einvironments.

This paper discusses how to derive message sequence charts (MSCs) from a set of state transition descriptions. Recently, MSC notation has received much attention in the communications software field because it graphically shows system global behavior, So MSC handling techniques are being widely studied. These studies have recommended the design a system by a set of formal MSCs in the early stages of development and then to convert them into state transition descriptions. However, it is difficult to apply those results to existing communications software products. This is because these systems are designed based on state transition descriptions and there are no formal MSCs for them. In this paper, we propose a method of deriving MSCs based on optimized reachability analysis. This method generates MCSs that avoid state explosion. A case study using Q.931 protocol shows the feasibility of this method.

This paper discusses a software verification support environment Vega which is based on a model-theoretic methodology that enables verification support for the temporal properties of protocol specifications described in the formal description technique LOTOS. In the methodology of Vega, a protocol specification is defined through the LOTOS process reflecting its practical system structure. The temporal properties to be verified are given as the requirement which the protocol needs to satisfy from the viewpoint of events and are formulated by using the branching time temporal logic defined in this paper. Verification is done by determining whether or not the given temporal properties are satisfied by the model, which corresponds to the transition system derived from the LOTOS specification of the protocol. Vega is provided with an effective interface function, as well as the function of simple model checking based on the above methodology, to give some degree of flexibility for the expression of temporal properties to be verified. Specifically, it allows the user to define useful expressions by combining builtin temporal logic formulas and enter them in Vega for use at any time. With the provision of these functions, Vega is expected to serve as a very powerful and flexible verification support tool.

In the program development process, it is ofren necessary for programmers to know the differences between two programs, or two different versions of a program. Since programs have structures such as iteration statement and selection statement, applying text-based tools such as UNIX diff to identify the differences may produce unsatisfactory results. In this paper, we exploit a tree as the internal representation of a program, obtain the mapping between two trees and display the program differences visually based on the mapping and pretty-printing technique so that the structural differences can be identified immediately.

There are three viewpoints involved in software project management: process management, quality management and cost management. Software projects must be managed on the basis of these three viewpoints. However, in many cases process management, quality management and cost management systems are built separately as individual systems respectively. Construction of software project management systems which these three functions are integrated has been rare. Therefore, in order to construct a system integrating these functions, the authors clarify the significance of integration of application systems. And then the authors unveil the structure of a software project management system that process management system, quality management system and cost management system are integrated by using an object oriented database.

This paper describes, from a system architectural viewpoint, how knowledge-based technologies have been utilized in developing EXLOG (an LSI circuit synthesis system) and SOFTEX (a software synthesis system) inside the authors' projects. Although the system architectures for EXLOG and SOFTEX started from the same production systems, consisting of transformation rules in the middle of the 1980's, both branched off in different directions in the 1990's. Based on experiences with EXLOG and SOFTEX, the differences between LSI and software design models are discussed, and the future directions are indicated for the knowledge-based design system architectures.

Information systems to support cooperative work among people should be first designed to help humam communication. However, there are few systems based on the analysis of human communication. Standing on this situation, we propose a meeting support system for the participants' understandings by indicating the suitable information about the topic of the scene". Our system provides only useful information by monitoring each statement without complex methods. To show something useful multi-media information for members, we propose the following structure of the meeting on the basis of the analysis of communication. Each statement is classified into two levels, either; a statement about the progress" of the meeting (context-level utterances) or, a statement about objects" (content-level utterances). Further, content-level utterances are classified into two types, position utterances and argument utterances. Using this classification of statements, the proceeding of the meeting is represented as the tree model which is called a context-tree". If the structure of meetings is fixed, it is possible to select only useful information from all shared information for members by analyzing each content-level utterance. The system introduced in this paper shows appropriate multi-media information about the topic of the scene" by using the above model. We have implemented a prototype system based on the above ideas. Moreover, we have mode some experiments to show the effectiveness of this system. Those results show that our method is effective to improve the productivity" of meetings.

One approach to develop software efficiently is to reuse existing software by modifying a part of it. However, modifying software will often introduce unexpected side effects into other parts of it. As a result, it costs much time and care to modify the software. So, in order to modify software efficiently, we have proposed a functional model to represent information about side effects caused by modification and a model based supporting system for modifying software. So far, however, an expert software developer must describe the entire functional model of the target software through the analysis of practical modifying processes. This will be an unnecessary burden on him. Moreover, the larger target software becomes, the harder the model construction becomes. Therefore, an automatic constructing method of the functional model is needed in order to solve this problem. So, this paper considers a method of acquiring useful interaction information by learning from training examples of modification. However, in our application domain, it seems that it is impossible to make complete domain theory and to prepare a large number or training examples in advance. Therefore, our learning method involves an integration of explanation-based learning (EBL) from positive examples of modification generated by the user and Similarity-based learning (SBL) from positive or negative examples generated by the user and the learning system. As a result, our method can acquire valid knowledge about the interaction from not so many examples under incomplete theory. Then, this paper presents a constructing method, in which our proposed learning method is incorporated, of a functional model. Finally, this paper demonstrates construction of the functional model in the domain of an event-driven queueing simulation program according to our learning method.

Data flow is a paradigm for concurrent computations in which a collection of parallel processes communicate asynchronously. For nondeterministic data flow networks many semantic models have been defined, however, it is complex to reason about the semantics of a network. In this paper, we introduce a transformation between data flow networks and the LOTOS specification language to make available theories and tools developed for process algebras for the semantic analysis based on traces of the networks. The transformation does not establish a one-to-one mapping between the traces of a data flow network and the LOTOS specification, but maps each network in a specification which usually contains more traces. The obtained system specification has the same set of traces as the corresponding network if they are finite, otherwise also non fair traces are included. Formal analysis and verification methods can still be applied to prove properties of the original data flow network, allowing in case of networks with finite traces to prove also network equivalence.

Conformance testing techniques are required for the efficient production of reliable communication protocols. A lot of conformance testing techniques have been developed. However, most of them can only decide whether an implemented protocol conforms to its specification. That is, the exact locations of faults are not determined by them. This paper presents some conditions that enable to find locations of multiple faults, and then proposes a test sequence generation technique under such conditions. The correctness proof and complexity analysis of the proposed technique are also given. The characteristics of this technique are to generate test sequences based on protocol specifications and interim test results, and to find locations of multiple faults in protocol implementations. Although the length of the test sequence generated by the proposed technique is a little longer than the one generated by the previous one, the class to which the proposed technique can be applied is larger than that to which the previous one can be applied.

We develop a software availability model incorporating software failure-occurrence and fault-correction times, under the assumption that the hazard rate for software failure-occurrence decreases geometrically with the progress in fault-removal process. Considering that the software system alternates two states, i.e. the operational state that a system is operating and the maintenance state that a system is inoperable due to the fault-correction activity, we model the time-dependent behavior of the system with a Markov process. Expressions for several quantities of software system perfomance are derived from this model. Finally, numerical examples are presented for illustration of software availability measurement.

In this paper, it is stated that visualization and abstraction of program specifications can be highly integrated on the basis of decision tables and condition expressions. In order to demonstrate this idea, we developed an automatic programming system called SPACE: SPecification Acquisition and Compiling Engine. SPACE is designed to ease the production of business data processing program. SPACE has functions both to support the creation of visual program specifications and to generate COBOL programs according to the input program specifications. To visualize program specification, SPACE design windows are comprised of two diagrams and four tables in a format similar to the conventional detailed design sheets. To represent module functions, in particular, a visualized computation model called a decision table is used. All the possible execution states of a module are represented by combining the state function called condition expressions. The condition expressions represent the typical file processing patterns in very familiar form to actual business application designer. They do not simply give function values; each of them carries out implicit attached procedures according to the characteristic I/O control logic for business data processing. Hence users can describe program specifications concisely by designating merely the condition expression instead of the detailed I/O control logic. This paper uses sample descriptions of stock control problems to explain how visualization of computation and abstraction of algorithm can be integrated and formalized on a basis of a decision table and a condition expression. Also the paper describes how to generate programs from visual specifications.

This paper describes the design of the reflective concurrent object-oriented specification language RMondel. RMondel is designed for the specification and modeling of distributed systems. It allows the development of executable specifications which may be modified dynamically. Reflection in RMondel is supported by two fundamental features that are: Structural Reflection (SR) and Behavioral Reflection (BR). Reflection is the capability to monitor and modify dynamically the structure and the behavior of the system. We show how the features of the language are enhanced using specific meta-operations and meta-objects, to allow for the dynamic modification of types (classes) and instances using the same language. RMondel specification can be modified by adding or modifying types and instances to get a new adapted specification. Consistency is checked dynamically at the type level as well as at the specification level. At the type level, structural and behavioral constrations are defined to preserve the conformance of types. At the specification level, a transaction mechanism and a locking protocol are defined to ensure the consistency of the whole specification.

It has become more important to reduce the protocol implementation costs as the functions of protocols have become more abundant. The protocol implementation tools which automatically generate a protocol program from a specification described by an FDT (Formal Description Technique) are very promising. Selecting SDL as a target FDT, we have developed an SDL-based protocol implementation tool which consists of a process scheduler and a compiler. Since the efficient SDL process execution is a key to generating the high-speed program, the scheduler is introduced. It provides the mechanism which executes SDL processes concurrently as light-weight-processes. It optimizes so that as few context switches take places as possible. The compiler converts as many kinds of SDL functions whose behaviors can be determined at compile time into programming language statements as possible. These elaborations are so successful that the tool can generate an efficient program. The OSI Transport protocol class 0 program generated by the compiler can process more than 500 packets per second on a 6MIPS workstation.