The software rejuvenation is a proactive fault management technique for operational software systems which age due to the error conditions that accrue with time and/or load, and is important for high assurance systems design. In this paper, fine-grained shock models are developed to determine the optimal rejuvenation policies which maximize the system availability. We introduce three kinds of rejuvenation schemes and calculate the optimal software rejuvenation schedules maximizing the system availability for respective schemes. The stochastic models with three rejuvenation policies are extentions of Bobbio et al. (1998, 2001) and represent the failure phenomenon due to the exhaustion of the software resources caused by the memory leak, the fragmentation, etc. Numerical examples are devoted to compare three control schemes quantitatively.

We present a new approach to the loop scheduling problem, which excels previous solutions in two important aspects: The resource constraints are formulated using flow graphs, and the initiation interval λ is treated as a rational variable. The approach supports heterogeneous processor architectures and pipelined functional units, and the Integer Linear Programming implementation produces an optimum loop schedule, whereby a minimum λ is achieved. Our flow graph model facilitates the cyclic binding of loop operations to functional units. Compared to previous research results, the solution can provide faster loop schedules and a significant reduction of the problem complexity and solution time.

Adaptive arrays have been recognized as an attractive mean for overcoming multipath fading and interference rejection in the field of mobile communications. In, an adaptive array applicable to single-user spread spectrum (SS) systems has been proposed. In this system, any a priori information concerning incoming signal, even the spreading code and synchronization, is not necessary while it achieves equalizing, beamforming and despreading of a received signal, simultaneously. In this paper, we propose a multistage blind adaptive array antenna based on the above-mentioned adaptive algorithm in order to realize blind signal processing that is applicable to multi-user SS systems. Behavior and performance of the proposed multistage system are examined through computer simulations.

This paper considers a transaction-based multi-server system with rejuvenation, and derive the optimal software rejuvenation policies under some system dependability measures; the steady-state availability, the probability of transaction loss and the upper bound of mean response time on transactions. We compare the system configuration based on a single-server with that based on a multi-server in terms of the software rejuvenation scheme. In numerical examples, we calculate the optimal software rejuvenation timing and its associated dependability measure, and refer to the effect of preventive maintenance in the transaction-based multi-server software systems.

We can easily access a remote database as well as a local database with HTML forms. Although implementing a database application with HTML forms is much simpler than implementing it with a proprietary graphical user-interface system, HTML forms and CGI programs still must be coded. We implemented a software tool that automatically generates the SQL statements that create a database for an application, the forms that are used as a user interface, and the Java servlets that retrieve the data requested through the forms. The database tables to be created and the forms to be generated are determined by the class diagram for the application. Our software tool, which we call WebSiteGen, thus simplifies the implementation of a Web-based database application.

Content addressable memory (CAM) is one of the functional memories which realize word-parallel equivalence search. Since a CAM unit is generally used in a particular application program, we consider that appropriate design for CAM units is required depending on the requirements for the application program. This paper proposes a hardware/software cosynthesis system for CAM processors. The input of the system is an application program written in C including CAM functions and a constraint for execution time (or CAM processor area). Its output is hardware descriptions of a synthesized processor and a binary code executed on it. Based on the branch-and-bound method, the system determines which CAM function is realized by a hardware and which CAM function is realized by a software with meeting the given timing constraint (or area constraint) and minimizing the CAM processor area (or execution time of the application program). We expect that we can realize optimal CAM processor design for an application program. Experimental results for several application programs show that we can obtain a CAM processor whose area is minimum with meeting the given timing constraint.

This paper presents the design considerations for a digital dental X-ray system with a commercial CCD sensor. Especially the system should be able to work with several X-ray machines even with them for the classical film. The hardware-software co-design methodology is employed to optimize the system. The full digital implementation is assumed for the reliability of the system. The considered functions cover the pre-processing such as the exposure detection, clamping and the dark level correction and the post-processing such as gray level compensation. It is analyzed with some other constraints in order to make the final partition. The entire system based on the partition will be described.

This paper presents a model called PECM (process environment coordination model) to coordinate heterogeneous PSEEs. A PSEE coordinated by PECM is associated with a standard-interfaced PECM coordinator, which provides primitive coordination functions. PECM uses shared product status to coordinate PSEEs. It is expected to offer several features. First, multiple PSEEs can be used in the same project. Second, PECM manages products and product relationships across PSEEs. Third, PECM coordinator is standard- interfaced, which is easy to use.

Software obfuscation is a promising approach to protect intellectual property rights and secret information of software in untrusted environments. Unfortunately previous software obfuscation techniques share a major drawback that they do not have a theoretical basis and thus it is unclear how effective they are. Therefore we propose new software obfuscation techniques in this paper. The techniques are based on the difficulty of interprocedural analysis of software programs. The essence of our obfuscation techniques is a new complexity problem to precisely determine the address a function pointer points to in the presence of arrays of function pointers. We show that the problem is NP-hard and the fact provides a theoretical basis for our obfuscation techniques. Furthermore, we have already implemented a prototype tool that obfuscates C programs according to our proposed techniques and in this paper we describe the implementation and discuss the experiments results.

In this paper, we newly developed a small-size software radio terminal that can realize global positioning service (GPS) navigation system, vehicle information and communication system (VICS), electronic toll collection system (ETC), AM/FM radio broadcasting services on middle wave (MW) and very high frequency (VHF) bands, FM multiplex broadcasting system, and several modulation schemes such as BPSK, ASK, QPSK, GMSK, and π/4QPSK by downloading software to realize each system from wired and wireless networks. The developed terminal realizes simultaneous multiple services when users would like to use several radio communication services in the driving situation by using our proposed multitask algorithm. The developed terminal has a size of 17.5 cm wide, 19.0 cm deep, and 5 cm high and worked at DC-12.0 V and around 2 A. The size and electrical power consumption are quite small and low and acceptable for consumers such as car drivers. In this paper, we introduce the configuration and proposed key technologies in our developed terminal and measure the software configuration time.

In this paper, we consider the similar software cost models with periodic rejuvenation to Garg, Puliafito, Telek and Trivedi (1995) under the cost effectiveness criteria. First, an alternative model as well as the original one are analyzed by Markov regenerative processes. We derive analytically the optimal periodic software rejuvenation policies which maximize the cost-effectiveness in the steady state for two models. Further, we develop statistical non-parametric algorithms to estimate the optimal software rejuvenation policies, provided that the sample data to characterize the system failure times are given. Then, the total time on test (TTT) concept is used. In numerical examples, we compare the periodic software rejuvenation policy with the non-periodic one, and investigate the asymptotic properties of the non-parametric estimators for the optimal software rejuvenation policies through a simulation experiment.

This paper presents a case study of synthesis of the industrial embedded microcontroller HT48100 and analysis of performance, cost and software compatibility for its implementation alternatives, using the hardware/software co-design system for microcontrollers/microprocessors PIPER-II. The synthesis tool accepts as input the instruction set architecture (behavioral) specification, and produces as outputs the pipelined RTL designs with their simulators, and the reordering constraints which guide the compiler backend to optimize the code for the synthesized designs. A compiler backend is provided to optimize the application software according to the reordering constraints. The study shows that the co-design approach was able to help the original design team to analyze the architectural properties, identify inefficient architecture features, and explore possible architectural improvements and their impacts in both hardware and software. Feasible future upgrades for the microcontroller family have been identified by the study.

This paper discusses a design methodology suitable for the development of software defined radio platforms. A flexible digital receiver was designed and implemented using a multi-port direct converter and an FPGA-based platform. The design starts with a hardware-oriented top-level system model. The model is built based on basic signal processing blocks connected together in a graphical tool. Carrier symbol timing recovery is implemented in the discrete-time (digital) domain with an interpolator-based synchronizer. Carrier phase and frequency are recovered using a feedback synchronization algorithm (a second-order type-II digital PLL). Experimental results of the platform and its simulation results demonstrate the effectiveness of the proposed design methodology.

Software Defined Radio is beyond the education and initiation phase. The industry is addressing the needs of reconfigurable radio technology development, implementation, and application in a variety of marketplaces. Regulatory decisions are being formulated to facilitate SDR adoption and deployment. Continued dialog and cooperation among the industry organizations is an important factor in the rate of progress.

This paper proposes and investigates a coding and decoding scheme to achieve adaptive channel coding using a Finite State Machine (FSM) for Software Defined Radio (SDR). Adaptive channel coding and decoding systems that can switch between different coding rates and error correcting capabilities in order to adapt to changing applications and environments, are effective for SDR. However, in these systems, a receiver cannot always select the correct decoder which causes decoding errors, usually referred to as Decoder-Selection-Errors (DSE). We propose a trellis encoder estimation scheme that compensates for this problem. This scheme uses the circuit of FSM to limit the encoder transition and the Viterbi algorithm for maximum likelihood trellis encoder estimation. Computer simulations are applied for evaluating the DSE rate, the Bit Error Rate (BER) and Throughput of the proposed scheme in comparison with a conventional scheme.

In this paper, we focus attention on the development of security techniques using software defined radio (SDR) technologies. We propose a new secure download system which uses the characteristics of the field programmable gate arrays (FPGAs) composing the SDR. The proposed system has the novelty that realization of high security encipherment is possible. This is achieved using the characteristic of FPGAs which allows systems to be arranged in a variety of different layouts, as well as by using the configuration information as the key. This unifies the renewal of the key and the encipherment. In addition the proposed system has the merit that it has high security against illegal acquisition such as a wiretapping, and can also be used in conjunction with any other current cipher algorithm. As an evaluation of the security, we show that the proposed system has high immunity to illegal acquisition of software using replay attack, by verification of the protocol as well as by numerical computation. The proposed system can therefore realize high security software downloads based on SDR.

This paper presents an adaptive burst-mode M-QAM modem architecture suitable for variable rate broadband wireless packet data networks. The core signal processing functions for the modem are common to all constellations resulting in an efficient hardware architecture for field programmable gate array (FPGA) implementation.

2-Factor covering designs, a type of combinatorial designs, have recently received attention since they have industrial applications including software testing. For these applications, even a small reduction on the size of a design is significant, because it directly leads to the reduction of testing cost. In this letter, we report ten new designs that we constructed, which improve on the previously best known results.

This paper presents the theoretical analysis of subband adaptive array combining cyclic prefix transmission scheme (SBAA-CP) in multipath fading environment. The exact expressions for optimal weights, array outputs and the output signal to interference plus noise ratio (SINR) are derived. The analysis shows that use of the cyclic prefix data transmission scheme can significantly improve the performance of subband adaptive array (SBAA). An example of implementing SBAA-CP as a software antenna is also presented.

A software defined radio (SDR) prototype based on a multiprocessor architecture (MPA) is developed. Software for Japanese personal handy phone system (PHS) of a 2G mobile system, and IEEE 802.11 wireless LAN, which has much wider bandwidth than the 2G systems, is successfully implemented. Newly developed flexible-rate pre-/ post-processor (FR-PPP) achieves the flexibility and wideband performance that the platform needs. This paper shows the design of the SDR prototype and evaluates its performance by experiments that include PHS processor load and wireless LAN throughput characteristics and processor load.