For recent and future nanometer-technology VLSIs, static and dynamic delay variations become a serious problem. In many cases, the hold timing constraint, as well as the setup timing constraint, becomes critical for latching a correct signal under delay variations. While the timing violation due to the fail of the setup timing constraint can be fixed by tuning a clock frequency or using a delayed latch, the timing violation due to the fail of the hold timing constraint cannot be fixed by those methods in general. Our approach to delay variations (in particular, the hold timing constraint) proposed in this paper is a novel register assignment strategy in high-level synthesis, which guarantees safe clocking by Backward-Data-Direction (BDD) clocking. One of the drawbacks of the proposed register assignment is the increase in the number of required registers. After the formulation of this new register minimization problem, we prove NP-hardness of the problem, and then derive an integer linear programming formulation for the problem. The proposed method receives a scheduled data flow graph, and generates a datapath having (1) robustness against delay variations, which is ensured by BDD-based register assignment, and (2) the minimum possible number of registers. Experimental results show the effectiveness of the proposed method for some benchmark circuits.

Object Constraint Language (OCL) is frequently applied in software development for stipulating formal constraints on software models. Its platform-independent characteristic allows for wide usage during the design phase. However, application in platform-specific processes, such as coding, is less obvious because it requires usage of bespoke tools for that platform. In this paper we propose an approach to generate assertion code for OCL constraints for multiple platform specific languages, using a unified framework based on structural similarities of programming languages. We have succeeded in automating the process of assertion code generation for four different languages using our tool. To show effectiveness of our approach in terms of development effort, an experiment was carried out and summarised.

This letter presents an experiment for estimating accurate state in distributed power systems. This letter employs a technique that combines a projected Jacobi method with a parallel dual-type method to solve the distributed state estimation with constraints problems. Via numerous tests, this letter demonstrates the efficiency of the proposed method on the IEEE 118-bus with four subsystems in a PC network.

This letter presents integrating algorithms for affine constraints defined on a manifold. We first explain definition and geometric representation of affine constraints. Next, we derive integrating algorithms to calculate independent first integrals of affine constraints for the two cases where the they are completely integrable and partially nonintegrable. Moreover, we prove the existence of inverse functions in the algorithms. Some examples are also shown to verify our results.

Let T be a tree with n nodes, in which each edge is associated with a length and a weight. The density-constrained longest (heaviest) path problem is to find a path of T with maximum path length (weight) whose path density is bounded by an upper bound and a lower bound. The path density is the path weight divided by the path length. We show that both problems can be solved in optimal O(n log n) time.

We present an alternative approach to what we call the "standard optimization", which minimizes a cost function by searching a parameter space. Instead, our approach "projects" in the joint observation space onto the manifold defined by the "consistency constraint", which demands that any minimal subset of observations produce the same result. This approach avoids many difficulties encountered in the standard optimization. As typical examples, we apply it to line fitting and multiview triangulation. The latter produces a new algorithm far more efficient than existing methods. We also discuss the optimality of our approach.

The influence of noise is an important problem on image acquisition and transmission stages. The traditional image denoising approaches only analyzing the pixels of local region with a moving window, which calculated by neighbor pixels to denoise. Recently, this research has been focused on the transform domain and feature space. Compare with the traditional approaches, the global multi-scale analyzing and unchangeable noise distribution is the advantage. Apparently, the estimation based methods can be used in transform domain and get better effect. This paper proposed a new approach to image denoising in orthonormal wavelet domain. In this paper, we adopt Stein's unbiased risk estimate (SURE) based method to denoise the low-frequency bands and the feature patches distance constraint (FPDC) method also be proposed to estimate the noise free bands in Wavelet domain. The key point is that how to divide the lower frequency sub-bands and the higher frequency sub-bands, and do interscale SURE and intrascale FPDC, respectively. We compared our denoising method with some well-known and new denoising algorithms, the experimental results show that the proposed method can give better performance and keep more detail information in most objective and subjective criteria than other methods.

In delay tolerant networks, energy efficient forwarding algorithms are significant to enhance the performance of message transmission probability. In this paper, we focus on the problem of optimal probabilistic epidemic forwarding with energy constraint. By introducing a continuous time model, we obtain the optimal static and dynamic policies for multi-messages forwarding. Extensive numerical results show that the optimal dynamic policy achieves higher transmission probability than the optimal static policy while the number of messages decreases the average transmission probability.

In this letter, a derivative constraint minimum output energy (MOE) receiver is proposed the offers enhanced robustness against carrier frequency offset (CFO). A theoretical analysis of the output signal-to-interference-plus-noise ratio (SINR) is presented to confirm its efficacy. Numerical results demonstrate that the proposed receiver basically offers the same performance as an optimal receiver with no CFO present.

We have fabricated VDP (van der Pauw) stress sensors on (111) silicon surfaces. This work focuses on a study of strain effects in VDP stress sensors, which were generally ignored in previous works, for the precise measurements of die stresses in electronic packages. The stress sensitivity was observed to be approximately 10% larger for p-type VDP sensors compared to n-type VDP sensors.

In this letter, a statistical uncorrelated near class discriminant (SUNCD) approach is proposed for face recognition. The optimal discriminant vector obtained by this approach can differentiate one class and its near classes, i.e., its nearest neighbor classes, by constructing the specific between-class and within-class scatter matrices and using the Fisher criterion. In this manner, SUNCD acquires all discriminant vectors class by class. Furthermore, SUNCD makes every discriminant vector satisfy locally statistical uncorrelated constraints by using the corresponding class and part of its most neighboring classes. Experiments on the public AR face database demonstrate that the proposed approach outperforms several representative discriminant methods.

Due to the distributed nature, mobile ad-hoc networks (MANETs) are vulnerable to various attacks, resulting in distrusted communications. To achieve trusted communications, it is important to build trusted routes in routing algorithms in a self-organizing and decentralized fashion. This paper proposes a trusted routing to locate and to preserve trusted routes in MANETs. Instead of using a hard security mechanism, we employ a new dynamic trust mechanism based on multiple constraints and collaborative filtering. The dynamic trust mechanism can effectively evaluate the trust and obtain the precise trust value among nodes, and can also be integrated into existing routing protocols for MANETs, such as ad hoc on-demand distance vector routing (AODV) and dynamic source routing (DSR). As an example, we present a trusted routing protocol, based on dynamic trust mechanism, by extending DSR, in which a node makes a routing decision based on the trust values on its neighboring nodes, and finally, establish a trusted route through the trust values of the nodes along the route in MANETs. The effectiveness of our approach is validated through extensive simulations.

This paper proposes closed form solutions to the L2-sensitivity minimization subject to L2-scaling constraints for second-order state-space digital filters with real poles. We consider two cases of second-order digital filters: distinct real poles and multiple real poles. The proposed approach reduces the constrained optimization problem to an unconstrained optimization problem by appropriate variable transformation. We can express the L2-sensitivity by a simple linear combination of exponential functions and formulate the L2-sensitivity minimization problem by a simple polynomial equation. As a result, L2-sensitivity is expressed in closed form, and its minimization subject to L2-scaling constraints is achieved without iterative calculations.

In this paper, we address the following problems: Given a sequence A of n real numbers, and four parameters I,J,X and Y with I≤ J and X≤ Y, find the longest (or shortest) subsequence of A such that its length is between I and J and its sum is between X and Y. We present an online and an offline algorithm for the problems, both run in O(nlog n) time, which are optimal.

In this paper, a new heuristic algorithm is proposed to optimize the power domain clustering in controlling-value-based (CV-based) power gating technology. In this algorithm, both the switching activity of sleep signals (p) and the overall numbers of sleep gates (gate count, N) are considered, and the sum of the product of p and N is optimized. The algorithm effectively exerts the total power reduction obtained from the CV-based power gating. Even when the maximum depth is kept to be the same, the proposed algorithm can still achieve power reduction approximately 10% more than that of the prior algorithms. Furthermore, detailed comparison between the proposed heuristic algorithm and other possible heuristic algorithms are also presented. HSPICE simulation results show that over 26% of total power reduction can be obtained by using the new heuristic algorithm. In addition, the effect of dynamic power reduction through the CV-based power gating method and the delay overhead caused by the switching of sleep transistors are also shown in this paper.

A new deadbeat control scheme for linear systems with input constraints is presented. Input constraints exist in most control systems, but in conventional dead-beat control, logical strategy to handle it has not been studied enough. The proposed controller in this paper adjusts the number of steps for dead-beat tracking on-line, in order to achieve delayed deadbeat-tracking performance and satisfy any admissible input constraint. Increasing the number of steps for dead-beat tracking and formulating the corresponding degree of freedom into null-space vectors make it possible to obtain delayed dead-beat tracking, and minimize the inevitable delay, respectively. LMI feasibility problems are solved to numerically obtain the solution and minimize the unavoidable step-delay. As a result, calculation effort is reduced compared to LMI-optimization problem. The proposed schemes can be readily numerically implemented. Its practical usefulness is validated by simulation for 6-axis robot model and experimental results for DC-motor servoing.

Despite the growing research effort in formal verification, industrial verification often relies on the constrained random simulation methodology, which is supported by constraint solvers as the stimulus generator integrated within simulator, especially for the large design with complex constraints nowadays. These stimulus generators need to be fast and well-distributed to maintain simulation performance. In this paper, we propose a dynamic method to guide stimulus generation by SAT solvers. An adjusting strategy named Tabu Search with Memory (TSwM) is integrated in the stimulus generator for the search and prune processes along with the constraint solver. Experimental results show that the method proposed in this paper could generate well-distributed stimuli with good performance.

In the current statistical machine translation (SMT), erroneous word reordering is one of the most serious problems. To resolve this problem, many word-reordering constraint techniques have been proposed. Inversion transduction grammar (ITG) is one of these constraints. In ITG constraints, target-side word order is obtained by rotating nodes of the source-side binary tree. In these node rotations, the source binary tree instance is not considered. Therefore, stronger constraints for word reordering can be obtained by imposing further constraints derived from the source tree on the ITG constraints. For example, for the source word sequence { a b c d }, ITG constraints allow a total of twenty-two target word orderings. However, when the source binary tree instance ((a b) (c d)) is given, our proposed "imposing source tree on ITG" (IST-ITG) constraints allow only eight word orderings. The reduction in the number of word-order permutations by our proposed stronger constraints efficiently suppresses erroneous word orderings. In our experiments with IST-ITG using the NIST MT08 English-to-Chinese translation track's data, the proposed method resulted in a 1.8-points improvement in character BLEU-4 (35.2 to 37.0) and a 6.2% lower CER (74.1 to 67.9%) compared with our baseline condition.

In modern VLSI physical design, huge integration scale necessitates hierarchical design and IP reuse to cope with design complexity. Besides, interconnect delay becomes dominant to overall circuit performance. These critical factors require some modules to be placed along designated boundaries to effectively facilitate hierarchical design and interconnection optimization related problems. In this paper, boundary constraints of general floorplan are solved smoothly based on the novel representation Single-Sequence (SS). Necessary and sufficient conditions of rooms along specified boundaries of a floorplan are proposed and proved. By assigning constrained modules to proper boundary rooms, our proposed algorithm always guarantees a feasible SS code with appropriate boundary constraints in each perturbation. Time complexity of the proposed algorithm is O(n). Experimental results on MCNC benchmarks show effectiveness and efficiency of the proposed method.

The situations where several population parameters need to be estimated simultaneously arise frequently in wide areas of applications, including reliability modeling, survival analysis and biological study. In this paper, we propose Bayesian methods of estimation of the ordered parameters of the two exponential populations, which incorporate the prior information about the simple order restriction, but sometimes breaks the order restriction. A simulation study shows that the proposed estimators are more efficient (in terms of mean square errors) than the isotonic regression of the maximum likelihood estimators with equal weights. An illustrative example is finally presented.