E-learning, which can be used anywhere and at any time, is very convenient and has been introduced to improve learning efficiency. However, securing a completion rate has been a major challenge. Recently, the learning forms of e-learning require learners to be introspective, deliberate, and logical and have proven to be incompatible with many learners with low completion rates. Thus, we developed an e-learning system that incorporates a fill-in-the-blank question-type concept map to deepen learners' understanding of learning contents while watching learning videos. The developed system promotes active learning reflectively and logically by allowing learners to answer blank question labels on concept maps from video content and labels associated with the blank question labels. We confirmed in the laboratory experiment by comparing with a conventional video-based learning system that the developed system encouraged a learner to do more system operations for rechecking the learning content and to better understand the learning contents while watching the learning video. As the next step, a field experiment is needed to investigate the usefulness and effectiveness of the developed system in actual environments in order to boost the practicality of the developed system. In this study, we introduced the developed system into the two class of the uviversity course and investigated the level of understanding to the learning contents, the system operations, and the usefulness of the developed system by comparing with those in the laboratory experiment. The results showed that the developed system provided to support the understanding to learning content and the usefulness of each function in the field experiment, as in the laboratory experiment. On the other hand, the students in the field experiment gave lower usefulness of the developed system than those in the lab experiment, suggesting that the students who attempted to thoroughly understand the learning contents in the field experiment were fewer than those in the lab experiment from their system operations during the learning.

Tool condition monitoring is one of the core tasks of intelligent manufacturing in digital workshop. This paper presents an intelligent recognize method of tool condition based on deep learning. First, the industrial microphone is used to collect the acoustic signal during machining; then, a central fractal decomposition algorithm is proposed to extract sensitive information; finally, the multi-scale convolutional recurrent neural network is used for deep feature extraction and pattern recognition. The multi-process milling experiments proved that the proposed method is superior to the existing methods, and the recognition accuracy reached 88%.

In recent years FPGA has become popular in CNN acceleration, and many CNN-to-FPGA toolchains are proposed to fast deploy CNN on FPGA. However, for these toolchains, updating CNN network means regeneration of RTL code and re-implementation which is time-consuming and may suffer timing-closure problems. So, we propose HBDCA: a toolchain and corresponding accelerator. The CNN on HBDCA is defined by the content of BRAM. The toolchain integrates UpdateMEM utility of Xilinx, which updates content of BRAM without re-synthesis and re-implementation process. The toolchain also integrates TensorFlow Lite which provides high-accuracy quantization. HBDCA supports 8-bits per-channel quantization of weights and 8-bits per-layer quantization of activations. Upgrading CNN on accelerator means the kernel size of CNN may change. Flexible structure of HBDCA supports kernel-level parallelism with three different sizes (3×3, 5×5, 7×7). HBDCA implements four types of parallelism in convolution layer and two types of parallelism in fully-connected layer. In order to reduce access number to memory, both spatial and temporal data-reuse techniques were applied on convolution layer and fully-connect layer. Especially, temporal reuse is adopted at both row and column level of an Input Feature Map of convolution layer. Data can be just read once from BRAM and reused for the following clock. Experiments show by updating BRAM content with single UpdateMEM command, three CNNs with different kernel size (3×3, 5×5, 7×7) are implemented on HBDCA. Compared with traditional design flow, UpdateMEM reduces development time by 7.6X-9.1X for different synthesis or implementation strategy. For similar CNN which is created by toolchain, HBDCA has smaller latency (9.97µs-50.73µs), and eliminates re-implementation when update CNN. For similar CNN which is created by dedicated design, HBDCA also has the smallest latency 9.97µs, the highest accuracy 99.14% and the lowest power 1.391W. For different CNN which is created by similar toolchain which eliminate re-implementation process, HBDCA achieves higher speedup 120.28X.

We propose a video authentication scheme to verify whether a given video file is recorded by a camera device or touched by a video editing tool. The proposed scheme prepares software characteristics of camera devices and video editing tools in advance, and compares them with the metadata of the given video file. Through practical implementation, we show that the proposed scheme has benefits of fast analysis time, high accuracy and full automation.

Goal modeling is a method that describes requirements structurally. Goal modeling mainly consists of two tasks: extraction of goals and organization of the extracted goals. Generally, the process of the goal modeling requires intensive manual intervention and higher modeling skills than the process of the usual requirements description. In order to mitigate this problem, we propose a method that provides systematic supports for constructing goal models. In the method, the requirement analyst answers questions and a goal model is semi-automatically constructed based on the answers made. We develop a prototype tool that implements the proposed method and apply it to two systems. The results demonstrate the feasibility of the method.

Free/libre open source software (FLOSS) are being rapidly employed in several companies and organizations, because it can be modified and used for free. Hence, the use of FLOSS could contribute to its originally intended benefits and to the competence of its users. In this study, we analyzed the effect of using FLOSS on related competences. We investigated the change in the competences through an empirical study before and after the use of FLOSS among project participants. Consequently, it was confirmed that the competences of the participants improved after utilizing FLOSS.

Many kinds of questionnaires, testing, and voting are performed in some completely electronic ways to do questions and answers on the Internet as Web applications, i.e. e-questionnaire systems, e-testing systems, and e-voting systems. Because there is no unified communication tool among the stakeholders of e-questionnaire, e-testing, and e-voting systems, until now, all the e-questionnaire, e-testing, and e-voting systems are designed, developed, used, and maintained in various ad hoc ways. As a result, the stakeholders are difficult to communicate to implement the systems, because there is neither an exhaustive requirement list to have a grasp of the overall e-questionnaire, e-testing, and e-voting systems nor a standardized terminology for these systems to avoid ambiguity. A general-purpose specification language to provide a unified description way for specifying various e-questionnaire, e-testing, and e-voting systems can solve the problems such that the stakeholders can refer to and use the complete requirements and standardized terminology for better communications, and can easily and unambiguously specify all the requirements of systems and services of e-questionnaire, e-testing, and e-voting, even can implement the systems. In this paper, we propose the first specification language, named “QSL,” with a standardized, consistent, and exhaustive list of requirements for specifying various e-questionnaire, e-testing, and e-voting systems such that the specifications can be used as the precondition of automatically generating e-questionnaire, e-testing, and e-voting systems. The paper presents our design addressing that QSL can specify all the requirements of various e-questionnaire, e-testing, and e-voting systems in a structured way, evaluates its effectiveness, performs real applications using QSL in case of e-questionnaire, e-testing, and e-voting systems, and shows various QSL applications for providing convenient QSL services to stakeholders.

We investigate image recognition of multiple food items in a single photo, focusing on a buffet restaurant application, where menu changes at every meal, and only a few images per class are available. After detecting food areas, we perform hierarchical recognition. We evaluate our results, comparing to two baseline methods.

This paper proposes a novel environmental monitoring strategy, incremental environmental monitoring, that enables scientists to reveal the ecology of wild animals in the field. We applied this strategy to the habitat of endangered freshwater fish. Specifically, we designed and implemented a network-based system using distributed sensors to continuously monitor and record the habitat of endangered fish. Moreover, we developed a set of analytical tools to exploit a variety of sensor data, including environmental time-series data such as amount of dissolved oxygen, as well as underwater video capturing the interaction of fish and their environment. We also describe the current state of monitoring the behavior and habitat of endangered fish and discuss solutions for making such environmental monitoring more efficient in the field.

Studies have shown that program visualization(PV) is effective for student programming exercise or self-study support. However, very few instructors actively use PV tools for programming lectures. This article discussed the impediments the instructors meet during combining PV tools into lecture classrooms and proposed a C programming classroom instruction support tool based on program visualization — PROVIT-CI (PROgram VIsualization Tool for Classroom Instruction). PROVIT-CI has been consecutively and actively used by the instructors in author's university to enhance their lectures since 2015. The evaluation of application results in an introductory C programming course shows that PROVIT-CI is effective and helpful for instructors classroom use.

The growth of Internet traffic and the variety of traffic classes make network performance extremely difficult to evaluate. Even though most current methods rely on complex or costly hardware, recent research on bandwidth sharing has suggested the possibility of defining evaluation methods that simply require basic statistics on aggregated link utilization, such as mean and variance. This would greatly simplify monitoring systems as these statistics are easily calculable from Simple Network Management Protocol (SNMP) calls. However, existing methods require knowledge of certain fixed information about the network being monitored (e.g. link capacities). This is usually unavailable when the operator's view is limited to its share of leased links or when shared links carry traffic with different priorities. In this paper, departing from the analysis of aggregated link utilization statistics obtainable from SNMP requests, we propose a method that detects traffic degradation based on link utilization samples. It does not require knowledge of the capacity of the aggregated link or any other network parameters, giving network operators the possibility to control network performance in a more reliable and cost-effective way.

Designing a backbone IP network, especially to support both unicast and multicast traffic under delay constraints, is a difficult problem. Real network design must consider cost, performance and reliability. Therefore, a simulator can help a network designer to test the functionality of the network before the implementation. This paper proposes a heuristic design algorithm called D-MENTOR, and the algorithm was developed by programming based on Mesh Network Topological Optimization and Routing Version 2 (MENTOR-II) to integrate as a new module of DElite tool. The simulation results show that, in almost all test cases, the proposed algorithm yields lower installation cost.

As the virtualization technology becomes the core ingredient for recent promising IT infrastructures such as utility computing and cloud computing, accurate analysis of the internal behaviors of virtual machines becomes more and more important. In this paper, we first propose a novel I/O fairness analysis tool for virtualization systems. It supports the following three features: fine-grained, multimodal and multidimensional. Then, using the tool, we observe various I/O behaviors in our experimental XEN-based virtualization system. Our observations disclose that 1) I/O fairness among virtual machines is broken frequently even though each virtual machine requests the same amount of I/Os, 2) the unfairness is caused by an intricate combination of factors including I/O scheduling, CPU scheduling and interactions between the I/O control domain and virtual machines, and 3) some mechanisms, especially the CFQ (Completely Fair Queuing) I/O scheduler that supports fairness reasonable well in a non-virtualization system, do not work well in a virtualization system due to the virtualization-unawareness. These observations drive us to design a new virtualization-aware I/O scheduler for enhancing I/O fairness. It gives scheduling opportunities to asynchronous I/Os in a controlled manner so that it can avoid the unfairness caused by the priority inversion between the low-priority asynchronous I/Os and high-priority synchronous I/Os. Real implementation based experimental results have shown that our proposal can enhance I/O fairness reducing the standard deviation of the finishing time among virtual machines from 4.5 to 1.2.

In this paper, we propose a new online authoring tool for e-Learning system to meet the social demands for internationalized higher education. The tool includes two functions – an authoring function for creating video-based content by the instructor, and a viewing function for self-learning by students. In the authoring function, an instructor creates key markings onto the raw video stream to produce virtual video clips related to each slide. With key markings, some parts of the raw video stream can be easily skipped. The virtual video clips form an aggregated video stream that is used to synchronize with the slide presentation to create learning content. The synchronized content can be previewed immediately at the client computer prior to saving at the server. The aggregated video becomes the baseline for the viewing function. Based on aggregated video stream methodology, content editing requires only the changing of key markings without editing the raw video file. Furthermore, video and pointer synchronization is also proposed for enhancing the students' learning efficiency. In viewing function, video quality control and an adaptive video buffering method are implemented to support usage in various network environments. The total system is optimized to support cross-platform and cloud computing to break the limitation of various usages. The proposed method can provide simple authoring processes with clear user interface design for instructors, and help students utilize learning contents effectively and efficiently. In the user acceptance evaluation, most respondents agree with the usefulness, ease-of-use, and user satisfaction of the proposed system. The overall results show that the proposed authoring and viewing tools have higher user acceptance as a tool for e-Learning.

This paper proposes an ASIC design support tool set for non-pipelined asynchronous circuits with bundled-data implementation. This tool set consists of seven tools to automate design processes of bundled-data implementation such as the generation of design constraints, timing verification, and delay adjustment considering a given latency constraint. With the proposed design flow which combines the proposed tool set and commercial CAD tools, most of design processes from an RTL model is fully automated. In the experiments, to show the effectiveness of energy consumption in bundled-data implementation compared to synchronous counterpart, this paper synthesizes several circuits with a latency constraint which is generated from the synchronous counterpart with the minimum clock cycle time.

Building an experimental network within a testbed has been a tiresome process for experimenters, due to the complexity of the physical resource assignment and the configuration overhead. Also, the process could not be expedited across testbeds, because the syntax of a configuration file varies depending on specific hardware and software. Re-configuration of an experimental topology for each testbed wastes time, an experimenter could not carry out his/her experiments during the limited lease time of a testbed at worst. In this paper, we propose the AnyBed: the experimental network-building system. The conceptual idea of AnyBed is "If experimental network topologies can be portable across any kinds of testbed, then, it would expedite building an experimental network on a testbed while manipulating experiments by each testbed support tool". To achieve this concept, AnyBed divide an experimental network configuration into the logical and physical network topologies. Mapping these two topologies, AnyBed can build intended logical network topology on any PC clusters. We have evaluated the AnyBed implementation using two distinct clusters. The evaluation result shows a BGP topology with 150 nodes can be constructed on a large scale testbed in less than 113 seconds.

Efficient use of information technology (IT) is considered a major determinant of an end-user's business performance and an enterprise's competitiveness. A 16-item tool that can efficiently measure end-user information competency is presented with the measures. The validity and reliability of the tool is confirmed, and the tool's theoretical and practical applications are discussed.

Humans have a remarkable ability to flexibly control various objects such as tools. Much evidence suggests that the internal models acquired in the central nervous system (CNS) support flexible control. Internal models are neural mechanisms that mimic the input-output properties of controlled objects. In a series of functional magnetic resonance imaging (fMRI) studies, we demonstrate how the CNS acquires and switches internal models for dexterous use of many tools. In the first study, we investigated human cerebellar activity when human subjects learned how to use a novel tool (a rotated computer mouse, where the cursor appears in a rotated position) and found that activity reflecting an internal model of the novel tool increases in the lateral cerebellum after learning how to use the tool. In the second study, we investigated the internal-model activity after sufficient training in the use of two types of novel tools (the rotated mouse and a velocity mouse, where the cursor's velocity is proportional to mouse's position) and found that the cerebellar activities for the two tools were spatially segregated. In the third study, we investigated brain activity associated with the flexible switching of tools. We found that the activity related to switching internal models was in the prefrontal lobe (area 46 and the insula), the parietal lobe, and the cerebellum. These results suggest that internal models in the cerebellum represent input-output properties of the tools as modulators of continuous signals. The cerebellar abilities in adaptive modulation of signals can be used to enhance the control signals in communications between the brain and computers.

This paper presents methods for detecting transistor short faults using logic level fault simulation and test generation. The paper considers two types of transistor level faults, namely strong shorts and weak shorts, which were introduced in our previous research. These faults are defined based on the values of outputs of faulty gates. The proposed fault simulation and test generation are performed using gate-level tools designed to deal with stuck-at faults, and no transistor-level tools are required. In the test generation process, a circuit is modified by inserting inverters, and a stuck-at test generator is used. The modification of a circuit does not mean a design-for-testability technique, as the modified circuit is used only during the test generation process. Further, generated test patterns are compacted by fault simulation. Also, since the weak short model involves uncertainty in its behavior, we define fault coverage and fault efficiency in three different way, namely, optimistic, pessimistic and probabilistic and assess them. Finally, experimental results for ISCAS benchmark circuits are used to demonstrate the effectiveness of the proposed methods.

Three-dimensional nanostructure fabrication has been demonstrated by 30 keV Ga+ focused-ion-beam chemical-vapor-deposition (FIB-CVD) using a phenanthrene (C14H10) source as a precursor. Microstructure plastic arts is advocated as a new field using micro-beam technology, presenting one example of micro-wine-glass with 2.75 µm external diameter and 12 µm height. The deposition film is a diamondlike amorphous carbon. A large Young's modulus that exceeds 600 GPa seems to present great possibilities for various applications. Producing of three-dimensional nanostructure is discussed. Micro-coil, nanoelectrostatic actuator, and nano-space-wiring with 0.1 µm dimension are demonstrated as parts of nanomechanical system. Furthermore, nanoinjector and nanomanipulator are also fabricated as a novel nano-tool for manipulation and analysis of subcellular organelles.