Tin-doped indium oxide (ITO) thin films were prepared on a polyethylene terephthalate (PET) foil by bias sputtering. In the absence of a substrate bias, films having a high resistivity of 210-2 Ωcm were formed. On the other hand, by the application of an rf substrate bias, films having a low resistivity of 2.610-4 Ωcm were formed. The energy of ions that bombarded the substrate during bias sputtering was estimated by a simulation of the ion acceleration. The optimum ion-energy required for the reduction of resistivity was found to be approximately 50 eV.

A total-field/scattered-field (TF/SF) boundary which is commonly used in the finite-difference time-domain (FDTD) method to illuminate scatterers by plane waves, is developed for use in the constrained interpolation profile (CIP) method. By taking the numerical dispersion into account, the nearly perfect TF/SF boundary can be achieved, which allows us to calculate incident fields containing high frequency components without fictitious scattered fields. First of all, we formulate the TF/SF boundary in the CIP scheme. The numerical dispersion relation is then reviewed. Finally the numerical dispersion is implemented in the TF/SF boundary to estimate deformed incident fields. The performance of the nearly perfect TF/SF boundary is examined by measuring leaked fields in the SF region, and the proposed method drastically diminish the leakage compared with the simple TF/SF boundary.

This paper analyzes frequency tracking characteristics of a complex-coefficient adaptive infinite impulse response (IIR) notch filter with a simplified gradient-based algorithm. The input signal to the complex notch filter is a complex linear chirp embedded in a complex zero-mean white Gaussian noise. The analysis starts with derivation of a first-order real-coefficient difference equation with respect to steady-state instantaneous frequency tracking error. Closed-form expression for frequency tracking mean square error (MSE) is then derived from the difference equation. Lastly, closed-form expressions for optimum notch bandwidth coefficient and step size constant that minimize the frequency tracking MSE are derived. Computer simulations are presented to validate the analysis.

Crosstalk delay within an on-chip bus can induce severe transmission performance penalties. The Bus-grouping Asynchronous Transmission (BAT) scheme is proposed to mitigate the performance degradation. Furthermore, considering the distinct spatial locality of transition distribution on some types of buses, we use the locality to optimize the BAT. In terms of the implementation, we propose the Differential Counter Cluster (DCC) synchronous mechanism to synchronize the data transmission, and the Delay Active Shielding (DAS) to protect some critical signals from crosstalk and optimize the routing area overhead. The BAT is scalable with the variation of bus width with little extra implementation complexity. The effectiveness of the BAT is evaluated by focusing on the on-chip buses of a superscalar microprocessor simulator using the SPEC CPU2000 benchmarks. When applied to a 64-bit on-chip instruction bus, the BAT scheme, compared with the conservative approach, Codec and Variable Cycle Transmission (DYN) approaches, improves performance by 55+%, 10+%, 30+%, respectively, at the expense of 13% routing area overhead.

Compact and planar active integrated antenna arrays with a high power multi-stage amplifier were developed with effective heat sink mechanism. By attaching an aluminum plate to the backside of the creased amplifier circuit board, effective cooling can be achieved. The nonlinear behavior of the amplifier agrees well with the simulation based on the Angelov model. The high power amplifier circuit consisted of the three-stage amplifier and operated with an output power of 4 W per each element at 5.8 GHz. The 32-element active integrated antenna array stably operated with the output power of 120 W under the effective heat sink design. With a weight of 4 kg, the weight-to-output power ratio and the volume-to-output power ratio of the antenna array are 33.3 g/W and 54.5 cm3/W, respectively. Wireless power transmission was also successfully demonstrated.

This paper describes a novel Wilkinson power divider operating at two arbitrary different frequencies. The proposed divider consists of two-section transmission lines and a series RLC circuit connected between two output ports. The circuit parameters for a dual-band operation are derived by the even/odd mode analysis. Equal power split, complete matching, and good isolation between two output ports are numerically demonstrated. Dual-band and broadband Wilkinson power dividers can be successfully designed. Finally, verification of this design method is also shown by electromagnetic simulations and experiments.

A novel CMOS LC quadrature oscillator (QO) which adopts complementary-coupling circuitry has been proposed. The performance improvement in I/Q phase error and phase noise of the proposed QO, is explained in comparison with conventional QOs. The proposed QO is implemented in 0.18 µm CMOS technology along with conventional QOs. The measurement result of the proposed QO shows -133.5 dBc/Hz of phase noise at 1 MHz offset and 0.6 I/Q phase difference, while oscillating at 1.77 GHz. The proposed QO shows more than 6.5 dB phase noise improvement compared to that of the conventional QOs over the offset frequency range of 10 K-1 MHz, while dissipating 4 mA from 1.4 V supply.

A wideband InGaP/GaAs HBT MMIC amplifier with a low noise characteristic has been developed as a full-band UWB receiver. The amplifier was designed by applying a scaling law to a driver amplifier in order to decrease power consumption, including a modification for decreasing a noise figure. A triple base structure for a double-emitter HBT was employed to decrease a base resistance and to decrease a noise figure of the amplifier. A fabricated amplifier provided a 3-dB gain roll-off bandwidth from 1.1 GHz to 10.6 GHz with a 14.1 dB peak power gain. The amplifier exhibited a low power consumption of 15.9 mW and a low noise figure of less than 3.7 dB in the full-band of the UWB.

Time-resolved microscopic optical second harmonic generation (TRM-SHG) imaging measurement revealed quantitatively the potential drop at the electrode contact of pentacene field effect transistors (FET). An activation of the SH signal at the edge of Ag-source electrode indicates the presence of large potential drop at pentacene-Ag contact during device operation, whereas negligible potential drop was observed at pentacene-Au contact. These findings agree with the injection characteristics of electrodes owing to the relationship between the work function of the metal and the HOMO level of pentacene.

In this report, we demonstrate electrocatalytic oxidation properties of ascorbic acid at poly(3,4-ethylenedioxythiophene) (PEDOT) thin films in view of their potential application for bio-sensing devices. PEDOT thin films were deposited on gold thin films by electropolymerization of EDOT monomer in acetonitrile solvent. In-situ electrochemical-surface plasmon resonance spectroscopy (EC-SPR) was used to detect both electrochemical and optical signals upon an injection of ascorbic acid.

Nucleic acid sensor based on polyaniline has been fabricated by covalently immobilizing double stranded calf thymus (dsCT) DNA onto perchlorate (ClO- 4) doped polyaniline (PANI) film deposited onto indium-tin-oxide (ITO) glass plate using 1-(3-(dimethylamino) propyl)-3-ethylcarbodiimide hydrochloride (EDC)/N-hydroxyl succinimide (NHS) chemistry. These dsCT-DNA-PANI/ITO and PANI/ITO electrodes have been characterized using square wave voltammetry, electrochemical impedance, and Fourier-transform-infra-red (FTIR) measurements. This disposable dsCT-DNA-PANI/ITO bioelectrode is stable for about four months, can be used to detect arsenic trioxide (0.1 ppm) in 30 s.

A novel voltage level controller for low-power charge pump converters will be presented in this paper. The proposed voltage level controller would react according to the pumped voltage in the charge-transfer-switch (CTS) converter. For the CTS circuit, the pumping operation would be degraded by the charge sharing effect in the auxiliary switch path. In this study, a voltage shifter was used as the voltage level controller to overcome this serious problem without consuming too much chip area. The simulation results showed that the converter can accept a rated input of 1.5 V and generated an output up to 8 V based on the TSMC 0.35-µm CMOS technology. The layout consumed an area of 125*160 µm2. The highest output obtained in measuring the real chip was 5.5 V which is primarily due to the limitation that the transistor could tolerated. The largest load was estimated as high as 6 mW which is large enough for on-chip application.

A concurrent model of computation and a language based on the model for bit-level operation are useful for developing asynchronous and concurrent programs compositionally, which frequently use bit-level operations. Some examples are programs for video games, hardware emulation (including virtual machines), and signal processing. However, few models and languages are optimized and oriented to bit-level concurrent computation. We previously developed a visual programming language called A-BITS for bit-level concurrent programming. The language is based on a dataflow-like model that computes using processes that provide serial bit-level operations and FIFO buffers connected to them. It can express bit-level computation naturally and develop compositionally. We then devised a concurrent computation model called APEC (Asynchronous Program Elements Connection) for bit-level concurrent computation. This model enables precise and formal expression of the process of computation, and a notion of primitive program elements for controlling and operating can be expressed synthetically. Specifically, the model is based on a notion of uniform primitive processes, called primitives, that have three terminals and four ordered rules at most, as well as on bidirectional communication using vehicles called carriers. A new notion is that a carrier moving between two terminals can briefly express some kinds of computation such as synchronization and bidirectional communication. The model's properties make it most applicable to bit-level computation compositionally, since the uniform computation elements are enough to develop components that have practical functionality. Through future application of the model, our research may enable further research on a base model of fine-grain parallel computer architecture, since the model is suitable for expressing massive concurrency by a network of primitives.

This paper presents an RK-means clustering algorithm which is developed for reliable data grouping by introducing a new reliability evaluation to the K-means clustering algorithm. The conventional K-means clustering algorithm has two shortfalls: 1) the clustering result will become unreliable if the assumed number of the clusters is incorrect; 2) during the update of a cluster center, all the data points belong to that cluster are used equally without considering how distant they are to the cluster center. In this paper, we introduce a new reliability evaluation to K-means clustering algorithm by considering the triangular relationship among each data point and its two nearest cluster centers. We applied the proposed algorithm to track objects in video sequence and confirmed its effectiveness and advantages.

We propose a query language based on extended regular expressions. This language extends texts with text-generating macros. These macros make it possible to define languages in a compressed, elegant way. This paper also extends queries with linear implications and additive (classical) conjunctions. To be precise, it allows goals of the form D —ο G and G1&G2 where D is a text or a macro and G is a query. The first goal is solved by adding D to the current text and then solving G. This goal is flexible in controlling the current text dynamically. The second goal is solved by solving both G1 and G2 from the current text. This goal is particularly useful for internet search.

Longest path problem is a problem for finding a longest path in a given graph. While the graph classes in which the Hamiltonian path problem can be solved efficiently are widely investigated, there are few known graph classes such that the longest path problem can be solved efficiently. Polynomial time algorithms for finding a longest cycle and a longest path in a Ptolemaic graph are proposed. Ptolemaic graphs are the graphs that satisfy the Ptolemy inequality, and they are the intersection of chordal graphs and distance-hereditary graphs. The algorithms use the dynamic programming technique on a laminar structure of cliques, which is a recent characterization of Ptolemaic graphs.

The long-term degradation due to aging such as NBTI (Negative Bias Temperature Instability) is a hot issue in the current circuit design using nanometer process technologies, since it causes a delay fault in the field. In order to resolve the problem, we must estimate delay variation caused by long-term degradation in design stage, but over estimation must be avoided so as to make timing design easier. If we can treat such a variation statistically, and if we treat it together with delay variations due to process variability, then we can reduce over margin in timing design. Moreover, such a statistical static timing analyzer treating process variability and long-term degradation together will help us to select an appropriate set of paths for which field testing are conducted to detect delay faults. In this paper, we propose a new delay model with a half triangular distribution, which is introduced for handling a random factor with unknown distribution such as long term degradation. Then, we show an algorithm for finding the statistical maximum, which is one of key operations in statistical static timing analysis. We also show a few experimental results demonstrating the effect of the proposed model and algorithm.

The research on displacement vector detection has gained increasing attention in recent years. However, no relationship between displacement vectors and the outlines of objects in motion has been established. We describe a new method of detecting displacement vectors through edge segment detection by emphasizing the correlation between displacement vectors and their outlines. Specifically, after detecting an edge segment, the direction of motion of the edge segment can be inferred through the variation in the values of the Laplacian-Gaussian filter at the position near the edge segment before and after the motion. Then, by observing the degrees of displacement before and after the motion, the displacement vector can be calculated. The accuracy compared to other methods of displacement vector detection demonstrates the feasibility of this method.

Real-time content analysis is typically a bottleneck in Web filtering. To accelerate the filtering process, this work presents a simple, but effective early decision algorithm that analyzes only part of the Web content. This algorithm can make the filtering decision, either to block or to pass the Web content, as soon as it is confident with a high probability that the content really belongs to a banned or an allowed category. Experiments show the algorithm needs to examine only around one-fourth of the Web content on average, while the accuracy remains fairly good: 89% for the banned content and 93% for the allowed content. This algorithm can complement other Web filtering approaches, such as URL blocking, to filter the Web content with high accuracy and efficiency. Text classification algorithms in other applications can also follow the principle of early decision to accelerate their applications.

Permutation ambiguity of the classical Independent Component Analysis (ICA) may cause problems in feature extraction for pattern classification. Especially when only a small subset of components is derived from data, these components may not be most distinctive for classification, because ICA is an unsupervised method. We include a selective prior for de-mixing coefficients into the classical ICA to alleviate the problem. Since the prior is constructed upon the classification information from the training data, we refer to the proposed ICA model with a selective prior as a supervised ICA (sICA). We formulated the learning rule for sICA by taking a Maximum a Posteriori (MAP) scheme and further derived a fixed point algorithm for learning the de-mixing matrix. We investigate the performance of sICA in facial expression recognition from the aspects of both correct rate of recognition and robustness even with few independent components.