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[Author] Ittetsu TANIGUCHI(17hit)

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  • Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs

    Ittetsu TANIGUCHI  Junya KAIDA  Takuji HIEDA  Yuko HARA-AZUMI  Hiroyuki TOMIYAMA  

     
    PAPER-Fundamentals of Information Systems

      Vol:
    E97-D No:11
      Page(s):
    2827-2834

    This paper studies mapping techniques of multiple applications on embedded many-core SoCs. The mapping techniques proposed in this paper are static which means the mapping is decided at design time. The mapping techniques take into account both inter-application and intra-application parallelism in order to fully utilize the potential parallelism of the many-core architecture. Additionally, the proposed static mapping supports dynamic application switching, which means the applications mapped onto the same cores are switched to each other at runtime. Two approaches are proposed for static mapping: one approach is based on integer linear programming and the other is based on a greedy algorithm. Experimental results show the effectiveness of the proposed techniques.

  • SOH Aware System-Level Battery Management Methodology for Decentralized Energy Network

    Daichi WATARI  Ittetsu TANIGUCHI  Takao ONOYE  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E103-A No:3
      Page(s):
    596-604

    The decentralized energy network is one of the promising solutions as a next-generation power grid. In this system, each house has a photovoltaic (PV) panel as a renewable energy source and a battery which is an essential component to balance between generation and demand. The common objective of the battery management on such systems is to minimize only the purchased energy from a power company, but battery degradation caused by charge/discharge cycles is also a serious problem. This paper proposes a State-of-Health (SOH) aware system-level battery management methodology for the decentralized energy network. The power distribution problem is often solved with mixed integer programming (MIP), and the proposed MIP formulation takes into account the SOH model. In order to minimize the purchased energy and reduce the battery degradation simultaneously, the optimization problem is divided into two stages: 1) the purchased energy minimization, and 2) the battery aging factor reducing, and the trade-off exploration between the purchased energy and the battery degradation is available. Experimental results show that the proposed method achieves the better trade-off and reduces the battery aging cost by 14% over the baseline method while keeping the purchased energy minimum.

  • Static Mapping of Multiple Data-Parallel Applications on Embedded Many-Core SoCs

    Junya KAIDA  Yuko HARA-AZUMI  Takuji HIEDA  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  Koji INOUE  

     
    LETTER-Computer System

      Vol:
    E96-D No:10
      Page(s):
    2268-2271

    This paper studies the static mapping of multiple applications on embedded many-core SoCs. The mapping techniques proposed in this paper take into account both inter-application and intra-application parallelism in order to fully utilize the potential parallelism of the many-core architecture. Two approaches are proposed for static mapping: one approach is based on integer linear programming and the other is based on a greedy algorithm. Experiments show the effectiveness of the proposed techniques.

  • Magic Line: An Integrated Method for Fast Parts Counting and Orientation Recognition Using Industrial Vision Systems

    Qiaochu ZHAO  Ittetsu TANIGUCHI  Makoto NAKAMURA  Takao ONOYE  

     
    PAPER-Vision

      Vol:
    E103-A No:7
      Page(s):
    928-936

    Vision systems are widely adopted in industrial fields for monitoring and automation. As a typical example, industrial vision systems are extensively implemented in vibrator parts feeder to ensure orientations of parts for assembling are aligned and disqualified parts are eliminated. An efficient parts orientation recognition and counting method is thus critical to adopt. In this paper, an integrated method for fast parts counting and orientation recognition using industrial vision systems is proposed. Original 2D spatial image signal of parts is decomposed to 1D signal with its temporal variance, thus efficient recognition and counting is achievable, feeding speed of each parts is further leveraged to elaborate counting in an adaptive way. Experiments on parts of different types are conducted, the experimental results revealed that our proposed method is both more efficient and accurate compared to other relevant methods.

  • Autonomous Decentralized Mechanism for Energy Interchanges with Accelerated Diffusion Based on MCMC

    Yusuke SAKUMOTO  Ittetsu TANIGUCHI  

     
    PAPER-Systems and Control

      Vol:
    E98-A No:7
      Page(s):
    1504-1511

    It is not easy to provide energy supply based on renewable energy enough to satisfy energy demand anytime and anywhere because the amount of renewable energy depends on geographical conditions and the time of day. In order to maximize the satisfaction of energy demand by renewable energy, surplus energy generated with renewable energy should be stored in batteries, and transmitted to electric loads with high demand somewhere in the electricity system. This paper proposes a novel autonomous decentralized mechanism of energy interchanges between distributed batteries on the basis of the diffusion equation and MCMC (Markov Chain Monte Carlo) for realizing energy supply appropriately for energy demand. Experimental results show that the proposed mechanism effectively works under several situations. Moreover, we discuss a method to easily estimate the behavior of the entire system by each node with the proposed mechanism, and the application potentiality of this estimating method to an efficient method working with non-renewable generators while minimizing the dependence of non-renewable energy, and an incentive mechanism to prevent monopolizing energy in systems.

  • EV Aggregation Framework for Spatiotemporal Energy Shifting to Reduce Solar Energy Waste

    Kenshiro KATO  Daichi WATARI  Ittetsu TANIGUCHI  Takao ONOYE  

     
    PAPER-Mathematical Systems Science

      Pubricized:
    2022/09/16
      Vol:
    E106-A No:1
      Page(s):
    54-63

    Solar energy is an important energy resource for a sustainable society and is massively introduced these days. Household generally sells their excess solar energy by the reverse power flow, but the massive reverse power flow usually sacrifices the grid stability. In order to utilize renewable energy effectively and reduce solar energy waste, electric vehicles (EVs) takes an important role to fill in the spatiotemporal gap of solar energy. This paper proposes a novel EV aggregation framework for spatiotemporal shifting of solar energy without any reverse power flow. The proposed framework causes charging and discharging via an EV aggregator by intentionally changing the price, and the solar energy waste is expected to reduce by the energy trade. Simulation results show the proposed framework reduced the solar energy waste by 68%.

  • Static Mapping of Parallelizable Tasks under Deadline Constraints

    Yining XU  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1500-1502

    Task mapping is one of the most important design processes in embedded manycore systems. This paper proposes a static task mapping technique for manycore real-time systems. The technique minimizes the number of cores while satisfying deadline constraints of individual tasks.

  • Network Topology and Battery Size Exploration for Decentralized Energy Network with MIP Base Power Flow Optimization

    Ittetsu TANIGUCHI  Kazutoshi SAKAKIBARA  Shinya KATO  Masahiro FUKUI  

     
    PAPER-General Fundamentals and Boundaries

      Vol:
    E96-A No:7
      Page(s):
    1617-1624

    Large-scale introduction of renewable energy such as photovoltaic energy and wind is a big motivation for renovating conventional grid systems. To be independent from existing power grids and to use renewable energy as much as possible, a decentralized energy network is proposed as a new grid system. The decentralized energy network is placed among houses to connect them with each other, and each house has a PV panel and a battery. A contribution of this paper is a network topology and battery size exploration for the decentralized energy network in order to make effective use of renewable energy. The proposed method for exploring the decentralized energy network design is inspired by the design methodology of VLSI systems, especially design space exploration in system-level design. The proposed method is based on mixed integer programming (MIP) base power flow optimization, and it was evaluated for all design instances. Experimental results show that the decentralized energy network has the following features. 1) The energy loss and energy purchased due to power shortage were not affected by each battery size but largely affected by the sum of all battery sizes in the network, and 2) the network topology did not largely affect the energy loss and the purchased energy. These results will become a useful guide to designing an optimal decentralized energy network for each region.

  • Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path

    Ittetsu TANIGUCHI  Kohei AOKI  Hiroyuki TOMIYAMA  Praveen RAGHAVAN  Francky CATTHOOR  Masahiro FUKUI  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E97-A No:2
      Page(s):
    606-615

    A fast and accurate architecture exploration for high performance and low energy VLIW data-path is proposed. The main contribution is a method to find Pareto optimal FU structures, i.e., the optimal number of FUs and the best instruction assignment for each FU. The proposed architecture exploration method is based on GA and enables the effective exploration of vast solution space. Experimental results showed that proposed method was able to achieve fast and accurate architecture exploration. For most cases, the estimation error was less than 1%.

  • Two-Stage Configurable Decoder Model for Domain Specific FEC Decoder Design

    Ittetsu TANIGUCHI  Ayataka KOBAYASHI  Keishi SAKANUSHI  Yoshinori TAKEUCHI  Masaharu IMAI  

     
    PAPER-High-Level Synthesis and System-Level Design

      Vol:
    E94-A No:12
      Page(s):
    2659-2668

    Forward error correction (FEC) is one of important and heavy tasks for wireless communication. Leading edge mobile embedded systems usually support not only one FEC standard, but multiple FEC standards in order to adapt to various wireless communication standards. In this paper, we propose two-stage configurable decoder model (2-Stage CDM) for multiple FEC standards for Viterbi and Turbo coding which have a variation under the constraint length, coding rate, etc. Proposed decoder model realizes a decoder instance which supports dedicated multiple FEC standards, and rapid design for domain specific decoder is realized. Proposed decoder model is configurable in two stages: at hardware generation time and at runtime, and designers can easily specify these specifications by various design parameters. Experimental results show proposed two-stage configurable decoder model supports various domain specific FEC decoder including existing decoder, and the decoder instances based on proposed 2-Stage CDM have sufficient throughput for each communication standard and reasonable area overhead compared with existing decoder.

  • Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores

    Hiroki NISHIKAWA  Kana SHIMADA  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    PAPER

      Pubricized:
    2021/09/01
      Vol:
    E105-A No:3
      Page(s):
    540-548

    With the demand for energy-efficient and high- performance computing, multicore architecture has become more appealing than ever. Multicore task scheduling is one of domains in parallel computing which exploits the parallelism of multicore. Unlike traditional scheduling, multicore task scheduling has recently been studied on the assumption that tasks have inherent parallelism and can be split into multiple sub-tasks in data parallel fashion. However, it is still challenging to properly determine the degree of parallelism of tasks and mapping on multicores. Our proposed scheduling techniques determine the degree of parallelism of tasks, and sub-tasks are decided which type of cores to be assigned to heterogeneous multicores. In addition, two approaches to hardware/software codesign for heterogeneous multicore systems are proposed. The works optimize the types of cores organized in the architecture simultaneously with scheduling of the tasks such that the overall energy consumption is minimized under a deadline constraint, a warm start approach is also presented to effectively solve the problem. The experimental results show the simultaneous scheduling and core-type optimization technique remarkably reduces the energy consumption.

  • Static Mapping of Multiple Parallel Applications on Non-Hierarchical Manycore Embedded Systems

    Yining XU  Yang LIU  Junya KAIDA  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    LETTER

      Vol:
    E99-A No:7
      Page(s):
    1417-1419

    This paper proposes a static application mapping technique, based on integer linear programming, for non-hierarchical manycore embedded systems. Unlike previous work which was designed for hierarchical manycore SoCs, this work allows more flexible application mapping to achieve higher performance. The experimental results show the effectiveness of this work.

  • Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors

    Ittetsu TANIGUCHI  Praveen RAGHAVAN  Murali JAYAPALA  Francky CATTHOOR  Yoshinori TAKEUCHI  Masaharu IMAI  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E92-A No:4
      Page(s):
    1161-1173

    Low energy and high performance embedded processor is crucial in the future nomadic embedded systems design. Improvement of memory accesses, especially improvement of spatial and temporal locality is well known technique to reduce energy and increase performance. However, after transformations that improve locality, address calculation often becomes a bottleneck. In this paper, we propose novel AGU (Address Generation Unit) exploration and mapping technique based on a reconfigurable AGU model. Experimental results show that the proposed techniques help exploring AGU architectures effectively and designers can get trade-offs of real life applications for about 10 hours.

  • ILP-Based Scheduling for Parallelizable Tasks

    Kana SHIMADA  Shogo KITANO  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1503-1505

    Task scheduling is one of the most important processes in the design of multicore computing systems. This paper presents a technique for scheduling of malleable tasks. Our scheduling technique decides not only the execution order of the tasks but also the number of cores assigned to the individual tasks, simultaneously. We formulate the scheduling problem as an integer linear programming (ILP) problem, and the optimal schedule can be obtained by solving the ILP problem. Experiments using a standard task-set suite clarify the strength of this work.

  • Thermal-Comfort Aware Online Co-Scheduling Framework for HVAC, Battery Systems, and Appliances in Smart Buildings

    Daichi WATARI  Ittetsu TANIGUCHI  Francky CATTHOOR  Charalampos MARANTOS  Kostas SIOZIOS  Elham SHIRAZI  Dimitrios SOUDRIS  Takao ONOYE  

     
    INVITED PAPER

      Pubricized:
    2022/10/24
      Vol:
    E106-A No:5
      Page(s):
    698-706

    Energy management in buildings is vital for reducing electricity costs and maximizing the comfort of occupants. Excess solar generation can be used by combining a battery storage system and a heating, ventilation, and air-conditioning (HVAC) system so that occupants feel comfortable. Despite several studies on the scheduling of appliances, batteries, and HVAC, comprehensive and time scalable approaches are required that integrate such predictive information as renewable generation and thermal comfort. In this paper, we propose an thermal-comfort aware online co-scheduling framework that incorporates optimal energy scheduling and a prediction model of PV generation and thermal comfort with the model predictive control (MPC) approach. We introduce a photovoltaic (PV) energy nowcasting and thermal-comfort-estimation model that provides useful information for optimization. The energy management problem is formulated as three coordinated optimization problems that cover fast and slow time-scales by considering predicted information. This approach reduces the time complexity without a significant negative impact on the result's global nature and its quality. Experimental results show that our proposed framework achieves optimal energy management that takes into account the trade-off between electricity expenses and thermal comfort. Our sensitivity analysis indicates that introducing a battery significantly improves the trade-off relationship.

  • An In-Vehicle Auditory Signal Evaluation Platform based on a Driving Simulator

    Fuma SAWA  Yoshinori KAMIZONO  Wataru KOBAYASHI  Ittetsu TANIGUCHI  Hiroki NISHIKAWA  Takao ONOYE  

     
    PAPER-Acoustics

      Pubricized:
    2023/05/22
      Vol:
    E106-A No:11
      Page(s):
    1368-1375

    Advanced driver-assistance systems (ADAS) generally play an important role to support safe drive by detecting potential risk factors beforehand and informing the driver of them. However, if too many services in ADAS rely on visual-based technologies, the driver becomes increasingly burdened and exhausted especially on their eyes. The drivers should be back out of monitoring tasks other than significantly important ones in order to alleviate the burden of the driver as long as possible. In-vehicle auditory signals to assist the safe drive have been appealing as another approach to altering visual suggestions in recent years. In this paper, we developed an in-vehicle auditory signals evaluation platform in an existing driving simulator. In addition, using in-vehicle auditory signals, we have demonstrated that our developed platform has highlighted the possibility to partially switch from only visual-based tasks to mixing with auditory-based ones for alleviating the burden on drivers.

  • A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers

    Takahiro YAMAMOTO  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  Shigeru YAMASHITA  Yuko HARA-AZUMI  

     
    LETTER

      Vol:
    E100-A No:7
      Page(s):
    1496-1499

    Approximate computing is considered as a promising approach to design of power- or area-efficient digital circuits. This paper proposes a systematic methodology for design and worst-case accuracy analysis of approximate array multipliers. Our methodology systematically designs a series of approximate array multipliers with different area, delay, power and accuracy characteristics so that an LSI designer can select the one which best fits to the requirements of her/his applications. Our experiments explore the trade-offs among area, delay, power and accuracy of the approximate multipliers.