Piezoelectric acoustic waves propagating on glass film/ZnO film/glass substrate structures are theoretically studied. When the thickness of the overgrowth glass film is thin, there exist only the surface waves similar to the Rayleigh waves propagating on ZnO/glass structures. With increasing the overgrowth thickness, there appear the boundary waves, whose particle displacement and electric potential become large at the ZnO layer. The velocity dispersion (velocity vs. ZnO thickness) curve changes very much with increasing the glass thickness, and there appear both dispersive and non-dispersive regions, which correspond to the boundary and surface waves, respectively.

This paper, presents an extended B-tree data structure and a series of algorithms for satisfying a new requirement of manipulating the concurrent group data at real time. By new algorithm the amount of readings and writings in the manipulation has been decreased greatly, and the efficiency of storage utilization has been increased. Discussion indicates that a database formed by the new data structure and new algorithm has the advantages of a lower tree height, a better efficiency of page utilization, and a little cost of operating overhead as compared to a database formed by B-tree and general algorithm.

This paper shows a collision free hash function which is based on the r-th residue cryptosystem (not based on the claw free pairs). In the proposed method, finding a collision pair is as hard as factorization.

A high performance multichip package (MCP) which consists of a multilayer substrate (MLS) and GaAs devices has been developed for supercomputer. The MLS is 100 mm100 mm size and fabricated with polyimide dielectric layers and 7 Cu/Ni thin film conductor layers including 2 signal layers on a wafer. The signal line is 25 µm wide and has 60 µm center to center spacings, the polyimide dielectric layer is 20 µm thick, and the minimum via hole size is 40 µm square. Maximum 21 GaAs devices and 47 Si devices are mounted on the multilayer substrate. The GaAs devices are 16 memory chips and 5 logic chips and are packed in leadless chip carriers (LCCs). LCCs are attached on the substrate by In/Pb soldering technique. Si devices are 52-lead TAB (Tape Automated Bonding) chips and directly attached on the substrate. The multichip package has 408 I/Os and power dissipation is approximately 150 W. This package is immersed in perfluorocarbon liquid and cooled by forced convection. The cooling capacity is studied by varing flow rate from 2 to 10 cm/s and confirmed to be sufficient to cool this high performance package. All the devices can be operated below 70. These new packaging technologies realized system performance over 10 GFOLPS, which is the world's highest.

An improvement is made on the previously proposed preambleless demodulation method based on FFT(Fast Fourier Transform) technique(1), in order to cope with a short-term frequency variation caused by an acceleration of a vehicle in mobile communications. The major modification to the previous method is an introduction of a novel phase synchronizer which can synchronize to a signal having a short-term frequency variation. In the mobile communications, the carrier frequency of the received carrier may vary in a short-term because of an acceleration of a vehicle, a rolling of a ship and the like. A carrier synchronization for a burst signal under such an environment would be quite involved and a countermeasure is imperative for the short-term frequency variation. In order to cope with the short-term frequency variation within a received burst, this paper proposes a novel phase synchronizer based on iterative use of a PLL. The phase synchronizer repeats a carrier pull-in process back and forth consecutively along the buffered burst signal. After a forward or backward pull-in process, a value of short-term frequency variation is calculated from a change in an internal state of the PLL. Then this value is used as a new initial state for the next pull-in process which proceeds to the reverse direction to correct the short-term frequency variation is in the burst. By executing this sequence several times, the PLL can complete carrier synchronization regardless of the amount of frequency variation in a burst. The parameter design of the improved preambleless demodulation method incorporating the newly proposed phase synchronizer is performed for the INMARSAT-C signalling channel as a good example of the burst mode channel which suffers a short-term frequency variation. The preambleless demodulation method with the designed parameters shows a good performance under an anticipated operating environment.

A new algorithm for acoustic echo cancellation called frequency bin adaptive filtering (FBAF) is derived. The FBAF algorithm is based on decomposition of the BLMS algorithm. The FBAF achieves the same cancellation performance as the conventional frequency domain adaptive filtering (FDAF). Both computational complexity and annoying transmission delay are reduced in the FBAF structure as compared with the time domain adaptive filtering and the FDAF, respectively. For input correlated signal, an efficient method for normalizing the step size in the FBAF algorithm is introduced to speed up the convergence rate. The unconstrained FBAF is presented with even fewer FFT operations and consequently less computational load with the price of lowering speed of convergence. A hybrid structure for trading off between system complexity and convergence speed is also presented.

This paper presents solder paste rheology and its printability. Evaluating rheology of solder paste can help to solve problems in the fine pattern printing of solder paste. To quantify the solder paste rheology, viscosity, thixotropy index and viscosity restoration ratio were measured. For these measurements, six test samples of solder paste were prepared. These characteristics can be measured by changing shear rate of viscometer in several steps. Viscosity of solder paste lowers as shear rate increases. Low shear rate viscosity and high shear rate viscosity were calculated from viscosity and thixotropy indexes. These rheological characteristics are closely related to the printing quality. Printability of the solder pastes was evaluated by experimental procedure with a fine pitch QFP (Quad Flat Package) foot print test pattern. The Taguchi method was used in this printing experiment. Analysis of variance were performed to examine factors influencing printability. Evaluated items of printability were short deposit defect, bridge defect, line width increase ratio and rolling effect. Correlation analysis between rheological characteristics and printability of solder paste was performed. Results give a suggestive theoretical zone for good printing quality, that was figured out on the thixotropy index vs. viscosity plot. Its center point is 1800 [Poise] of viscosity and 0.6 of the thixotropy index. Evaluating rheology of solder paste is important when the printability of solder paste in fine pitch technology is concerned.

This paper describes the implementation and evaluation of the switching network equipment of a 620-Mb/s circuit-switching system, which will economically provide both 4-MHz bandwidth television and high-definition television services. A bit-synchronization LSI capable of handling 52-Mb/s, 155-Mb/s, and 620-Mb/s input signals was developed for this equipment. This LSI together with a 1.5-Gb/s space-division switch LSI and high-speed physical design technology were used in constructing a prototype. A feature of this prototype is that it is designed with multiple printed circit boards which plug into a back panel. Although a switching board that can deal with over 620 Mb/s has previouly been developed, such an implementation is new. Evaluation of the prototype shows that it satisfies the system objectives.

This paper describes a high-speed multichip (3232 space-division) switching module for high-definition TV broadcasting and switching systems. This newly developed module employs new Si-bipolar SST switching LSIs and a multi-layer substrate with a polyimide dielectric and a fine pattern of copper conductors. This substrate contains matrix-shaped thin film registers for terminated transmission and a spiral via hole structure to increase fabrication reliability. The module has 50 ohm characteristic impedance transmission lines with a deviation of less than 2.5%. The multichip module can handle a signal speed of 1.8 Gb/s using 1 : 1 and 1 : n connections. This technology allows a dramatic reduction in module size to 1/20 of that possible with conventional surface-mounted techniques.

The differential cryptanalysis method developed by E. Biham et al. presented a new index of cryptographic strength, i.e. signal to noise ratio (S/N). Their paper estimates S/N only for DES-like functions, i.e., cryptographic function based on iterating the same weak function n times. Other types such as including both stronger and weaker functions have not yet been examined. This paper examines the N-stage MULTI2 cipher algorithm to calculate S/N and shows there are many fast cipher algorithms having small S/N property.

This paper presents a new ceramic package for high-frequency MMIC modules. The package is formed from a multilayer ceramic frame whose layers are metallized over most of both sides and co-fired. The inside and outside of the frame are metallized, except around the RF and DC terminals. This new package structure can eliminate ring resonances that occur in conventional ceramic packages and can provide high I/O isolation over a wide frequency range. The RF terminal is formed from microstrip lines and a through-wall microstrip designed to have a 50-ohm impedance. The insertion loss of each RF terminal is less than 0.5 dB up to 33 GHz, with complementary I/O isolation in excess of 30 dB. The new package also provides the low input V.S.W.R. of 1.3 : 1. A 30-GHz-band MMIC module incorporating four GaAs MMIC amplifiers is demonstrated. This module's maximum gain is 19 dB, and its input V.S.W.R. is 1.5 : 1 from 30.5 to 32.5 GHz.

Most number-theoretic cryptosystems are constructed based on a modular exponentiation, which requires a large number of processing steps. Therefore, one of the most significant problems in cryptographic research is how to reduce the time needed to carry out a modular exponentiation operation. This paper proposes an improved modular exponentiation algorithm using a new table-look-up method. On executing a modular exponentiation computation, first, it must be decomposed efficiently into a series of modular multiplications. For this decomposition, the Binary method is used in this paper. When the Binary method is so implemented as to process the exponent in the-most-significant-bit-first manner, multiplier M, as well as modulus N, can also be considered as a common constant in 1/3 of the decomposed modular multiplications. Thus, with some additional procedure, one can compute beforehand the residues concerning M and N. This makes it possible to process the multiplication and reduction simultaneously. This algorithm is faster than conventional ones which take into account only that the modulus N can be considered a constant. The effectiveness of the proposed method is investigated with an evaluation model proposed in this paper and evaluated by software implemented on a engineering workstation and on a digital signal processor. The evaluation model indicates that the proposed method reduces the execution time by 17% compared with a conventional table-look-up method, if bit length k of modulus N is sufficiently large. The corresponding figure in the computer simulation is 14% for k=512.

In this paper a new 16-ary Differentially Encoded Quadrature Amplitude (16-DEQAM) demodulator for medium and high bit rate (from 2 MBit/s to 100 MBit/s) Land Mobile Satellite Communications is proposed and its performance is evaluated. The synchronization and detection digital techniques employed in this system are described. The hardware speed limitations have been overcome effectively with extensive use of look-up tables and concurrent digital signal processing on polar signal representation. The acquisition and Bit Error Rate(BER) performances are evaluated by computer simulation over Additive White Gaussian Noise (AWGN) and Rician fading channel.

This paper analyzes performances of trellis coded(TC) 8PSK modulation in Rician fading channels to optimize parameters of Viterbi decoders. The computer simulation clarifies that when carrier power to multipath power ratio (C/M) equals 10dB, Pe performance with reasonable length interleaving depends on free Euclidean distance (dfree) but not on effective code length(ECL) in a practical range of bit error probability (Pe= 10-3-10-4). In the case of C/M=5dB, the effect of ECL appears in the range of bit energy to noise power density ratio (Eb/No)C/M (=5dB). Therefore, for domestic mobile satellite communication systems for non-high latitude countries, only dfree must be considered for TC8PSK Viterbi decoder design. Moreover, to improve Pe performance in slow fading environment, pre-Viterbi-decoding maximal ratio combining is proposed. The proposed diversity scheme improves required Eb/No to achieve Pe=10-4 by more than 6dB compared with no interleaving and more than 2.5 dB compared with interleaving.

In this letter, we discuss the conspiracy problem of the ID-based cryptosystem. The trap by Shalkwijk coding is shown to be ineffective against Euclidean attack. Moreover, we clarify that Euclidean attack is equivalent to the integer solution of an over-sized matrix equation by which the generalized Tanaka's scheme may be easily and efficiently broken.

Thin-film multichip modules fabricated by chip-on-wafer (COW) technology have been developed for high performance systems. Copper/polyimide thin-film wiring layers are fabricated on a silicon substrate. LSI chips with copper-cored solder bumps (CCSBs) are flip-chip bonded to the silicon substrate. The substrate is housed in a co-fired aluminum nitride (AlN) ceramic package to enhance thermal reliability. The electrical properties, such as the characteristic impedance and crosstalk noise, of the copper/polyimide wiring substrate were examined. Experimental results have shown that the substrate can propagate high-speed signals exceeding 100 MHz. Next, this combination of a large silicon substrate and an AlN package was investigated thermally and mechanically. The results of warping tests and thermal cycling tests show that AlN is an excellent packaging material for silicon-based multichip modules. A digital signal processing module has been developed as an example of a high-performance multichip module.

Data compaction and data expansion methods for an electron beam direct writing system EBM-130V are described. EBM-130V adopts the raster scan method using a variably shaped line beam. The system does not have an effective hierarchical structure in its data format, because it has only a single deflector. So, an extra virtual layer has been introduced into the EB data format, and an artificial hierarchical data structure is used for data compaction. The compacted data is expanded by an EB control software system. For a 4 Mbit DRAM, the data amount was about 30 MBytes (compaction rate 1/16), the data conversion time was about 12 minutes (reduction rate 1/35), and the data transfer time from the system disk to the pattern data memory was reduced to about 1/5, by using the date compaction method.

We discuss how to design mechanically an information processing system presented with two independent requirements, one of which shows information flow to perform some process and one which prohibits illegal information flow. To do this, we introduce one well-known security model the "Bell and LaPadula model" and formulate this design problem. This problem then becomes a security level assignment problem. We show that the design possibilities and level assignment can be mechanically solved by expressing the inequalities in graph theoretical form and by using an analytical method of graph theory.