In general-synchronous framework, in which the clock is distributed periodically to each register but not necessarily simultaneously, circuit performance is expected to be improved compared to complete-synchronous framework, in which the clock is distributed periodically and simultaneously to each register. To improve the circuit performance more, logic synthesis for general-synchronous framework is required. In this paper, under the assumption that any clock schedule is realized by an ideal clock distribution circuit, when two or more cell libraries are available, a technology mapping method which assigns a cell to each gate in the given logic circuit by using integer linear programming is proposed. In experiments, we show the effectiveness of the proposed technology mapping method.

A novel resilient coarse granularity optical routing network architecture that adopts finely granular protection and finely granular add/drop is presented. The routing scheme defines optical pipes such that multiple optical paths can be carried by each pipe and can be dropped or added at any node on the route of a pipe. The routing scheme also makes it possible to enhance frequency utilization within pipes, by denser path packing in the frequency domain, as we recently verified. We develop a static network design algorithm that simultaneously realizes the independence of working and backup paths and pipe location optimization to efficiently carry these paths. The design algorithm first sequentially accommodates optical paths into the network, then tries to eliminate sparsely utilized fibers and iteratively optimizes frequency slot/wavelength assignment in each coarse granular pipe so as to limit the impairment caused by dropping the optical paths adjacent in the frequency domain. Numerical experiments elucidate that the number of fibers in a network can be reduced by up to 20% for 400Gbps channels without any modification in hardware.

A frequency-reconfigurable dipole antenna, whose dual resonant frequencies are independently controlled, is introduced. The antenna's conductor consists of radiating conductors, lumped and distributed elements, and varactors. To design the antenna, current distribution, input impedance, and radiation power including higher-order modes, are analyzed for a narrow-angle sectorial antenna embedded with passive elements. To derive the formulae used, radiation power is analyzed in two ways: using Chu's equivalent circuit and the multipole expansion method. Numerical estimations of electrically small antennas show that dual-band antennas are feasible. The dual resonant frequencies are controlled with the embedded series and shunt inductors. A dual-band antenna is fabricated, and measured input impedances agree well with the calculated data. With the configuration, an electrically small 2.5-/5-GHz dual-band reconfig-urable antenna is designed and fabricated, where the reactance values for the series and shunt inductors are controlled with varactors, each connected in series to the inductors. Varying the voltages applied to the varactors varies the measured upper and lower resonant frequencies between 2.6 and 2.9GHz and between 5.1 and 5.3GHz, where the other resonant frequency is kept almost identical. Measured radiation patterns on the H-plane are almost omni-directional for both bands.

A parallel Aho-Corasick (AC) approach, named PAC-k, is proposed for string matching in deep packet inspection (DPI). The proposed approach adopts graphic processing units (GPUs) to perform the string matching in parallel for high throughput. In parallel string matching, the boundary detection problem happens when a pattern is matched across chunks. The PAC-k approach solves the boundary detection problem because the number of characters to be scanned by a thread can reach the longest pattern length. An input string is divided into multiple sub-chunks with k characters. By adopting the new starting position in each sub-chunk for the failure transition, the required number of threads is reduced by a factor of k. Therefore, the overhead of terminating and reassigning threads is also decreased. In order to avoid the unnecessary overlapped scanning with multiple threads, a checking procedure is proposed that decides whether a new starting position is in the sub-chunk. In the experiments with target patterns from Snort and realistic input strings from DEFCON, throughputs are enhanced greatly compared to those of previous AC-based string matching approaches.

Software defined networking (SDN) and OpenFlow, which enables the abstraction of vendor/technology-specific attributes, improve the control and management flexibility of optical transport networks. In this paper, we present an interoperability demonstration of SDN/OpenFlow-based optical path control for multi-domain/multi-technology optical transport networks. We also summarize the abstraction approaches proposed for multi-technology network integration at SDN controllers.

Two plasmonic band-bass filters are analyzed: one is a grating-type filter and the other is a slit-type filter. The former shows a band-pass characteristic with a high transmission for a two-dimensional structure, while the latter exhibits a high transmission even for a three-dimensional structure with a thin metal layer.

We have proposed and demonstrated the principle of optical mode switch. However, the crosstalk between modes has not yet reported due to the difficulty of mode recognition and distinction. To accomplish this mode crosstalk evaluation, we integrated multimode interference (MMI) mode filter with the optical mode switch in this work. As a result, for the both TE and TM modes, the crosstalk of approximately -10 dB has been evaluated experimentally.

This paper describes a blind frequency offset estimator (FOE) with wide frequency range for coherent quadrature amplitude modulation (QAM) receivers. The FOE combines a spectrum-based frequency offset estimation algorithm as a coarse estimator with a frequency offset estimation algorithm using the periodogram as a fine estimator. To establish our design methodology, each block of the FOE is rigorously analyzed by using formulas and the minimum fast Fourier transform (FFT) size that generates a frequency spectrum for both the coarse and fine estimators is determined. The coarse estimator's main feature is that all estimation processes are carried out in the frequency domain, which yields convergence more than five times faster than that of conventional estimators. The estimation frequency range of the entire FOE is more than 1.8 times wider than that of conventional FOEs. Experiments on coherent optical 64-ary QAM (64-QAM) reveal that frequency offset estimation can be achieved under a frequency offset value greater than the highest value of the conventional estimation range.

FDTD (Finite-Difference Time-Domain) method has been widely used for the analysis of photonic devices consisting of sub-wavelength structures. In recent years, increasing efforts have been made to implement the FDTD on GPGPUs (General-Purpose Graphic Processing Units), to shorten simulation time. On the other hand, it is widely recognized that most of the middle- and low-end GPGPUs have difference of computational performance, between single-precision and double-precision type arithmetics. Therefore the type selection of single/double precision for electromagnetic field variables in FDTD becomes a key issue from the viewpoint of the total simulation performance. In this study we investigated the difference of results between the use of single-precision and double-precision. As a most fundamental sub-wavelength photonic structure, we focused on an alternating multilayer (one dimensional periodic structure). Obtained results indicate that significant difference appears for the amplitudes of higher order spatial harmonic waves.

Reconfigurable architectures have emerged as an optimal choice for the hardware realization of digital signal processing (DSP) algorithms. Reconfigurable architecture is either fine-grained or coarse-grained depending on the granularity of reconfiguration used. The flexibility offered by fine-grained devices such as field programmable gate array (FPGA) comes at a significant cost of huge routing area, power consumption and speed overheads. To overcome these issues, several coarse-grained reconfigurable architectures have been proposed. In this paper, a scalable and hybrid dynamically reconfigurable architecture, HyDRA, is proposed for efficient hardware realization of computation intensive DSP algorithms. The proposed architecture is greatly influenced by reported VLSI architectures of a variety of DSP algorithms. It is designed using parameterized VHDL model which allows experimenting with a variety of design features by simply modifying some constants. The proposed architecture with 8×8 processing element array is synthesized using UMC 0.25µm and LF 150nm CMOS technologies respectively. For quantitative evaluation, the architecture is also realized using Xilinx Virtex-7 FPGA. The area and timing results are presented to provide an estimate of each block of the architecture. DSP algorithms such as 32-tap finite impulse response (FIR) filters, 16-point radix-2 single path delay feedback (R2SDF) fast fourier transform (FFT) and R2SDF discrete cosine transform (DCT) are mapped and routed on the proposed architecture.

A vocoder-based speech synthesis system, named WORLD, was developed in an effort to improve the sound quality of real-time applications using speech. Speech analysis, manipulation, and synthesis on the basis of vocoders are used in various kinds of speech research. Although several high-quality speech synthesis systems have been developed, real-time processing has been difficult with them because of their high computational costs. This new speech synthesis system has not only sound quality but also quick processing. It consists of three analysis algorithms and one synthesis algorithm proposed in our previous research. The effectiveness of the system was evaluated by comparing its output with against natural speech including consonants. Its processing speed was also compared with those of conventional systems. The results showed that WORLD was superior to the other systems in terms of both sound quality and processing speed. In particular, it was over ten times faster than the conventional systems, and the real time factor (RTF) indicated that it was fast enough for real-time processing.

To provide basic considerations for the realization of method for suppressing the EMI from differential-paired lines on flexible printed circuits (FPC), the characteristics of the SI performance and shielding effectiveness (SE) of shielded-flexible printed circuits for differential-signaling are investigated in this paper experimentally and by a numerical modeling. Firstly, transmission characteristics of TDR measurement and frequency response of |Sdd21| are discussed, from view point of signal integrity. Secondly, as the characteristics of the SE performance for EMI, frequency responses of magnetic field are investigated. Although placement of conductive shield near the paired-lines decreases characteristics impedance, |Sdd21| for the “with Cu 5.5 µm-thickness copper shield” is not deteriorated compared with “without shield” and sufficient SE performance for magnetic field can be established. But, thin-shield deteriorates SI as well as SE performances. The frequency response of |Sdd21| at higher frequencies for the “Ag 0.1 µm” case has the steep loss roll off. A reflection loss resulted from impedance-mismatching is not dominant factor of the losses. The dominant factor may be magnetic field leakage due to very thin-conductive shield.

Visual tracking has been studied for several decades but continues to draw significant attention because of its critical role in many applications. Recent years have seen greater interest in the use of correlation filters in visual tracking systems, owing to their extremely compelling results in different competitions and benchmarks. However, there is still a need to improve the overall tracking capability to counter various tracking issues, including large scale variation, occlusion, and deformation. This paper presents an appealing tracker with robust scale estimation, which can handle the problem of fixed template size in Kernelized Correlation Filter (KCF) tracker with no significant decrease in the speed. We apply the discriminative correlation filter for scale estimation as an independent part after finding the optimal translation based on the KCF tracker. Compared to an exhaustive scale space search scheme, our approach provides improved performance while being computationally efficient. In order to reveal the effectiveness of our approach, we use benchmark sequences annotated with 11 attributes to evaluate how well the tracker handles different attributes. Numerous experiments demonstrate that the proposed algorithm performs favorably against several state-of-the-art algorithms. Appealing results both in accuracy and robustness are also achieved on all 51 benchmark sequences, which proves the efficiency of our tracker.

This paper presents a novel defense scheme for DDoS attacks that uses an image processing method. This scheme especially focused on the prevalence of adjacent neighbor spoofing, called subnet spoofing. It is rarely studied and there is few or no feasible approaches than other spoofing attacks. The key idea is that a “DDoS attack with IP spoofing” is represented as a specific pattern such as a “line” on the spatial image planes, which can be recognized through an image processing technique. Applying the clustering technique to the lines makes it possible to identify multiple attack source networks simultaneously. For the identified networks in which the zombie hosts reside, we then employ a signature-based pattern extraction algorithm, called a pivoted movement, and the DDoS attacks are filtered by correlating the IP and media access control pairing signature. As a result, this proposed scheme filters attacks without disturbing legitimate traffic. Unlike previous IP traceback schemes such as packet marking and path fingerprinting, which try to diagnose the entire attack path, our proposed scheme focuses on identifying only the attack source. Our approach can achieve an adaptive response to DDoS attacks, thereby mitigating them at the source, while minimizing the disruption of legitimate traffic. The proposed scheme is analyzed and evaluated on the IPv4 and IPv6 network topology from CAIDA, the results of which show its effectiveness.

Personal Wi-Fi Hotspot, the Wi-Fi tethering function, is widely deployed on mobile devices to allow other wireless clients to share Internet access via a broadband connection. Its advantages include no connection fee and support of non-3G/LTE devices. However, utilizing this function can rapidly deplete the battery power of the tethering device because both interface connections (3G/LTE and Wi-Fi) are always on. To address this problem, this paper proposes the Energy Management Mechanism for Wi-Fi Tethering Mode on Mobile Devices (EMWT). The mechanism is designed to effectively manage both interfaces by adjusting certain sleep durations according to the incoming traffic. Short, Long, and Deep sleep durations are introduced for saving energy. EMWT can also guarantee the packet delay bound by limiting the maximum sleep period. Five traffic rates, composed of very low, low, medium, high, and very high, are evaluated. NS-3 simulation results reveal that energy savings of up to 52.52% can be achieved with only a slight impact on system performance, in terms of end-to-end delay, throughput, and packet loss.

Heterogeneous network (HetNet) is now considered to be a promising technique for enhancing the coverage and reducing the transmit power consumption of the next 5G system. Deploying small cells such as femtocells in the current macrocell networks achieves great spatial reuse at the cost of severe cross-tier interference from concurrent transmission. In this situation, two novel energy efficient power control and resource allocation schemes in terms of energy efficiency (EE)-fairness and EE-maximum, respectively, are investigated in this paper. In the EE-fairness scheme, we aim to maximize the minimum EE of the femtocell base stations (FBSs). Generalized Dinkelbach's algorithm (GDA) is utilized to tackle this optimization problem and a distributed algorithm is proposed to solve the subproblem in GDA with limited intercell coordination, in which only a few scalars are shared among FBSs. In the EE-maximum scheme, we aim to maximize the global EE of all femtocells which is defined as the aggregate capacity over the aggregate power consumption in the femtocell networks. Leveraged by means of the lower-bound of logarithmic function, a centralized algorithm with limited computational complexity is proposed to solve the global EE maximization problem. Simulation results show that the proposed algorithms outperform previous schemes in terms of the minimum EE, fairness and global EE.

Recently, multi-user multiple-input multiple-output (MU-MIMO) systems are being widely studied. For interference cancellation, MU-MIMO commonly uses spatial precoding techniques. These techniques, however, require the transmitters to have perfect knowledge of the downlink channel state information (CSI), which is hard to achieve in high mobility environments. Instead of spatial precoding, a collaborative interference cancellation (CIC) technique can be implemented for these environments. In CIC, mobile stations (MSs) collaborate and share their received signals to increase the demultiplexing capabilities. To obtain efficient signal-exchange between collaborating users, signal selection can be implemented. In this paper, a signal selection scheme suitable for a QRM-MLD algorithm is proposed. The proposed scheme uses the minimum Euclidean distance criterion to obtain an optimum bit error rate (BER) performance. Numerical results obtained through computer simulations show that the proposed scheme is able to provide BER performance near to that of MLD even when the number of candidates in QRM-MLD is relatively small. In addition, the proposed scheme is feasible to implement owing to its low computational complexity.

Performance evaluation of an improved multiband impulse radio ultra-wideband (MIR UWB) system based on sub-band selection is proposed in this paper. In the improved scheme, a data mapping algorithm is introduced to a conventional MIR UWB system, and out of all the sub-bands, only partial ones are selected to transmit information data, which can improve the flexibility of sub-bands/spectrum allocation, avoid interference and provide a variety of data rates. Given diagrams of a transmitter and receiver, the exact bit error rate (BER) of the improved system is derived. A comparison of system performance between the improved MIR UWB system and the conventional MIR UWB system is presented in different channels. Simulation results show that the improved system can achieve the same data rate and better BER performance than the conventional MIR UWB system under additive white Gaussian noise (AWGN), multipath fading and interference coexistence channels. In addition, different data transmission rates and BER performances can be easily achieved by an appropriate choice of system parameters.

As technology further scales semiconductor devices, aging-induced device degradation has become one of the major threats to device reliability. Hence, taking aging-induced degradation into account during the design phase can greatly improve the reliability of the manufactured devices. However, accurately estimating the aging effect for extremely large circuits, like processors, is time-consuming. In this research, we focus on the negative bias temperature instability (NBTI) as the aging-induced degradation mechanism, and propose a fast and efficient way of estimating NBTI-induced delay degradation by utilizing static-timing analysis (STA) and simulation-based lookup table (LUT). We modeled each type of gates at different degradation levels, load capacitances and input slews. Using these gate-delay models, path delays of arbitrary circuits can be efficiently estimated. With a typical five-stage pipelined processor as the design target, by comparing the calculated delay from LUT with the reference delay calculated by a commercial circuit simulator, we achieved 4114 times speedup within 5.6% delay error.

We propose a novel single polarization photonic band gap fiber (SP-PBGF) with an anisotropic air hole lattice in the core. An SP-PBGF with an elliptical air hole lattice in the core recently proposed can easily realize SP guidance utilizing the large difference of cutoff frequency for the x- and y-polarized modes. In this paper, in order to achieve SP guidance based on the same principle of this PBGF, we utilize an anisotropic lattice of circular air holes instead of elliptical air holes to ease the fabrication difficulty. After investigating the influence of the structural parameters on SP guidance, it is numerically demonstrated that the designed SP-PBGF has 381 nm SP operating band.