This letter addresses a neural network (NN)-based predictor for the LP (Linear Prediction) residual. A new NN predictor takes into consideration not only prediction error but also quantization effects. To increase robustness against the quantization noise of the nonlinear prediction residual, a constrained back propagation learning algorithm, which satisfies a Kuhn-Tucker inequality condition is proposed. Preliminary results indicate that the prediction gain of the proposed NN predictor was not seriously decreased even when the constrained optimization algorithm was employed.

The Fat-Btree which is a new parallel B-tree structure has been proposed to improve the access performance of shared-nothing parallel database systems. Since the Fat-Btree has only a part of index nodes on each processing element, it can reduce the synchronization cost in update operations. For these reasons, both retrieval and update operations can be processed at high throughput compared to previously proposed parallel B-tree structures for shared-nothing computers. Though we tried to apply some conventional concurrency control methods to the Fat-Btree, e.g., B-OPT and ARIES/IM, which were designed for shared-everything machines, we found that these methods are not always appropriate for the Fat-Btree. In this paper, it is shown that the conventional methods are not suitable for the Fat-Btree and other parallel B-trees. We propose a new deadlock free concurrency control protocol, named INC-OPT, to improve the performance of the Fat-Btree more effectively than the B-OPT and ARIES/IM. Furthermore, in order to prove that the Fat-Btree provides the impact on the performance of shared-nothing parallel databases, we compare the real performance of three types of parallel B-tree structures, Fat-Btree, Copy-Whole-Btree, and Single-Index-Btree, on an nCUBE3 machine where the INC-OPT is applied.

This paper describes low-power and low-voltage analog circuit techniques applicable to deep sub-micron LSIs in baseband and RF signal processing. The trends indicate that reductions in the supply voltage are inevitable, that power dissipation will not become sufficiently low, and that performance will improve continuously. Some circuit techniques currently being used to achieve these goals are reviewed. Next, three trial approaches are introduced. The first of these is a 1 V operational video-speed CMOS sample-and-hold IC. The second is a 1 V operational high-frequency CMOS VCO circuit. Finally, a step-down DC-DC converter IC with a 1 V output and a greater than 80% power efficiency is introduced. These approaches prove that the low-power and low-voltage operation of analog circuits can be realized without sacrificing performance.

Guideline effects on the movement accuracy in virtual torus spaces with various guidelines are investigated by means of moving deviations from an indicated path. Guidelines with various widths are set at the center or the sides (upper, lower, left and right) in virtual torus spaces. Participants travel at a constant velocity in full-sized virtual torus spaces for various guideline conditions. It is shown that there exists a tendency that moving deviations from the indicated path are more reduced as the guideline width becomes narrower and the movement accuracy is improved. For example, in the case of side guidelines with the width of 10 cm or less, the mean value of moving deviations is approximately reduced to half of that with no guidelines. By setting side guidelines, the value of the standard deviation of moving deviations is approximately reduced to 2/3 of that with no guidelines.

In this paper, we investigate the optimal assignment problem of cells in PCS (Personal Communication Service) to switches on a ATM (Asynchronous Transfer Mode) network. Given cells and switches on an ATM network (whose locations are fixed and known), the problem is to group cells into clusters and assign these clusters to switches in an optimum manner. This problem is modeled as a complex integer programming problem. Since finding an optimal solution of this problem is NP-hard, a heuristic solution model consists of three phases (Cell Pre-Partitioning Phase, Cell Exchanging Phase, and Cell Migrating Phase) is proposed. Experimental results show that Cell Exchanging and Cell Migrating Phases can really reduce total cost near 44% on average.

In this paper, we present new stability conditions for a class of large-scale hybrid dynamical systems composed of a number of interconnected hybrid subsystems. The stability conditions are given in terms of discontinuous Lyapunov functions of the stable hybrid subsystems. Furthermore, the stability conditions are represented by LMIs (Linear Matrix Inequalities) which are computationally tractable.

This paper suggests that a watermarking technique based on the number theoretic transform (NTT) may effectively be employed for detecting alterations on lossless digital master images. Due to its fragility, the NTT-based technique is sensitive to detecting alterations, compared with that based on the discrete Fourier transform (DFT).

To classify the significant wavelet coefficients into edge area and noise area, a morphological clustering filter applied to wavelet shrinkage is introduced. New methods for wavelet shrinkage using morphological clustering filter are used in noise removal, and the performance is evaluated under various noise conditions.

This paper proposes an asymmetric bandwidth access network based on super-dense wavelength-division multiplexing (SD-WDM) technologies; the network guarantees 100 Mbps upstream and 1 Gbps downstream bandwidth to each user and supports wide-area transmission. The network minimizes operation and administration costs by consolidating switching equipment, as well as minimizing wavelength monitoring/stabilization functions by employing two technologies; the optical multi-carrier supply module (OCSM) for creating downstream signals and the directly modulated spectrum slicing scheme for creating upstream signals. After describing the configuration and features of the presented network, we demonstrate a bandwidth guaranteed network for each of 64 users with 100 Mbps upstream and 1 Gbps downstream bandwidth. The network provides 10-km access lines with under 7-dB loss from users to the access node and a 120-km metro-loop transmission line with under 25-dB loss from the access node to the center node.

Problems concerning a phase-locked loop (PLL) fabricated by a deep-sub-micron process were investigated, and a high-speed self-calibration technique for tuning a voltage-controlled oscillator (VCO) frequency range automatically was developed. The self-calibration technique can measure VCO frequency in short time by comparing intervals between a PLL reference and a VCO output. Furthermore, a loop-filter bypassing method was also used to change the calibration frequency in short time. At 0.7 V and 200 MHz, the prototype PLL has a calibration time of 1.4 µs and a total settling time of 10 µs, which are adequate for microprocessor applications. Moreover, the PLL has a cycle-to-cycle jitter of 142 ps and a power consumption of 470 µW.

A novel formulation for the Scalar-field approach of Integral Equation formulation of the Measured Equation of Invariance (SIE-MEI) is derived from the scalar reciprocity relation to solve the scalar Helmholtz equation. The basics of this formulation are similar to IE-MEI method for the electromagnetic (EM) problem. The surface integral equation is derived from reciprocity relation and on-surface MEI postulates are used. As a result it generates a sparse linear system with the same number of unknowns as of Boundary Element Method (BEM) and keeps the merits in minimum storage memory requirements and CPU time consumption for computing the final matrix. IE-MEI method has been proposed for two-dimensional (2D) electromagnetic problem, but three-dimensional (3D) problem is very difficult to be extend. This scalar-field approach of IE-MEI method is identical to electromagnetic in 2D, but easily extended to the 3D scalar-field scattering problem contrary to EM problem. The numerical results of sphere and cube are verified with some rigorous or numerical solutions, which give excellent agreement.

The effect of subarray size (equal to the order of the prediction model plus one) on the estimation performance of a previously proposed forward-backward linear prediction (FBLP) based cyclic method is investigated. This method incorporates an overdetermined FBLP model with a subarray scheme and is used to estimate the directions-of-arrival (DOAs) of coherent cyclostationary signals impinging on a uniform linear array (ULA) from the corresponding polynomial or spectrum formed by the prediction coefficients. However, the decorrelation is obtained at the expense of a reduced working array aperture, as it is with the spatial smoothing (SS) technique. In this paper, an analytical expression of the mean-squared-error (MSE) of the spectral peak position is derived using the linear approximation for higher signal-to-noise ratio (SNR). Then the subarray size that minimizes this approximate MSE is identified. The effect of subarray size on the DOA estimation is demonstrated and the theoretical analysis is substantiated through numerical examples.

Pilot-aided adaptive prediction channel estimation is proposed for coherent detection in a frequency-nonselective fading channel. It is an extension of the conventional weighted multi-slot averaging (WMSA) channel estimation and consists of 3 steps. A block of Np pilot symbols is periodically transmitted, each pilot block being followed by Nd data symbols to form a data slot. In the first step, the instantaneous channel gain is estimated by coherent addition of Np pilot symbols. Using the K past and K future estimated instantaneous channel gains, the second step predicts the instantaneous channel gains at the end and beginning of data slot of interest by a forward predictor and a backward predictor, respectively. The tap-weights of forward prediction and backward prediction are adaptively updated using the normalized least mean square (NLMS) algorithm. Finally, in the third step, the instantaneous channel gain at each data symbol position within the data slot of interest is estimated by simple averaging or linear interpolation using the two adaptively predicted instantaneous channel gains. The computer simulation confirms that the proposed adaptive prediction channel estimation achieves better bit error rate (BER) performance than the conventional WMSA channel estimation in a fast fading channel and/or in the presence of frequency offset between a transmitter and a receiver.

Adaptive optimization of the notch bandwidth of a lattice-based adaptive infinite impulse response (IIR) notch filter is presented in this paper. The filter is used to improve the performance of a direct sequence spread spectrum (DSSS) binary phase shift keying (BPSK) communication system by suppressing a narrow-band interference at the receiver. A least mean square (LMS) algorithm used to adapt the notch bandwidth coefficient to its optimum value which corresponds to the maximum signal to noise ratio (SNR) improvement factor is derived. Bit error rate (BER) improvement gained by the DSSS communication system using the filter with the optimized notch bandwidth is also shown. Computer simulation results are compared with those obtained analytically to demonstrate the validity of theoretical predictions for various received signal parameters.

We show a method to determine a Steiner Minimum Tree (SMT) and a necessary and sufficient condition that an SMT is a full Steiner tree for three given points in -geometry ( = 3m, m is a positive integer). The -geometry allows only orientations with angles i/ (i and ( 2) are integers), and fill up the gap between the rectilinear geometry ( = 2) and the Euclidean geometry ( = ). An SMT in -geometry ( = 3m) has a similar property to that in the Euclidean geometry. The method to determine an SMT in -geometry is an extension of the well-known method in the Euclidean geometry. The Steiner point in -geometry is any point in the intersection area with a parallelogram and a Steiner locus. Then there are infinite candidate locations of the Steiner point. The Steiner point in the Euclidean geometry is that in -geometry ( = 3m).

In this paper, we present an efficient VLSI architecture for the stand-alone application of a speech recognition system based on discriminative Bayesian neural network (DBNN). Regarding the recognition phase, the architecture of the Bayesian distance unit (BDU) is constructed first. In association with the BDU, we propose a template-serial architecture for the path distance accumulation to perform the recognition procedure. A corresponding architecture is also developed to accelerate the discriminative training procedure. It contains the intelligent look-up table for the sigmoid function. In comparison to the traditional one-table method, the memory size reduces drastically with only slight loss of accuracy. Combining the proposed hardware accelerators with the cost efficient programmable core, we took the most out of both programmable and application-specific architectures, including performance, design complexity, and flexibility.

In this paper, we show that a priori probabilities of information bits can be incorporated into metrics for syndrome decoding. Then it is confirmed that soft-in/soft-out decoding is also possible for syndrome decoding in the same way as for Viterbi decoding. The derived results again show that the two decoding algorithms are dual to each other.

In this paper, a 3 V 8-bit 200MSPS CMOS folding/interpolation Analog-to-Digital Converter is proposed. It employs an efficient architecture whose FR (Folding Rate) is 8, NFB (Number of Folding Block) is 4, and IR (Interpolating Rate) is 8. For the purpose of improving SNR, distributed track and hold circuits are included at the front end of input stage. In order to obtain a high speed and low power operation, an improved dynamic analog latch is proposed. Further, a digital encoder based on a novel thermometer algorithm and a delay error correction algorithm is proposed. The chip has been fabricated with a 0.35 µm 2-poly 3-metal n-well CMOS technology. The effective chip area is 1200 µm 800 µm and it dissipates about 210 mW at 3 V power supply. The INL is within 1 LSB and DNL is within 1 LSB, respectively. The SNR is about 43 dB, when the input frequency is 10 MHz at 200 MHz clock frequency.

This paper proposes a new method of retrieving images from large image databases. The method is based on VQ (Vector Quantization) of local texture features at interest points automatically detected in an image. The texture features are extracted by Gabor wavelet filter bank, and rearranged for rotation. These features are classified by VQ and then construct a pattern histogram. Retrievals are performed by just comparing pattern histograms between images.

An effective spatial resolution enhancement method for distributed strain measurement by BOTDR is proposed. An optical fiber is glued to a structure by a length less than the spatial resolution defined by the pulse width, and the Brillouin spectrum of the light scattered from the glued optical fiber is investigated theoretically. The apparent strain xp observed in the fiber is found to be proportional to the accurate strain a. The ratio r=xp/a coincides with the ratio of the glued length to the spatial resolution. Spatial resolution as small as 0.2 m is demonstrated experimentally for small strains of less than 10-3.