The paper presents a systematic study of in-situ passivated AlN/GaN Metal Insulator Semiconductor Field Effect Transistors (MISFETs) with submicron gates. DC, high frequency small signal, large signal and low frequency dispersion effects are reported. The DC characteristics are analyzed in conjunction with the power performance of the device at high frequencies. Studies of the low frequency characteristics are presented and the results are compared with those of AlGaN/GaN High Electron Mobility Transistors (HEMTs). Small signal measurements showed a current gain cutoff frequency and maximum oscillation frequency of 49.9 GHz and 102.3 GHz respectively. The overall characteristics of the device include a peak current density of 335 mA/mm, peak extrinsic transconductance of 130 mS/mm, a maximum output power density of 533 mW/mm with peak power added efficiency (P.A.E.) of 41.3% and linear gain of 17 dB. The maximum frequency dispersion of transconductance and output resistance of the fabricated MISFETs is 20% and 21% respectively.

Source-drain follower has been designed and implemented for monolithically integrated biosensor array. The circuit acts as a voltage follower, in which a sensing transistor is operated at fixed gate-source and gate-drain voltages. It operates at 10 nW power dissipation. The wide-swing cascode configurations are investigated in constant and non-constant biasing methods. The constant biased cascode source-drain follower has the merit of small cell size. The chip was fabricated using 1.2 µm standard CMOS technology, and a wide range of operation between 1 nW and 100 µW was demonstrated. The accuracy of the voltage follower was 30 mV using minimum sized transistors, due to the variation of threshold voltage. The error in the output except for the threshold voltage mismatch was less than 10 mV. The temperature dependence of the output was 0.11 mV/. To improve the input voltage range and accuracy, non-constant biased cascode source-drain follower is examined. The sensor cell is designed for 10 mV accuracy and the cell size is 105.3µm 81.4 µm in 1.2 µm CMOS design rules. The sensor cell was fabricated and showed that the error in the output except for the threshold voltage mismatch was less than 2 mV in a range of total current between 3 nA and 10 µA and in a temperature range between 30 and 100.

AlN/GaN Metal Insulator Semiconductor Field Effect Transistors (MISFETs) were designed, simulated and fabricated. DC, S-parameter and power measurements were also performed. Drift-diffusion simulations using DESSIS compared AlN/GaN MISFETs and Al32Ga68N/GaN Heterostructure FETs (HFETs) with the same geometries. The simulation results show the advantages of AlN/GaN MISFETs in terms of higher saturation current, lower gate leakage and higher transconductance than AlGaN/GaN HFETs. First results from fabricated AlN/GaN devices with 1 µm gate length and 200 µm gate width showed a maximum drain current density of 380 mA/mm and a peak extrinsic transconductance of 85 mS/mm. S-parameter measurements showed that current-gain cutoff frequency (fT) and maximum oscillation frequency (fmax) were 5.85 GHz and 10.57 GHz, respectively. Power characteristics were measured at 2 GHz and showed output power density of 850 mW/mm with 23.8% PAE at VDS = 15 V. To the authors knowledge this is the first report of a systematic study of AlN/GaN MISFETs addressing their physical modeling and experimental high-frequency characteristics including the power performance.

We investigated the use of AlOx:N/SiNy stacked gate dielectric as an alternate gate dielectric, which were prepared by alternately repeating sub-nanometer deposition of Al2O3 from an alkylamine-stabilized AlH3 + N2O gas mixture and rapid thermal nitridation in NH3. The negative fix charges, being characteristics of almina, were as many as 3.91012 cm-2 in the effective net charge density. The effective dielectric constant and the breakdown field were 8.9 and 8 MV/cm, respectively, being almost the same as pure Al2O3. And we have demonstrated that the leakage current through the AlOx:N/SiNy stacked gate dielectric with a capacitance equivalent thickness (CET) of 1.9 nm is about two orders of magnitude less than that of thermally-grown SiO2. Also, we have confirmed the dielectric degradation similar to the stress-induced leakage current (SILC) mode and subsequent soft breakdown (SBD) reported in ultrathin SiO2 under constant current stress and a good dielectric reliability comparable to thermally-grown ultrahin SiO2. From the analysis of n+poly-Si gate metal-insulator-semiconductor field effect transistor (MISFET) performance, remote coulomb scattering due to changes in the gate dielectric plays an important role on the mobility degradation of MISFET with AlON/SiON gate stack.

RF diamond FETs have been realized on a hydrogen-terminated diamond surface conductive layer. By utilizing the self-aligned gate fabrication process which is effective for the reduction of the parasitic resistance, the transconductance of diamond FETs has been greatly improved. Consequently, the high frequency operation of 22 GHz has been realized in 0.2 µ m gate diamond MISFETs with a CaF2 gate insulator. This value is the highest in diamond FETs and is comparable to the maximum value of SiC MESFETs at present.

Elemental technologies have been studied to establish the healthcare chip which is an intelligent micro analytical system to detect human health markers from a trail of blood. A two steps process for deep quartz dry-etching was discussed in order to overcome the issues of concave-shaped defects at the bottom of grooves. A coating with 2-methacryloyloxyethylphosphorylcholine (MPC) polymer was studied to suppress the adsorption of bio-substance onto the inner wall of the flow channel on chip and good bio-compatibility was achieved for suppression of protein adsorption and blood cell adhesion. A prototype of healthcare chip was fabricated on polyethylene terephthalate (PET) plate using a micro molding technique. Using this chip, the ion concentrations of pH, Na+, K+, Ca++ were successfully measured with embedded ion sensitive field effect transistors (ISFET's).

The fabrication process of a novel Si interface control layer (Si ICL)-based oxide-free insulated gate structure for InP metal-insulator-semiconductor field effect transistors (MISFETs) was successfully characterized and optimized using in-situ reflection of high-energy electron diffraction (RHEED), Raman scattering spectroscopy, X-ray photoelectron spectroscopy (XPS) and capacitance-voltage (C-V) techniques, and applied for fabrication of MISFETs. RHEED observation indicated that the optimum initial thickness of the Si ICL with single crystal pseudomorphic growth of Si on InP is 10 . Raman scattering spectroscopy showed existence of surface strain on InP covered with the Si ICL without changing LO-phonon peak width, indicating that the Si ICL is grown in a pseudomorphic fashion. A detailed XPS analysis showed that Fermi level pinning was largely reduced by the growth of the Si ICL and its partial electron cyclotron resonance (ECR) plasma nitridation realizing an optimum Si ICL thickness of 5 with a good interface to SiNx. C-V measurement confirmed that the optimum Si ICL-based gate formation process realized a full swing of Fermi level almost over the entire bandgap. The fabricated MISFET using the optimum gate structure exhibited excellent gate controllability and stable operation with a low gate leakage currents.