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[Keyword] SC(4570hit)

2721-2740hit(4570hit)

  • Cryptanalysis of Yeh-Shen-Hwang's One-Time Password Authentication Scheme

    Dae Hyun YUM  Pil Joong LEE  

     
    LETTER-Fundamental Theories for Communications

      Vol:
    E88-B No:4
      Page(s):
    1647-1648

    Yeh, Shen, and Hwang recently proposed a secure one-time password authentication scheme using smart cards. They modified the famous S/KEY scheme to achieve security against preplay attacks and off-line dictionary attacks. However, this article shows that their scheme is vulnerable to preplay attacks.

  • A Note on the Complexity of Scheduling for Precedence Constrained Messages in Distributed Systems

    Koji GODA  Toshinori YAMADA  Shuichi UENO  

     
    LETTER-Algorithms and Data Structures

      Vol:
    E88-A No:4
      Page(s):
    1090-1092

    This note considers a problem of minimum length scheduling for a set of messages subject to precedence constraints for switching and communication networks, and shows some improvements upon previous results on the problem.

  • Minimization of Reversible Wave Cascades

    Dimitrios VOUDOURIS  Stergios STERGIOU  George PAPAKONSTANTINOU  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E88-A No:4
      Page(s):
    1015-1023

    In this paper two algorithms for the synthesis and minimization of a CA (cellular array architecture) are proposed. Starting from a completely specified single-output switching function, our methods produce rectangularly shaped arrays of cells, interconnected in chains, with an effort to minimize the number of the produced chains (cascades). This kind of cellular topology is known throughout the bibliography as Maitra cellular arrays. The significance of those algorithms is underlined by the fact that this particular type of cellular architecture can be mapped to reversible circuits and gates (generalized Toffoli gates), which are the type of logic used in quantum circuits. The proposed methodologies include use of ETDDs (EXOR ternary decision diagrams), and switching function decompositions (including new types of boolean expansions).

  • Analysis and Design of Multistage Low-Phase-Noise CMOS LC-Ring Oscillators

    Jaesang LIM  Jaejoon KIM  Beomsup KIM  

     
    PAPER-General Fundamentals and Boundaries

      Vol:
    E88-A No:4
      Page(s):
    1084-1089

    A novel CMOS LC oscillator architecture combining an LC tuned oscillator and a ring structure is presented as a new design topology to deliver improved phase noise for multiphase applications. The relative enhancement in the phase noise is estimated using a linear noise modeling approach. A three-stage LC-ring oscillator fabricated in a 0.6 mm CMOS technology achieves measured phase noise of -132 dBc/Hz at 600 kHz offset from a 900 MHz carrier and dissipates 20 mW with a 2.5 V power supply.

  • Evaluation of Website Usability Using Markov Chains and Latent Semantic Analysis

    Muneo KITAJIMA  Noriyuki KARIYA  Hideaki TAKAGI  Yongbing ZHANG  

     
    PAPER

      Vol:
    E88-B No:4
      Page(s):
    1467-1475

    The development of information/communication technology has made it possible to access substantial amounts of data and retrieve information. However, it is often difficult to locate the desired information, and it becomes necessary to spend considerable time determining how to access specific available data. This paper describes a method to quantitatively evaluate the usability of large-scale information-oriented websites and the effects of improvements made to the site design. This is achieved by utilizing the Cognitive Walkthrough for the Web and website modeling using Markov chains. We further demonstrate that we can greatly improve usability through simple modification of the link structure by applying our approach to an actual informational database website with over 40,000 records.

  • A 300-MHz-Band, Sub-1 V and Sub-1 mW CMOS SAW Oscillator Suitable for Use in RF Transmitters

    Minoru KOZAKI  Norio HAMA  

     
    PAPER-Analog

      Vol:
    E88-C No:4
      Page(s):
    502-508

    An ultra low power CMOS SAW oscillator in the 300-MHz-band that operates on a sub-1 V supply voltage and at sub-1 mW power consumption has been developed. The SAW oscillator is fabricated in a 0.35-µm fully depleted SOI (FD-SOI) process with low voltage operation capability. The SAW oscillator is configured as a type of Colpitts oscillator but consists of 3 cascaded amplifiers instead of a single amplifier. Although the circuit configuration is quite similar to the conventional Colpitts oscillator, this proposed configuration generates an excessively high negative resistance that even exceeds the theoretical limit of the conventional one.

  • Optimal Position of Isolator to Suppress Double Rayleigh Backscattering Noise in Fiber Raman Amplifiers

    Wenning JIANG  Jianping CHEN  Junhe ZHOU  

     
    PAPER-Lasers, Quantum Electronics

      Vol:
    E88-C No:4
      Page(s):
    721-724

    In this paper, amplified double Rayleigh backscattering noise (DRB) in the optical fiber Raman amplifier is analyzed. Expressions are present for both forward pumping and backward pumping schemes, respectively. Calculation is performed to show the effective suppression of DRB noise by employing an optical isolator. The best isolator position is determined as 13 km away from the signal input end for forward pumping, and 9 km from the output end for backward pumping. The best position is found insensitive to the fiber length, pump power, and signal power. When the isolator is on the best position, the DRB noise can be reduced by almost 2 to 3 orders.

  • Design and Evaluation of a Weighted Sacrificing Fair Queueing Algorithm for Wireless Packet Networks

    Sheng-Tzong CHENG  Ming-Hung TAO  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E88-B No:4
      Page(s):
    1568-1576

    Fair scheduling algorithms have been proposed to tackle the problem of bursty and location-dependent errors in wireless packet networks. Most of those algorithms ensure the fairness property and guarantee the QoS of all sessions in a large-scale cellular network such as GSM or GPRS. In this paper, we propose the Weighted-Sacrificing Fair Queueing (WSFQ) scheduling algorithm for small-area and device-limited wireless networks. WSFQ slows down the growth of queue length in limited-buffer devices, still maintains the properties of fairness, and guarantees the throughputs of the system. Moreover, WSFQ can easily adapt itself to various kinds of traffic load. We also implement a packet-based scheduling algorithm, the Packetized Weighted Sacrificing Fair Queueing (PWSFQ), to approach the WSFQ. WSFQ and PWSFQ are evaluated by comparing with other algorithms by mathematical analysis and simulations.

  • Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

    Yuhei KANEKO  Nobuhiko SUGINO  Akinori NISHIHARA  

     
    PAPER

      Vol:
    E88-A No:4
      Page(s):
    846-854

    A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.

  • Making Reactive Systems Highly Reliable by Hypersequential Programming

    Naoshi UCHIHIRA  

     
    PAPER

      Vol:
    E88-A No:4
      Page(s):
    941-947

    Hypersequential programming is a new method of concurrent-program development in which the original concurrent program is first serialized, then tested and debugged as a set of sequential programs (scenarios), and finally restored into the target concurrent program by parallelization. Both high productivity and reliability are achieved by hypersequential programming because testing and debugging are done for the serialized versions and the correctness of the serialized programs is preserved during the subsequent parallelization. This paper proposes scenario-based hypersequential programming for reactive multitasking systems that have not only concurrency and nondeterminacy, but also interruption and priority. Petri nets with priority are used to model reactive systems featuring interruption and priority-based scheduling. How reactive systems are made highly reliable by this approach is explained and the effectiveness of the approach is demonstrated through the example of a telephone terminal control program.

  • Scheduling Proxy: Enabling Adaptive-Grained Scheduling for Global Computing System

    Jaesun HAN  Daeyeon PARK  

     
    PAPER

      Vol:
    E88-B No:4
      Page(s):
    1448-1457

    Global computing system (GCS) harnesses the idle CPU resources of clients connected to Internet for solving large problems that require high volume of computing power. Since GCS scale to millions of clients, many projects usually adopt coarse-grained scheduling in order to reduce server-side contention at the expense of sacrificing the degree of parallelism and wasting CPU resources. In this paper, we propose a new type of client, i.e., a scheduling proxy that enables adaptive-grained scheduling between the server and clients. While the server allocates coarse-grained work units to scheduling proxies alone, clients download fine-grained work units from a relatively nearby scheduling proxy not from the distant server. By computation of small work units at client side, the turnaround time of work unit can be reduced and the waste of CPU time by timeout can be minimized without increasing the performance cost of contention at the server. In addition, in order not to lose results in the failure of scheduling proxies, we suggest a technique of result caching in clients.

  • Sub-1-V Power-Supply System with Variable-Stage SC-Type DC-DC Converter Scheme for Ambient Energy Sources

    Yoshifumi YOSHIDA  Fumiyasu UTSUNOMIYA  Takakuni DOUSEKI  

     
    PAPER-Analog

      Vol:
    E88-C No:4
      Page(s):
    484-489

    This paper describes a sub-1-V power-supply, which is useful for self-powered short-range wireless systems with ambient energy sources. A variable-stage DC-DC converter, which consists of multi-stage switched capacitor circuits and has intermittent operation with an external capacitor, makes it possible to extend the time for self-powered operation. We fabricated a variable-stage DC-DC converter and an intermittent operation circuit with a 0.8-µm CMOS/SOI process. We also applied the sub-1-V power-supply system to a self-powered short-range wireless system and verified its effectiveness.

  • Low On-Voltage Operation AlGaN/GaN Schottky Barrier Diode with a Dual Schottky Structure

    Seikoh YOSHIDA  Nariaki IKEDA  Jiang LI  Takahiro WADA  Hironari TAKEHARA  

     
    PAPER-Power Devices

      Vol:
    E88-C No:4
      Page(s):
    690-693

    We propose a novel Schottky barrier diode with a dual Schottky structure combined with an AlGaN/GaN heterostructure. The purpose of this diode was to lower the on-state voltage and to maintain the high reverse breakdown voltage. An AlGaN/GaN heterostructure was grown using a metalorganic chemical vapor deposition (MOCVD). The Schottky barrier diode with a dual Schottky structure was fabricated on the AlGaN/GaN heterostructure. As a result, the on-voltage of the diode was below 0.1 V and the reverse breakdown voltage was over 350 V.

  • Scalable Multi-Layer GMPLS Networks Based on Hierarchical Cloud-Routers

    Daisaku SHIMAZAKI  Eiji OKI  Kohei SHIOMOTO  Naoaki YAMANAKA  

     
    PAPER-Network

      Vol:
    E88-B No:3
      Page(s):
    1119-1127

    This paper proposes the hierarchical cloud-router network (HCRN) to overcome the scalability limit in a multi-layer generalized multi-protocol label switching (GMPLS) network. We define a group of nodes as a virtual node, called the cloud-router (CR). A CR consists of several nodes or lower-level CRs. A CR is modeled as a multiple switching capability (SC) node when it includes more than one kind of SC, which is fiber SC, lambda SC, time-division multiplexing (TDM) SC, packet SC, even if there are no actual multiple switching capability nodes in the CR. The CR advertises its abstracted CR internal structure, which is abstracted link state information inside the CR. A large-scale, multi-layer network can then achieve scalability by advertising the CR internal structure throughout the whole network. In this scheme, the ends of a link connecting two CRs are defined as interfaces of the CRs. We adopt the CR internal cost scheme between CR interfaces to abstract the network. This CR internal cost is advertised outside the CR via the interfaces. Our performance evaluation has shown that HCRN can handle a larger number of nodes than a normal GMPLS network. It can also bear more frequent network topology changes than a normal GMPLS network.

  • Synchronization-Based Data Gathering Scheme for Sensor Networks

    Naoki WAKAMIYA  Masayuki MURATA  

     
    PAPER-Software Platform Technologies

      Vol:
    E88-B No:3
      Page(s):
    873-881

    By deploying hundreds or thousands of microsensors and organizing a network of them, one can monitor and obtain information of environments or objects for use by users, applications, or systems. Since sensor nodes are usually powered by batteries, an energy-efficient data gathering scheme is needed to prolong the lifetime of the sensor network. In this paper, we propose a novel scheme for data gathering where sensor information periodically propagates from the edge of a sensor network to a base station as the propagation forms a concentric circle. Since it is unrealistic to assume any type of centralized control in a sensor network whose nodes are deployed in an uncontrolled way, a sensor node independently determines the cycle and the timing at which it emits sensor information in synchrony by observing the radio signals emitted by sensor nodes in its vicinity. For this purpose, we adopt a pulse-coupled oscillator model based on biological mutual synchronization such as that used by flashing fireflies, chirping crickets, and pacemaker cells. We conducted simulation experiments, and verified that our scheme could gather sensor information in a fully-distributed, self-organizing, robust, adaptive, scalable, and energy-efficient manner.

  • SDC: A Scalable Approach to Collect Data in Wireless Sensor Networks

    Niwat THEPVILOJANAPONG  Yoshito TOBE  Kaoru SEZAKI  

     
    PAPER-Software Platform Technologies

      Vol:
    E88-B No:3
      Page(s):
    890-902

    In this paper, we present Scalable Data Collection (SDC) protocol, a tree-based protocol for collecting data over multi-hop, wireless sensor networks. The design of the protocol aims to satisfy the requirements of sensor networks that every sensor transmits sensed data to a sink node periodically or spontaneously. The sink nodes construct the tree by broadcasting a HELLO packet to discover the child nodes. The sensor receiving this packet decides an appropriate parent to which it will attach, it then broadcasts the HELLO packet to discover its child nodes. Based on this process, the tree is quickly created without flooding of any routing packets. SDC avoids periodic updating of routing information but the tree will be reconstructed upon node failures or adding of new nodes. The states required on each sensor are constant and independent of network size, thereby SDC scales better than the existing protocols. Moreover, each sensor can make forwarding decisions regardless of the knowledge on geographical information. We evaluate the performance of SDC by using the ns-2 simulator and comparing with Directed Diffusion, DSR, AODV, and OLSR. The simulation results demonstrate that SDC achieves much higher delivery ratio and lower delay as well as scalability in various scenarios.

  • Domain Name System--Past, Present and Future

    Shigeya SUZUKI  Motonori NAKAMURA  

     
    INVITED PAPER

      Vol:
    E88-B No:3
      Page(s):
    857-864

    Domain Name System--DNS is a key service of the Internet. Without DNS, we cannot use any useful Internet applications. At the beginning of the Internet, email or file transfer applications were provided. DNS provides key service to them--resource discovery. Nowadays, there are broad range of software making use of DNS as basis of their application. In this paper, we explain the evolution of DNS, how DNS works and recent activities including operational issues. Then, we describe EPC network which make use of RFID to bridge real world and the Internet, and how DNS helps to organize EPC network.

  • A One-Step Input Matching Method for Cascode CMOS Low-Noise Amplifiers

    Ming-Chang SUN  Ying-Haw SHU  Shing TENQCHEN  Wu-Shiung FENG  

     
    PAPER-Electronic Circuits

      Vol:
    E88-C No:3
      Page(s):
    420-428

    In the design of cascode CMOS low-noise amplifiers, the gate-drain capacitance is generally neglected because it is thought to be small enough compared to gate-source capacitance. However, a careful examination will reveal the fact that the drain impedance of the input transistor significantly affects the input impedance through the gate-drain capacitance, especially as the CMOS technology getting more and more advanced. Moreover, the substrate coupling network of the input transistor also comes into play when the drain impedance of the input transistor is high enough compared to the substrate coupling network. In order to make input matching easier, it is desirable to know the details of the substrate coupling network. Unfortunately, designers generally do not have enough information about the technology they have used, not to mention knowing the details concerning the substrate coupling network. As a matter of fact, designers generally do have foundry provided component models that contain information about the substrate coupling network. This gives us the chance to minimize its effect and predict the input impedance of a low noise amplifier more accurately. In this paper, we show that the effect of the substrate coupling network can be ignored by keeping the drain impedance of the input transistor low enough and a proper drain impedance can then be chosen to achieve input matching without the need of iteration steps. Simulation results of a 2.4 GHz CMOS low noise amplifier using foundry provided component models are also presented to demonstrate the validation of the proposed input matching method.

  • Comparison of Deadline-Based Scheduling Algorithms for Periodic Real-Time Tasks on Multiprocessor

    Minkyu PARK  Sangchul HAN  Heeheon KIM  Seongje CHO  Yookun CHO  

     
    LETTER-System Programs

      Vol:
    E88-D No:3
      Page(s):
    658-661

    Multiprocessor architecture becomes common on real-time systems as the workload of real-time systems increases. Recently new deadline-based (EDF-based) multiprocessor scheduling algorithms are devised, and comparative studies on the performance of these algorithms are necessary. In this paper, we compare EDZL, a hybrid of EDF and LLF, with other deadline-based scheduling algorithms such as EDF, EDF-US[m/(2m-1)], and fpEDF. We show EDZL schedules all task sets schedulable by EDF. The experimental results show that the number of preemptions of EDZL is comparable to that of EDF and the schedulable utilization bound of EDZL is higher than those of other algorithms we consider.

  • MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process

    Ming-Dou KER  Kun-Hsien LIN  Che-Hao CHUANG  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E88-C No:3
      Page(s):
    429-436

    New diode structures without the field-oxide boundary across the p/n junction for ESD protection are proposed. A NMOS (PMOS) is especially inserted into the diode structure to form the NMOS-bounded (PMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. The proposed N(P)MOS-bounded diodes can provide more efficient ESD protection to the internal circuits, as compared to the other diode structures. The N(P)MOS-bounded diodes can be used in the I/O ESD protection circuits, power-rail ESD clamp circuits, and the ESD conduction cells between the separated power lines. From the experimental results, the human-body-model ESD level of ESD protection circuit with the proposed N(P)MOS-bounded diodes is greater than 8 kV in a 0.35-µm CMOS process.

2721-2740hit(4570hit)