This paper describes the design of a programmable QAM transceiver for VDSL applications. A 12-b DAC with 64-dB spurious-free dynamic range (SFDR) at 75-MS/s and an 11-b ADC with 72.3-dB SFDR at 70-MS/s are integrated in this complete physical layer IC. A digital IIR notch filter is included in order to not interrupt existing amateur radio bands. The proposed dual loop AGC adjusts the gain of a variable gain amplifier (VGA) to obtain maximum SNR while avoiding saturation. Using several low power techniques, the total power consumption is reduced to 300-mW at 1.8-V core and 3.3-V I/O supplies. The transceiver is fabricated in a 0.18-µm CMOS process and the chip size is 5-mm 5-mm. This VDSL transceiver supports 13-Mbps data rate over a 9000-ft channel with a BER < 10-7.

The lithography process on the deep trench pattern above the large cavity is proposed to fabricate the MEMS structure. Generally, bubbles generated on the trench patterns when it was baked after coating resist. The probability of the generation of bubbles was reduced by decreasing the backing rate. The fast scanning micromirror with 50.8 kHz resonant frequency was fabricated by controlling the backing rate.

At current interruption by electric contact, a repetition phenomenon of arc extinction and re-ignition is often observed before complete extinction of arc discharge, in some cases for a long time and in other cases for a short time. Occasionally, no re-ignition is observed. From a viewpoint of arc duration, the period of this repeating arc is also an important factor, if it is very long. However, the conventional explanation about the contact arc duration excludes this repeating arc phenomenon so that it fails to explain the reason and the duration of this phenomenon. For the purpose of investigating why this phenomenon occurs and how long it lasts, the arc extinction current and the arc re-ignition voltage have been measured for tungsten electrode, palladium electrode, copper electrode, and silver electrode. The circuit is, for simplicity, resistive with a capacitor source voltage and a fixed short arc gap of 0.5 mm. Taking newly into account the idea of unstable arc region by the measured results, the conventional explanation was improved. As a result, the reason and the duration of arc extinction and re-ignition phenomenon have become understandable. For simplification, the main description is based on the results by tungsten electrode. The results by other electrodes are summarized in appendix.

The vacuum arc root properties (temperature, current density, radius of an arc root, fraction of current density carried by electrons, evaporation rate etc.) of graphite and copper are calculated with the cathode-fall voltage as parameter and the arc root properties of graphite are compared with that of copper. Especially, there is big difference between the evaporation rate of graphite and that of copper. This reason is thought that the thermal conductivity of graphite is low and its evaporating temperature is high.

Breaking arcs occurring between Ag or Cu electrical contact pairs in DC 56 V/7 A resistive circuit are observed with a high-speed camera (1000 frames/s). As a result, the increase of brightness of the arc-emitted light synchronizes with the increase of arc current in the latter half of arc duration. For the case of Ag contacts, the brightness increases in entire region of the breaking arc with sudden increase of the arc current. On the other hand, the increase of the intensity for Cu contacts occurs in not only entire discharge region but also anode spot region significantly.

Electronic mail (email) is one of the most popular services using Internet Protocol (IP). Emails are now sent to and from portable phones in addition to laptop computers. The volume of emails is increasing because of the recent addition of attached electronic files. In addition, short message delivery services (SMS) that send email header information and the essence of email contents are also commonly used. Global short message delivery services via satellites are considered attractive for meeting the demand of increased short message delivery services. To establish a communications link for indoor subscribers, it is preferable to concentrate high transmission power into a spot-beam even using a non-geostationary satellite orbit (non-GSO) satellite system with low Earth orbits. The idea can be realized by a kind of TDMA scheme where only a single spot-beam per satellite is fired at a timeslot in an efficiently scheduled manner. This paper proposes a global short message delivery scheme and a scheduling algorithm that enables each satellite to concentrate its power into a spot-beam illuminating the addressed area in a prescribed timeslot, so that a subscriber in the area can efficiently receive a message addressed to the subscriber. Since the algorithm must guarantee that the spot-beam assignment causes no interference with other spot-beams from adjacent satellites, numerical evaluations are given for a 6-hour period MEO system, as an example, to demonstrate the efficacy and performance.

Maximizing the throughput of a network while supporting fairness among nodes is one of the most critical issues in designing wireless networks. In single-hop networks, a lot of schemes have been proposed to satisfy this criterion, and efficient protocols like the IEEE 802.11 and the HiperLAN/2 standards have been established for wireless LAN. In multi-hop wireless networks, however, throughput and fairness have different characteristics from those of single-hop networks. In this paper, the tradeoff between throughput and fairness on multi-hop networks is studied by computer simulation, assuming three node distribution models, namely, normal, constant, and uniform distribution and four different bandwidth (channel) scheduling methods, i.e., first-in first-out buffer based, weighted traffic model based, bandwidth reservation based, and maximum throughput based scheduling. Furthermore, as a realistic model, a hybrid scheme is investigated where partial bandwidth is allocated to the bandwidth reservation based scheduling and the remaining to the maximum throughput based one.

The sizes of recent Java-based server-side applications, like J2EE containers, have been increasing continuously. Past techniques for improving the performance of Java applications have targeted relatively small applications. Moreover, when the methods of these small target applications are invoked, they are not usually distributed over the entire memory space. As a result, these techniques cannot be applied efficiently to improve the performance of current large applications. We propose a dynamic code repositioning approach to improve the hit rates of instruction caches and translation look-aside buffers. Profiles of method invocations are collected when the application performs with its heaviest processor load, and the code is repositioned based on these profiles. We also discuss a method-splitting technique to significantly reduce the sizes of methods. Our evaluation of a prototype implementing these techniques indicated 5% improvement in the throughput of the application.

In this paper, two efficient VLSI architectures for biorthogonal wavelet transform are proposed. One is constructed by the filter bank implementation and another is constructed by the lifting scheme. In the filter bank implementation, due to the symmetric property of biorthogonal wavelet transform, the proposed architecture uses fewer multipliers than the orthogonal wavelet transform. Besides, the polyphase decomposition is adopted to speed up the processing by a factor of 2. In the lifting scheme implementation, the pipeline-scheduling technique is employed to optimize the architecture. Both two architectures are with advantages of lower implementation complexity and higher throughput rate. Moreover, they can also be applied to realize the inverse DWT efficiently. Based on the above properties, the two architectures can be applied to time-critical image compressions, such as JPEG2000. Finally, the architecture constructed by the lifting scheme is implemented into a single chip on 0.35 µm 1P4M CMOS technology, and its area and working performance are 5.005 5.005 mm2 and 50 MHz, respectively.

In this paper we apply a parallel adaptive solution algorithm to simulate nanoscale double-gate metal-oxide-semiconductor field effect transistors (MOSFETs) on a personal computer (PC)-based Linux cluster with the message passing interface (MPI) libraries. Based on a posteriori error estimation, the triangular mesh generation, the adaptive finite volume method, the monotone iterative method, and the parallel domain decomposition algorithm, a set of two-dimensional quantum correction hydrodynamic (HD) equations is solved numerically on our constructed cluster system. This parallel adaptive simulation methodology with 1-irregular mesh was successfully developed and applied to deep-submicron semiconductor device simulation in our recent work. A 10 nm n-type double-gate MOSFET is simulated with the developed parallel adaptive simulator. In terms of physical quantities and refined adaptive mesh, simulation results demonstrate very good accuracy and computational efficiency. Benchmark results, such as load-balancing, speedup, and parallel efficiency are achieved and exhibit excellent parallel performance. On a 16 nodes PC-based Linux cluster, the maximum difference among CPUs is less than 6%. A 12.8 times speedup and 80% parallel efficiency are simultaneously attained with respect to different simulation cases.

In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35 µm standard cell. The chip size is 3.0643.064 mm2 for 46374 gate counts. The simulation speed can reach 50 MHz. The power dissipation is 69 mW at 3.3 V 50 MHz.

A large-scale packet-switch architecture for a tera bit/s system--which uses a combined-packet-distribution (CPD) method for a crossbar packet switch--was developed. This method eliminates the restriction on scheduling processing time by extending a switching data unit. The data unit is called a combined packet that consists of plural variable-length packets or their fragments. The combined packets are sequentially distributed among multiple crossbar switch planes and their sequence integrity is preserved. Distributive targets among the switch planes are selectable. As a result, when one or more switch planes are damaged, redundancy of the switch fabric is easily attained in a so-called "graceful degradation" manner. Moreover, this switch uses a novel algorithm called hierarchical priority scheduling. This algorithm enables fairness of scheduling by taking account of queuing state. The repetition required for priority scheduling is reduced by a novel hierarchical approach. The simulated performance of this algorithm shows that it performs better than the simple maximal matching method under both uniform and non-uniform traffic.

In 1987, Ito, Saito and Nishizeki proposed a secret sharing scheme realizing general access structures, called the multiple assignment secret sharing scheme (MASSS). In this paper, we propose new MASSS's which are perfect secret sharing schemes and include Shamir's (k,n)-threshold schemes as a special case. Furthermore, the proposed schemes are more efficient than the original MASSS from the viewpoint of the number of shares distributed to each participant.

For network computing on desktop machines, fast execution of Java bytecode programs is essential because these machines are expected to run substantial application programs written in Java. We believe higher Java performance can be achieved by exploiting instruction-level parallelism (ILP) in the context of Java JIT compilation. This paper introduces VLaTTe, a Java JIT compiler for VLIW machines that performs efficient scheduling while doing fast register allocation. It is an extended version of our previous JIT compiler for RISC machines called LaTTe whose translation overhead is low (i.e., consistently taking one or two seconds for SPECJVM98 benchmarks) due to its fast register allocation. VLaTTe adds the scheduling capability onto the same framework of register allocation, with a constraint for precise in-order exception handling which guarantees the same Java exception behavior with the original bytecode program. Our experimental results on the SPECJVM98 benchmarks show that VLaTTe achieves a geometric mean of useful IPC 1.7 (2-ALU), 2.1 (4-ALU), and 2.3 (8-ALU), while the scheduling/allocation overhead is 3.6 times longer than LaTTe's on average, which appears to be reasonable.

In this paper we consider the Feedback-Guided Dynamic Loop Scheduling (FGDLS) method that was proposed by Bull. The method uses a feedback-guided mechanism to schedule a parallel loop within a sequential outer loop. The execution times and the scheduling bounds at a outer iteration are used to find the scheduling bound of the next outer iteration. In this way FGDLS achieves an optimal load balance. Two algorithms have been proposed so far by Tabirca et al. In this article we will review these two algorithms and will give a comparison between their performances.

We have developed a novel basic technology for terahertz (THz) imaging, which allows detection and identification of chemicals by introducing the component spatial pattern analysis. The spatial distributions of the chemicals were obtained from terahertz multispectral transillumination images, using absorption spectra previously measured with a widely tunable THz-wave parametric oscillator. We have also separated the component spatial patterns of frequency-dependent absorptions in chemicals and frequency-independent components such as plastic, paper and measurement noise in THz spectroscopic images. Further we have applied this technique to the detection and identification of illicit drugs concealed in envelopes.

Ultrafast all optical switching using pulse trapping by 100 fs ultrashort soliton pulse across zero dispersion wavelength is investigated. The characteristics of pulse trapping are analyzed both experimentally and numerically. Using the pulse trapping, 1 THz ultrafast all optical switching is demonstrated experimentally. Arbitral one pulse is picked off from pulse train. Pulse trapping for CW signal is also demonstrated and ultrashort pulse is generated by pulse trapping. From these investigation, it is shown that ultrafast all optical switching up to 2 THz can be demonstrated using pulse trapping.

Parallel memories increase memory bandwidth with several memory modules working in parallel and can be used to feed a processor with only necessary data. The Configurable Parallel Memory Architecture (CPMA) enables a multitude of access formats and module assignment functions to be used within a single hardware implementation, which has not been possible in prior embedded parallel memory systems. This paper focuses on address computation in CPMA, which is implemented using several configurable computation units in parallel. One unit is dedicated for each type of access formats and module assignment functions that the implementation supports. Timing and area estimates are given for a 0.25-micron CMOS process. The utilized resources are shown to be linearly proportional to the number of memory modules.

This paper proposes the use of the ratio of wavelet extrema numbers taken from the horizontal and vertical counts respectively as a texture feature, which is called aspect ratio of extrema number (AREN). We formulate the classification problem upon natural and synthesized texture images as an optimization problem and develop a coevolving approach to select both scalar wavelet and multiwavelet feature spaces of greater discriminatory power. Sequential searches and genetic algorithms (GAs) are comparatively investigated. The experiments using wavelet packet decompositions with the innovative packet-tree selection scheme ascertain that the classification accuracy of coevolutionary genetic algorithms (CGAs) is acceptable enough.

Recently, Ma and Chen proposed a new authenticated encryption scheme with public verifiability. The signer can generate a signature with message recovery for a specified recipient. With a dispute, the recipient has ability to convert the signature into an ordinary one that can be verified by anyone without divulging her/his private key and the message. However, we point out that any adversary can forge a converted signature in this article.