Evaluation of cyclic transitions in the discrete-time neural networks with antisymmetric and circular interconnection weights has been derived in an asymptotic mathematical form. The type and the number of limit cycles generated by circular networks, in which each neuron is connected only to its nearest neurons, have been investigated through analytical method. The results show that the estimated numbers of state vectors generating n- or 2n-periodic limit cycles are an exponential function of (1.6)n for a large number of neuron, n. The sufficient conditions for state vectors to generate limit cycles of period n or 2n are also given.

The number of customers of a service for Internet access from cellular phones in Japan has been explosively increasing for some time. We analyze the relation between the number of customers and the volume of traffic, with a view to finding clues to the structure of human relations among the very large set of potential customers of the service. The traffic data reveals that this structure is a scale-free network, and we calculate the exponent that governs the distribution of node degree in this network. The data also indicates that people who have many friends tend to subscribe to the service at an earlier stage. These results are useful for investigating various fields, including marketing strategies, the propagation of rumors, the spread of computer viruses, and so on.

In this article we analyze the performance of a space division output buffered multichannel switch operating in an ATM multimedia environment as follows. Fixed size packets belonging to two classes arrive onto the switch inputs in each time slot. Class-1 packets, representing real time traffic such as live audio and live video communications, are sensitive to delay but insensitive to loss and have their own service time needs. Class-2 packets, representing nonreal time communications such as file transfers, are insensitive to delay but sensitive to loss and have their different service time needs. To respond to the class-1 delay sensitivity, the switch gives class-1 packets higher service priority over class-2. And to respond to the difference in service time needs, the switch operates at two service rates, one for each class. This latter assumption is the major feature of the article, as previous studies have usually assumed that the two classes have the same service needs and thus the same service rate. For the purpose of the analysis, the switch is modelled as a priority, discrete time, batch arrival, multiserver queueing system, with infinite buffer and two geometric service times with two parameters. Performance measures analyzed are system occupancy and packet waiting time.

In this paper, the effects of visual information on associated auditory information were investigated when presented simultaneously under dynamic conditions on a wide screen. Experiments of an auditory-visual stimulus presentation using a computer graphics movie of a moving patrol car and its siren sound, which were combined in various locations, were performed in 19 subjects. The experimental results showed the following: the visual stimulus at the beginning of the presentation captured the sound image stronger than that at the end (i.e., beginning effect), the sound image separated from the visual image even when both stimulus locations were exactly at the same place and then when both stimuli moved in opposite directions from each other, the visual stimulus tended to capture the sound image stronger in the peripheral visual field than in the central visual field, and the visual stimulus moving toward the sound source captured the sound image stronger than that moving away from the sound source.

Recently, the small-world network model has been popular to describe a wide range of networks such as human social relations and networks formed by biological entities. The network model achieves a small diameter with relatively few links as measured by the ratio of clustering coefficient and the number of links. It is quite natural to consider email communication similar to social network patterns. Quite surprisingly, we find from our empirical study that local email networks follow a different type of network model that falls into the category of scale-free network. We propose new network models to describe such communication structure.

The rapid down-scaling of minimum feature size in CMOS technologies has boosted the RF performance, thereby opening up the RF application area to CMOS. The concurrent reduction of supply voltage pushes the MOSFETs used in circuit design more and more into the moderate-inversion regime of operation. As a consequence, compact MOS models are needed that are accurate in all operating regimes, including the moderate-inversion regime. Advanced analogue applications require accurate modelling of distortion, capacitances and noise. RF application of MOSFETs require the extension of this accurate modelling up to high frequencies and in addition accurate modelling of impedance levels and power gain. The implications for compact MOS models will be discussed, together with the state-of-the-art in compact MOS modelling. Special attention will be paid to some well-known circuit examples, and the compact model requirements needed for a correct description. Where relevant MOS Model 11 will be used to illustrate the discussion.

All-CMOS radio transceivers and systems-on-a-chip are rapidly making inroads on a wireless market that for years was dominated by bipolar and BiCMOS solutions. It is not a matter of replacing bipolar transistors in known circuit topologies with FETs; the wave of RF-CMOS brings with it new architectures and unprecedented levels of integration. What are its origins? What is the commercial impact? How will RF-CMOS evolve in the future? This paper offers a retrospective and a perspective.

This paper presents the realization of the radio frequency (RF) power and data transmission for implantable microstimulators. This implantable device composes an internal RF front-end circuit, a control circuit, and a microstimulator. A 2 MHz AM-modulated signal including the power and data necessary for the implantable device is received, and a stable dc voltage and digital data will be extracted to further stimulate neuromuscular stimulation. In this implantable stimulator, the digital part is implemented by field programmable gate array (FPGA), and the analog part is implemented in a standard single-poly fifth-metal 0.25 µm CMOS process. The latter occupies a silicon area smaller than 0.00638 mm2 and produces an output current with 5-bit resolution for stimulations. The measuring stimulating current is 2.77 mA while the stimulation frequency is from 20 Hz to 2 kHz and the pulse width of stimulation current is from 100 µs to 450 µs. In addition, the simulation results of the RF front-end circuit and the verification of the control logic circuit are also presented in this paper.

Design approach to improving fmax of InP-based HBTs by combining lateral scaling (lithographic scaling) and vertical scaling (improving fT) is discussed. An HBT scaling model is formulated to provide means of analyzing the essential impact of scaling on fmax. The model was compared with measurements of single and double heterojunction bipolar transistors with different fT and various emitter sizes. While a high fmax of 313 GHz was achieved using submicron HBT with high fT, it was found that further improvement could have been obtained by reducing the emitter resistance, which has imposed considerable limit on lateral scaling.

This paper presents a novel class of sigma-delta modulator topologies for low-voltage, high-speed, and high-resolution applications with low oversampling ratios (OSRs). The main specifications of these architectures are the reduced analog circuit requirements, large out-of-band gain in the noise transfer function (NTF) without any stability concerns to achieve high signal to noise ratio (SNR) with a low OSR, and unity-gain signal transfer function (STF) to reduce the harmonic distortions resulted from the analog circuit imperfections. To demonstrate the efficiency of the proposed modulator architectures a prototype with HSPICE is implemented. A low-power two-stage class A/AB OTA with modified common mode feedback (CMFB) circuit in the first stage is used to implement the fourth order modulator. Simulation results with OSR of 16 give signal to noise plus distortion ratio (SNDR) and dynamic range (DR) of 90-dB and 92.5-dB including the circuit noise in the 1.25-MHz signal bandwidth, respectively. The circuit is implemented in a 0.13-µm standard CMOS technology. It dissipates about 40-mW from a single 1.2-V power supply voltage.

In this paper, we propose a method of linear time-varying filtering of discrete time signals. The objective of this method is to derive a component, of an input signal, whose alias-free generalized discrete time-frequency distribution [Jeong & Williams 1992] concentrates on a specific region of a time-frequency plane. The method is essentially realized by computing an orthogonal projection of an input onto a subspace that is spanned by orthonormal signals, whose distributions concentrate on the region. We show that such orthonormal signals can be derived as eigenvectors of a matrix whose components are explicitly expressed by using the kernel of the distribution and the regions. This result shows that we can design such a filter prior to processing of the input if the specific region is given as a priori. This result is a generalization of [Hlawatsch & Kozek 1994], that is originally derived for the continuous Wigner distributions, to the discrete distributions.

Applying the formerly proposed classification framework for first order line search optimization techniques we introduce novel superlinear first order line search methods. Novelty of the methods lies in the line search subproblem. The presented line search subproblem features automatic step length and momentum adjustments at every iteration of the algorithms realizable in a single step calculation. This keeps the computational complexity of the algorithms linear and does not harm the stability and convergence of the methods. The algorithms have none or linear memory requirements and are shown to be convergent and capable of reaching the superlinear convergence rates. They were practically applied to artificial neural network training and compared to the relevant training methods within the same class. The simulation results show satisfactory performance of the introduced algorithms over the standard and previously proposed methods.

In 1960, the famous computer pioneer J.C.R. Licklider described a vision for human-computer interaction that he called "man-computer symbiosis. " Licklider predicted the development of computer software that would allow people "to think in interaction with a computer in the same way that you think with a colleague whose competence supplements your own. " More than 40 years later, one rarely encounters any computer application that comes close to capturing Licklider's notion of human-like communication and collaboration. We echo Licklider by arguing that true symbiotic interaction requires at least the following three elements: a complementary and effective division of labor between human and machine; an explicit representation in the computer of the user's abilities, intentions, and beliefs; and the utilization of nonverbal communication modalities. We illustrate this argument with various research prototypes currently under development at Mitsubishi Electric Research Laboratories (USA).

We have proposed a new low-IF transceiver architecture to simultaneously achieve both a small chip area and good minimum input sensitivity. The distinctive point of the receiver architecture is that we replace the complicated high-order analog filter for channel selection with the combination of a simple low-order analog filter and a sharp digital band-pass filter. We also proposed a high-speed convergence AGC (automatic gain controller) and a demodulation block to realize the proposed digital architecture. For the transceiver, we further reduce the chip area by applying a new form of direct modulation for the VCO. Since conventional VCO direct modulation tends to suffer from variation of the modulation index with frequency, we have developed a new compensation technique that minimizes this variation, and designed the low-phase noise VCO with a new biasing method to achieve large PSRR (power-supply rejection ratio) for oscillation frequency. The test chip was fabricated in 0.35-µm BiCMOS. The chip size was 3 3 mm2; this very small area was realized by the advantages of the proposed transceiver architecture. The transceiver also achieved good minimum input sensitivity of -85 dBm and showed interference performance that satisfied the requirements of the Bluetooth standard.

To meet the needs of various consumers and reuse of digital broadcasting programs, it is necessary to re-transmit the digital broadcasting program produced by a variety of digital broadcasting standards over the different digital broadcasting systems. Especially, some channels in digital terrestrial broadcasting must be re-transmitted through the digital cable broadcasting in Korean digital broadcasting environment. In this paper, we present two possible methods for re-transmission from the digital terrestrial broadcasting to digital cable broadcasting, and propose a real-time re-transmission system.

In this paper, a coefficient-parameter reduction method is proposed for invertible deinterlacing with variable coefficients. Invertible deinterlacing, which the authors have developed before, can be used as a preprocess of frame-based motion picture codec, such as Motion-JPEG2000 (MJP2), for interlaced videos. When the conventional field-interleaving is used instead, comb-tooth artifacts appear around edges of moving objects. On the other hand, the invertible deinterlacing technique allows us to suppress the comb-tooth artifacts and also to recover an original picture on demand. As previous works, the authors have developed a variable coefficient scheme with a motion detection filter, which realizes adaptability to local characteristics of given pictures. When applying this deinterlacing technique to an image codec, it is required to send coefficient parameters to receivers for original picture recovery. This work proposes a parameter decimation technique and shows that this reduction approach can be achieved without significant loss of comb-tooth suppression capability and improves the quality at high bit-rate decoding.

A linear-in-dB gain-control amplifier for direct conversion systems employs linearized transconductors in a core amp, a dc offset canceler, and a gain control circuit. The offset compensation circuit achieves a constant corner frequency over a gain range of 14 to 76 dB by simultaneous tuning of the transconductors.

A Switched-Opamp is a device in SC circuits for replacing switches with Opamps which operate like a switch. This technique can be acheived in very low voltage operation. In this paper, we present a design for a Switched-Opamp that can operate at a low supply voltage during the ON-phase and can maintain a high output impedance during the OFF-phase.

This paper proposes a new method, EC-MDC that can detect and correct bit errors in the bitstream generated by multiple description coding. The proposed method generates two sub-bitstreams having a few redundancies as much as conventional multiple description coding. If a sub-bitstream at one side has bit error, the bit error can be corrected by using sub-bitstream of the other side. In BER-SNR experiments, reconstruction quality of the proposed method shows about 11dB higher than that of the conventional MDC at BER < 10-3 when a sub-bitstream is corrupted.

This letter shows the performance comparisons of several different rate scheduling schemes for non-real time data service over the uplink of burst switching-based direct sequence code division multiple access (DS/CDMA) system to support the integrated voice/data service. The closed-form solution of optimal scheduling formulation, which minimizes average transmission delay when all of the active data users are transmitting simultaneously, is presented and mathematical analyses with other rate scheduling schemes, which provide efficiency criterion of transmission delay for rate scheduling schemes, are performed. Numerical results show the analyses explicitly.