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[Keyword] SI(16314hit)

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  • Stabilization of Power Line Impedance for Radiated EMI Level Measurement

    Atsuya MAEDA  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    148-156

    It is important to develop methods of measuring radiated electromagnetic interference level that will produce identical results at all measuring locations. We have considered a number of problems which prevent the achievement of identical results, and proposed some solutions. However, agreement of measurement values adequate for practical purposes has not been achieved. After our successive studies, we finally became aware that there is a causal relationship with changes in the line-to-ground impedance of the power supply. It is presumed that power cables of AC-powered devices operate as antenna elements that produce emission. Thus changes in the power line-to-ground impedance cause variations in the radiation efficiency to produce a different EMI level. We therefore made plans to measure the values of line-to-ground impedance at the AC power outlet for the frequency range of 100kHz to 500MHz at various locations where measurements are made of EMI from EUT (Equipment Under Test). The impedance varies greatly between 6ohms and 2 k-ohm, not only according to the frequency, but also according to the measurement location. In such cases, the EMI level shows a different value even with the same EUT, and it usually increases-especially for vertical polarization. We have developed a new type of LISN (Line Impedance Stabilization Network or Artificial Mains Network) to stabilize the power line-to-ground impedance to get consistent measurement conditions. The LISN consists of feed-through capacitors and an disk type RF resistor. The measurements confirm the consistency in the impedance value which is maintained at 50 ohms in the frequency range from 1MHz to 500MHz. Thus the newly developed LISN improves consistency of measurement values at all locations, while it was difficult to obtain good correlation before employing the LISN. We feel confident that incorporation of the method discussed here in the pertinent technical standards of EMI measurements, such as CISPR, would lead to a major improvement in getting consistent measurements values.

  • Analysis of Multiple Reflections by Transfer Functions of Transmission Line Networks with Branches and Its Application

    Iwata SAKAGAMI  Akihiro KAJI  Tomoaki USAMI  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    157-164

    Networks in this paper consist of non-commensurate transmission lines with branches and branching resistors at junctions. When signals on a transmission line are divided multiple ways at the junctions of branched lines, multiple reflection waves occur by the impedance mismatching. For the analysis of multiple reflections and network design, lattice diagrams have been used so far. However, the expansions of network transfer functions provide an easier way for the same purpose as in the case of lattice diagram. The output transient responses can be directly calculated from the expansions of network transfer functions or can be numerically calculated by software such as the fast Laplace transform. Therefore, once the network transfer functions are given, calculation of transient responses can be carried out quite easily. In this paper, the expansions of network transfer functions have been derived with respect to delay elements ξi=exp(-sτi) by formularizing the propagation of multiple reflection waves, and then the multi-variable rational network transfer functions have been obtained from the expansions. As an example, a 3-port transmission line network with normalized characteristic impedances 1, 1, 6 and normalized branching resistors 1/23, 1/23, 126/23 has been taken up. As the terminal resistances at output ports can be determined from the relation of the first arriving wave to the steady state, the design of 3-port transmission line networks which will furnish output waveforms similar to the waveform of the input within given tolerances has been considered. The output waveforms have been calculated for pure terminal resistances and for the pure terminal resistances plus parasitic parallel capacitances.

  • Bifurcation Phenomena of a Distributed Parameter System with a Nonlinear Element Having Negative Resistance

    Hideo NAKANO  Hideaki OKAZAKI  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    339-346

    Dynamic behavior of a distributed parameter system described by the one-dimensional wave equation with a nonlinear boundary condition is examined in detail using a graphical method proposed by Witt on a digital computer. The bifurcation diagram, homoclinic orbit and one-dimensional map are obtained and examined. Results using an analog simulator are introduced and compared with that of the graphical method. The discrepancy between these results is considered, and from the comparison among the bifurcation diagrams obtained by the graphical method, it is denoted that the energy dissipation in the system considerably restrains the chaotic state in the bifurcation process.

  • Minimum-Width Method of Variable Ordering for Binary Decision Diagrams

    Shin-ichi MINATO  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    392-399

    Binary Decision Diagrams (BDDs) and Shared Binary Decision Diagrams (SBDDs), which are improved BDDs, are useful for implementing VLSI logic design systems. Recently, these representations, which are graph representations of Boolean functions, have become popular because of their efficiency in terms of time and space. The forms of the BDD vary with the order of the input variables though they represent the same function. The size of the graphs greatly depends on the order. The variable ordering algorithm is one of the most important issues in the application of BDDs. In this paper, we consider methods which reduce the graph size by reordering input variables on a given BDD with a certain variable order. We propose the Minimum-Width Method which gives a considerably good order in a practicable time and space. In the method, the order is determined by width of BDDs as a cost function. In addition, we show the effect of combining our method with the local search method, and also describe the improvement using the threshold. Experimental results show that our method can reduce the size of BDDs remarkably for most examples. The method needs no additional information, such as the topological information of the circuit. The results can be a measure for evaluation of other ordering methods.

  • An Application of Dynamic Channel Assignment to a Part of a Service Area of a Cellular Mobile Communication System

    Keisuke NAKANO  Masaharu YOKONO  Masakazu SENGOKU  Yoshio YAMAGUCHI  Shoji SHINODA  Seiichi MOTOOKA  Takeo ABE  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    369-379

    In general, dynamic channel assignment has a better performance than fixed channel assignment in a cellular mobile communication system. However, it is complex to control the system and a lot of equipments are required in each cell when dynamic channel assignment is applied to a large service area. Therefore, it is effective to limit the size of the service area in order to correct the defects of dynamic channel assignment. So, we propose an application of dynamic channel assignment to a part of a service area when fixed channel assignment is applied to the remaining part of the area. In the system, the efficiency of channel usage in some cells sometimes becomes terribly low. The system has such a problem to be improved. We show that the rearrangement of the channel allocation is effective on the problem.

  • 3D Facial Model Creation Using Generic Model and Front and Side Views of Face

    Takaaki AKIMOTO  Yasuhito SUENAGA  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E75-D No:2
      Page(s):
    191-197

    This paper presents an automatic creation method of 3D facial models which are needed for facial image generation by 3D computer graphics. A 3D facial model of a specific person is obtained from just the front and side view images without any human operation. The method has two parts; feature extraction and generic model modification. In the feature extraction part, the regions or edges which express the facial features such as eyes, nose, mouth or chin outline are extracted from the front and side view images. A generic head model is then modified based on the position and shape of the extracted facial features in the generic model modification part. As a result, a 3D model for persons is obtained. By using the specific model and the front and side view images, texture-mapped facial images can be generated easily.

  • New Trend and Future Issues of Hardware Description Language and High-Level Synthesis

    Masaharu IMAI  

     
    INVITED PAPER

      Vol:
    E75-A No:3
      Page(s):
    307-313

    This paper discusses the trends and future issues in hardware description languages (HDL's) and high-level synthesis systems. First the importance of HDL's and high-level synthesis is described. Then, several HDL's and related CAD systems are briefly introduced. Finally, the requirements to future HDL's and highlevel synthesis systems are discussed from several points of view.

  • The Determination of Radiated Emissions Limits for Integrated Circuits within Telecommunications Equipment

    Richard R. GOULETTE  Robert J. CRAWHALL  Stanislus K. XAVIER  

     
    INVITED PAPER

      Vol:
    E75-B No:3
      Page(s):
    124-130

    This paper outlines an approach for specifying emissions performance at the component level. The objective is to move towards an industry specification for radiated emissions from large integrated circuits in order to facilitate cost effective system design for EMI compliance. Simple models of the mechanisms of direct chip radiation are provided based on the physical and electrical structure of large integrated circuits. These models lead to simple algorithms for estimating the total IC radiation based on IC design parameters. These models can be related to proposed emissions limits based on the desired application of the IC. Finally a measurement methodology is described which permits evaluation of the IC's relative to the limits and provides the information required to make detailed simulation models.

  • Service Specification and Its Protocol Specifications in LOTOS--A Survey for Synthesis and Execution--

    Teruo HIGASHINO  

     
    INVITED PAPER

      Vol:
    E75-A No:3
      Page(s):
    330-338

    LOTOS is a language developed within ISO for the formal description of communication protocols and distributed systems. In LOTOS, requirements for a distributed system are called a "service specification". Each node exchanges synchronization messages to ensure the temporal ordering for the execution of events in a service specification. The actions of each node are described as a "protocol specification". This paper gives a survey for a method to derive protocol specifications from a service specification written in a LOTOS based language. In order to derive the protocol specifications, we make the syntax tree of a given service specification and give some attributes for each node in the tree. The protocol specifications are derived automatically by evaluating these attributes. The derived protocol specifications satisfy the given service specification. We also explain a LOTOS simulator for the execution of derived protocol specifications. The related works are also summarized.

  • Two-Dimensional Quadrilateral Recursive Digital Filters with Parallel Structure--Synthesis and Parallel Processing--

    Tsuyoshi ISSHIKI  Hiroaki KUNIEDA  Mineo KANEKO  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    352-361

    This paper proposes a designing algorithm for quadrilateral recursive filters which consist of four quarter-plane filters in the four quadrants. This can realize a perfect zero-phase filtering which is essential for image processing. Furthermore, several parallel processing algorithms capable of performing under very high parallel efficiency are developed on line-connected and mesh-connected processor arrays. By these proposals, the advantage of two-dimensional non-causal zero-phase recursive digital filters is made clear.

  • Annealing by Perturbing Synapses

    Shiao-Lin LIN  Jiann-Ming WU  Cheng-Yuan LIOU  

     
    PAPER-Bio-Cybernetics

      Vol:
    E75-D No:2
      Page(s):
    210-218

    By close analogy of annealing for solids, we devise a new algorithm, called APS, for the time evolution of both the state and the synapses of the Hopfield's neural network. Through constrainedly random perturbation of the synapses of the network, the evolution of the state will ignore the tremendous number of small minima and reach a good minimum. The synapses resemble the microstructure of a network. This new algorithm anneals the microstructure of the network through a thermal controlled process. And the algorithm allows us to obtain a good minimum of the Hopfield's model efficiently. We show the potential of this approach for optimization problems by applying it to the will-known traveling salesman problem. The performance of this new algorithm has been supported by many computer simulations.

  • Transient Analysis of Switched Current Source

    Takahiro MIKI  Yasuyuki NAKAMURA  Keisuke OKADA  Yasutaka HORIBA  

     
    PAPER

      Vol:
    E75-C No:3
      Page(s):
    288-296

    A current source with current switches (switched current source) is widely used in various analog ICs. One of its typical application is data converters. This paper describes an analysis of the transient behavior of a switched current source. The analysis has clarified conditions and causes of overshooting in the output waveform. The analysis also clarifies dependence of the settling time on parameters. The waveform heavily depends on time constant and initial charge at the internal node where current source and current switch are connected. They can cause the overshooting and limit the settling time. A phenomenon of acceleration of the settling time and an influence of the charge coupling through current switches are also discussed. A chart mentioned in this paper is useful for the initial design and the improvement of switched current sources.

  • Linear Time Fault Simulation Algorithm Using a Content Addressable Memory

    Nagisa ISHIURA  Shuzo YAJIMA  

     
    INVITED PAPER

      Vol:
    E75-A No:3
      Page(s):
    314-320

    This paper presents a new fast fault simulation algorithm using a content addressable memory, which deals with zero-delay fault simulation of gate-level synchronous sequential circuits. The computation time of fault simulation for a single vector under the single stuck-at fault model is O(n2) for all the existing fault simulation algorithms on a sequential computers. The new algorithm attempts to reduce the computation time by processing many faults at a time by utilizing a property that a content addressable memory can be regarded as an SIMD type parallel computation machine. According to theoretical estimation, the speed performance of a simulator based on the proposed algorithm is equivalent to a fast fault simulator implemented on a vector supercomputer for a circuit of about 2400 gates.

  • Distributed Signal Transmission System Using Discrete Fourier Transform for High Noise Immunity

    Hyunkoo KANG  Yoon UH  Tasuku TAKAGI  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    188-192

    We propose a new distributed signal (analog or digital) transmission system which has the immunity against the noisy channel. An information signal in transmitter is distributed by distributor and the distributed signal is transmitted. Received signal is reconstructed by the inverse distributor in receiver. In this system, an impulsive interference noise which disturbs the transmission signal in the channel passes decoder only, and this interference noise is distributed by the inverse distributor while the transmitted signal is reconstructed. Some appended signals make it possible to estimate the noise components which inversely distributed with the Fourier transformation as the distributor. Basing upon this principle, the transmission system will have an ability to suppress the impulsive interference, and the channel will have high noise immunity. The construction of receiver which can eliminate the impulsive noise is derived.

  • Prosodic Control to Express Emotions for Man-Machine Speech Interaction

    Yoshinori KITAHARA  Yoh'ichi TOHKURA  

     
    PAPER

      Vol:
    E75-A No:2
      Page(s):
    155-163

    In speech output expected as an ideal man-machine interface, there exists an important issue on emotion production in order to not only improve its naturalness but also achieve more sophisticated speech interaction between man and machine. Speech has two aspects, which are prosodic information and phonetic feature. For the purpose of application to natural and high quality speech synthesis, the role of prosody in speech perception has been studied. In this paper, prosodic components, which contribute to the expression of emotions and their intensity, are clarified by analyzing emotional speech and by conducting listening tests of synthetic speech. The analysis is performed by substituting the components of neutral speech (i.e., one with no particular emotion) with those of emotional speech preserving the temporal correspondence by means of DTW. It has been confirmed that prosodic components, which are composed of pitch structure, temporal structure and amplitude structure, contribute to the expression of emotions more than the spectral structure of speech. The results of listening tests using prosodic substituted speech show that temporal structure is the most important for the expression of anger, while all of three components are much more important for the intensity of anger. Pitch structure also plays a significant role in the expression of joy and sadness and their intensity. These results make it possible to convert neutral utterances into utterances expressing various emotions. The results can also be applied to controlling the emotional characteristics of speech in synthesis by rule.

  • Knowledge-Based Interaction Control of User-Model-Driven Interface System

    Tetsuo KINOSHITA  Noriyuki IWANE  Mariko OSATO  

     
    PAPER

      Vol:
    E75-A No:2
      Page(s):
    179-188

    In order to realize flexible interaction control between user and information processing system, a special purpose user model is proposed on the basis of the knowledge-based design method of user interface system. The user-specific control knowledge of user-oriented interface environment is represented explicitly in the user model and utilized in the user-oriented interface system. Furthermore, the framework of user-oriented interface environment based on this user model called user-model-driven interface system, is proposed as one of user-adaptive human interface systems, in this paper. According to the proposed framework, a prototype system of the user-model-driven interface system is implemented and the facility of user-specific interaction control based on the user model has been verified with respect to an electronic mail handling task.

  • Cell Designer: An Automatic Placement and Routing Tool for the Mixed Design of Macro and Standard Cells

    Young Seok BAEK  Byoung Yoon CHEON  Kyung Sik KIM  Hyun Chan LEE  Chul Dong LEE  

     
    PAPER-Computer Aided Design (CAD)

      Vol:
    E75-A No:2
      Page(s):
    224-232

    In this paper, we propose a new algorithm for the problem of floorplanning of the mixed design of macro and standard cells. The proposed algorithm which is based on partitioning and slicing approach, uses a modified min-cut bipartitioning heuristic. The heuristic bipartitions a block of a mixture of macro and standard cells to minimize the netcut, which are the number of nets connecting both sub-blocks, with size constraints. A sub-block is a resulting descendant block. Before starting the bipartitioning of the block, the macro cell with the longest side in the block is selected first. Using edges of the selected macro cell, bipartitionings are performed twice fixing the location of the macro cell on one of 4 corners of the block with its rotation and reflection. Bipartitioning of blocks is repeated until each block has either a macro cell or standard cells without macro cells. As a result of bipartitioning, a slicing tree is constructed. Using the proposed floorplan algorithm, we developed an automatic placement and routing tool, Cell Designer, for the mixed design of macro and standard cells. According to the floorplanner, macro cells are placed and standard cells are grouped into standard cell blocks. Standard cells are placed and routed within estimated area of block using conventional tools. They form a fixed-shaped block like a macro cell. Interconnections between the two adjacent blocks are performed with a conventional channel router. The channels and the order of channel routing are determined following the hierarchy of the slicing tree. Cell Designer has a dedicated graphics editor to provide interactive services to users. Experimental results on well-known benchmark data are shown.

  • A New Overfitting Lattice Filter for ARMA Parameter Estimation with Additive Noise

    Weimin SUN  Takashi YAHAGI  

     
    PAPER-Digital Signal Processing

      Vol:
    E75-A No:2
      Page(s):
    247-254

    This paper presents a new method for estimating lattice parameters of a system with additive white noise. A new lattice structure filter is used to reduce the effect of additive white noise, and then, an overfitting lattice filter is proposed to obtain the ARMA parameters by using the estimated lattice parameters with additive white noise.

  • Two-Dimensional Monte Carlo Simulation of Resonant-Tunneling Hot Electron Transistors (RHETs)

    Hiroaki OHNISHI  

     
    PAPER

      Vol:
    E75-C No:2
      Page(s):
    200-206

    In two-dimensional simulation of thin-base RHET, we combined three different simulation methods--the Schrödinger equation, the Monte Carlo simulation, and two-dimensional device simulation within a drift and diffusion model. We found that, in the thin-base RHET, the potential distribution differs from that expected from the thick-base RHET. In the thin-base RHET, the potential of the intrinsic base region does not equal that of the base electrode because the intrinsic base region is depleted and the negative emitter voltage (VEB0) raises the potential of both the intrinsic base and the nondoped region under the intrinsic base. There are also modified by the collector voltage. We also show emitter current-voltage characteristics, transfer ratio, and transit time calculated using this method and compare them with results for the one-dimensional case.

  • A Unified Process and Device Simulation System--P & D Workbench--

    Yukio TAMEGAYA  Hideki IKEUCHI  Hiroyoshi KUGE  Yutaka AKIYAMA  Yuukichi HATANAKA  Masao ASOU  

     
    PAPER

      Vol:
    E75-C No:2
      Page(s):
    234-240

    This paper describes a unified process and device simulation system named P &D Workbench (Process and Device Workbench). The P &D Workbench is an EWS (Engineering Work Station) based system which is connected with MFCs (Main Frame Computers) via networks and can easily execute 2-dimensional process, device, topography and capacitance simulations. Since the P &D Workbench has a supervisor, data-base and excellent user interface using Japanese menu functions and mouse operations, a handling time can be dramatically reduced. The supervisor controls the simulation sequence and file transfer, and manages jobs and files both on EWSs and MFCs, so that plural simulations of splitting conditions can be automatically executed. Short TAT (Turn Around Time) is achieved by selecting an appropriate platform depended on a problem size and MFCs' CPU loads. The effects of the P &D Workbench are shown in examples applied to the development of a 4M-DRAM.

16261-16280hit(16314hit)