This paper compares the performance of SiGe and GaAs HBT power amplifiers for wireless handset applications. To make a fair comparison, we have designed and characterized monolithic SiGe power amplifiers and compared their performance with similarly designed commercial GaAs power amplifiers for both cellular dual-mode (CDMA/AMPS) and PCS CDMA handsets. The designed SiGe cellular power amplifier, at 824-849 MHz, satisfies both CDMA and AMPS requirements in output power, linearity and efficiency. At Vcc = 3 V, the power amplifier shows excellent linearity (1st ACPR < -44.1 dBc and 2nd ACPR < -57.1 dBc) up to 28 dBm for CDMA applications. Under the same bias conditions, the power amplifier also meets AMPS handset requirements in output power (up to 31 dBm) and linearity (with 2nd and 3rd harmonic to fundamental ratios lower than -37 dBc and -55 dBc, respectively). At the maximum output power level, the worst power-added-efficiencies (PAE) are measured to be 36% for CDMA and 49% for AMPS operations. The performance of SiGe cellular power amplifiers is comparable to that of GaAs HBT power amplifiers but with two exceptions: 1) SiGe power amplifier showed a relatively low gain than that of GaAs amplifiers (about 4-6 dB). This may be attributed to the use of low-Q inductors (Q < 5) for on-chip impedance matching, imprecise device modeling and the higher interconnect parasitics; 2) SiGe power amplifiers survived severe output mismatch (VSWR > 12:1) up to Vcc = 4 V but died instantly as Vcc > 4.5 V, due to their low breakdown voltages. We also observed inter-modulation spurs (-22 dBc) appeared in CDMA outputs at two specific tuning angles, but with no spurs appeared in AMPS outputs at any tuning angle. The possible mechanism for generating those output spurs will be discussed as well. In addition, We also designed and characterized a monolithic SiGe power amplifier for PCS (1850-1910 MHz) CDMA handset applications. At Vcc = 3.5 V, the SiGe PA satisfies the linearity requirement up to maximum power output 28 dBm with a comparable gain (23-26 dBm), but has a relatively low PAE ( 25%) compared with that of GaAs counterparts at the high output power end.

Silicon Germanium Heterostructure field effect transistors have been proposed as a promising extension to the CMOS technologies affording enhanced performance at relaxed geometries. Particularly promising is the potential of SiGe Heterostructure MOS and Heterostrucure FET at the low power operating regime. We discuss circuit design techniques applicable in the micropower regime which can be applied to SiGe HMOS technologies. We then review recent results in HMOS both from the material and the applications point of view. We conclude by reporting simulation results indicating the potential of SiGe HMOS in radiofrequency micropower applications.

We have developed advanced SOI n- and p-MOSFETs with strained-Si channel on insulator (strained-SOI) structure fabricated by SIMOX (separation-by-implanted-oxygen) technology. The characteristics of this strained-SOI substrate and electrical properties of strained-SOI MOSFET's have been experimentally studied. Using strained-Si/relaxed-SiGe epitaxy technology and usual SIMOX process, we have successfully formed the layered structure of fully-strained-Si (20 nm)/fully-relaxed-SiGe film (290 nm) on uniform buried oxide layer (85 nm) inside SiGe layer. Good drain current characteristics have been obtained in strained-SOI MOSFET's. It is found that both electron and hole mobility is enhanced in strained-SOI MOSFET's, compared to the universal mobility in an inversion layer and the mobility of control SOI MOSFET's. These mobility enhancement factors are almost the same as the theoretical results.

We report the process flow and technological features of Infineons' 75 GHz bipolar technology, which is characterized by a double-poly self-aligned transistor structure and a SiGe base, grown by selective epitaxy. The dependence of the epitaxial deposition on growth conditions and the influence of layout on the growth process is discussed, especially for different kinds of reticles: bipolar-ICs, BICMOS-ICs and discrete semiconductors. Finally, our monitoring concept for the control of the selective SiGe epitaxy is presented and compared with alternative methods of process control.

An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.

A selectively grown Si1-xGex base heterojunction bipolar transistor (HBT) was fabricated, and effects of Ge and B profiles on the device performance were investigated. Since no obvious leakage current was observed, it is shown that good crystallinity of Si1-xGex was achieved by using a UHV/CVD system with high-pressure H2 pre-cleaning of the substrate. Very high current gain of 29,000 was obtained in an HBT with a uniform Ge profile by both increasing electron injection from the emitter to the base and reducing band gap energy in the base. Since the Early voltage is affected by the grading of Ge content in the base, the HBT with the graded Ge profile provides very high Early voltage. However, the breakdown voltage is degraded by increasing Ge content because of reducing bandgap energy and changing dopant profile. To increase the cutoff frequency, dopant diffusion must be suppressed, and carrier acceleration by the internal drift field with the graded Ge profile has an additional effect. By doing them, an extremely high cutoff frequency of 130 GHz was obtained in HBT with graded Ge profiles.

SiGe HBTs with doping level inversion, that is, a higher dopant concentration in the base than in the emitter, are realized based on the double-polysilicon self-aligned transistor scheme by means of selective epitaxy performed in a production CVD reactor. The effects of the Ge profile in the base on the transistor performance are explored. The fabricated HBT with a 12-27% graded Ge profile demonstrates a maximum cutoff frequency of 88 GHz, a maximum oscillation frequency of 65 GHz, and an ECL gate delay time of 13.8 ps.

This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within 1/2 LSB, and the effective bits are 5. 2 bits at an input frequency of 100 MHz and 4. 2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.

The characteristics of a-Si bottom-gate TFT test devices with several kinds of inorganic "quasi-black matrix," such as metal, semiconductor, and insulator, on the top were investigated for various black matrix(BM) resistivities. In the Ia-Vg characteristics, for a BM sheet resistance of about1 1012 Ω/, a high off current and large Vth shift were observed due to the back-gating effects when the BM is charged up. Accrding to the ac dynamic characteristics, there was almost no leakage due to the capacitive coupling between source and drain after 16.6 msec(one frame) when the BM sheet resistance was above 7 1013 Ω/ . It was found that hydrogenated amorphous silicon germanium(a-SiGe:H) film, which has enough optical density, with the sheet resistance above the order of 1014 Ω/ is a promising candidate for an inorganic BM on TFT array.